MANUKAU INSTITUTE OF TECHNOLOGY

TECHNOLOGY PARK CAMPUS

SCHOOL OF PROFESSIONAL ENGINEERING

Assessment For: BEngTech and NZDE 527.517 & 527.518 PLC

Programming 1
Assessment: Written Test 1
Assessment Weighting: 10% for 517.518 and 15% for 527.517
Assessment Mark Total: 60
Assessment Due Date: 13 Sep 2021
Lecturer: Najib Mohammad
Semester: 2, 2021

This Assessment Covers the Following Learning Outcomes:

1. Explain operation of a PLC (Programmable Logic Controller) and its use in industry.
2. Hardwire a PLC and apply ladder logic programming to perform simple automated
tasks.
3. Design Ladder Logic Diagrams , Numbering system, Logic gates.
4. Apply common industry analogue and digital input/output modules

Assessment Duration: 2 hours 10 minutes

Additional Assessment Comments:

• The assessment duration includes a 10 minute reading time.
• Answer all questions to achieve a total out of 60 marks.
• Only scientific calculators are allowed for this assessment.
• You may use a non-electronic dictionary.
• Do not write in red pen.
You may not leave the examination room during the first 1 hour nor the last 15
minutes of the examination.

PAGE 1
 QUESTION 1 – Programming Fundamentals (10 Marks)

a) State the number of bits in a : ( 4 Marks)

BOOL ________1__________________

SINT __________8________________

INT _________16_________________

DINT ________32______________

b) The Address : B23:4/09 Stores a: (1 Mark)

a)bit b)byte c)Float d) Integer

Answer : a

c)Explain with details the “Scan Time” , draw the scan flow diagram. (2 Marks)
Time taken by the PLC to evaluate a program and execute all instructions .
It scans Input devices first , update Image file , Evaluate Program Logic , Update timers,
, counters , …etc , update output Image file after scan all output devices,
then Run diagnostics.

d) Explain the Term “Watchdog Timer”, can it be adjusted and what is the purpose of
this timer : (3 Marks)
( Use Extra sheet if required)

It is used to check scan time from start to finish. If scan time is not
completed in defined time, watchdog will create a Fault mode and turn off
all outputs.

PAGE 2
Question 3 (10 Marks)
a. Explain in details the Terms ROM and RAM memory types , which one
needs battery back up.
(2 Mark)
ROM means Read Only Memory It stores the operating system (refer
to Firmware)convert the ladder code to instructions that the
microprocessor understand. It is Non-volatile and does not need
battery backup.
RAM means Random Access Memory, It contains the user programs ,
also Timers , counters values , Input Output status . The RAM is a
volatile memory so it needs battery back up , if no battery and power is
lost to the PLC , information will be lost.

b. Explain why optical galvanic isolation is used in PLC in/output ports?

(2 Marks)

Galvanic Isolation means , separation of I/P and O/P devices ( The

Field) . It prevent voltage spikes and surge from damaging the PLC
CPU and electronics .
It also provide electrical separation between two circuits but allow
communication.
Block Diagram

PAGE 5
c. Show the Binary Representation in 8 digits of the Decimal numbers :
(2 marks)
11 Decimal = 2# ________0000 1011_________________________

63 Decimal = 2# _______1100 1111__________________________

Show the Decimal Numbers for the Binary representation in 8 digits :

(2 marks)
2#0001 0101 = ________21___________________________

2#0111 1111 =________127____________________________

Show the Binary Value in 8 digits of the Hexadecimal numbers :

(2 marks)
16#FF = 2# ________1111 1111____________________________

16#4A = 2# ________0100 1010____________________________

PAGE 6
QUESTION 4: Timers (10 Marks)
4a) To complete the graph, choose an answer from the following options:

Timer Accumulated Value (.ACC)

Timer Done Bit (.DN)
Timer Timing Bit (.TT)
Timer Enable Bit (.EN)
Timer Preset (.PRE)
Timer Off (.OFF)
Timer On (.ON)
Timer Delay (.DELAY)
Timer Reset (.RES) as controlled by another rung instruction

The following figure describes the operation of Timer ON Delay (TON). Study
the figure and assign to each graph the correct description (where
timer_______________ is displayed)

.EN

.TT

.DN

(3 marks)

PAGE 7
Question 5 Bit Shift Instructions (10 Marks)

The following ladder logic program with Bit Shift Left instruction is running in
an Ice Cream manufacturer.

There are four steps:

Step 1: Verify the cone is not broken.
Step 2: Put ice cream inside the cone (turn on D_OUT.1)
Step 3: Add chocolate chips (turn on D_OUT.2)
Step 4: Add sprinkles (turn on D_OUT.3)

In Step 1 D_IN.2 detects if a cone is broken (0) or unbroken (1). An unbroken

cone shows a 1 on the shift register and a broken cone shows a 0.
When the cone is unbroken, the program performs Step 2 (adds Ice cream in
the cone), Step 3 (adds Chocolate chips) and Step 4 (adds Sprinkles).

ARRAY(0) is used as the shift register Array by the BSL function. The BSL
input value D_IN.0 detects every passing cone per production cycle on a
conveyor line, showing (1) when a cone is detected.

PAGE 10
 Question 6 LADDER PROGRAM (10 Marks)

Design a ladder diagram to control an industrial oven

By pressing the Start PB a fan will start for 10 seconds before the heater
starts, and simultaneously with the fan for 10 sec a horn will sound to warn
that the heater will start.
When the Stop PB is pressed the heater will be de-energised first, the fan
will stop after the heater has cooled for 15 seconds. (The horn does not sound
when stop is pressed)

A Heater Overload will trip the heater operation but will allow the fan operation
to cool the heater for 10 sec. When the heater overload contacts open, the
Heater Overload Lamp will be energized.

A Fan Overload will trip the both the heater and fan immediately. When the
fan overload contacts open, the Fan Overload Lamp will be energized.

When either the Overloads have been activated, the internal relay will prevent
automatic start up when the overload conditions are cleared.

Inputs
Field Status Outputs
TAG Description
N/O Tag Description
D_IN.0 START PB
N/C D_OUT.0 FAN
D_IN.1 STOP PB
D_OUT.1 HEATER
D_IN.2 HEATER OVERLOAD N/C
D_OUT.2 HORN
D_IN.3 FAN OVERLOAD N/C
D_OUT.3 HEATER OVERLOAD LAMP
D_OUT.4 FAN OVERLOAD LAMP

TON

10000
Accum 0

TOF
Timer Off Delay EN
Timer TIMER2
Preset 10000 DN
Accum 10000

Fan
D_OUT0
TIMER2.DN <Local:6:O.Data.0>
1
Heater
D_OUT1
TIMER1.DN <Local:6:O.Data.1>

Horn
D_OUT2
TIMER1.EN TIMER1.DN <Local:6:O.Data.2>
/

(End)

PAGE 12
STUDENT NAME:

STUDENT ID: 

For Examiner’s use
Only
Questions
Answered Marks

1 /10

2 /10

3 /10

4 /10

5 /10

6 /10

Total /60

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