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Available online at www.sciencedirect.com
Energy
Energy Procedia 14 (2012) 873 – 879
Procedia
Energy Procedia 00 (2011) 000–000

www.elsevier.com/locate/procedia
nd
2011 2 International Conference on Advances in Energy Engineering (ICAEE 2011)

Harmonic Mitigation in UPS System Using PLL

S.Parthasarathya*, P.Loganthuraib ,S.Selvakumaranc, Dr.V.Rajasekarand
a
Anna University, Chennai, K.L.N.College of Engineering, TamilNadu-630 611,India
b
Anna University, Chennai, K.L.N.College of Engineering, TamilNadu-630 611,India
c
Anna University,Chennai, P.S.N.A. College of Engineering & Tech, TamilNadu, India
d
Anna University, Chennai, P.S.N.A. College of Engineering & Tech, TamilNadu, India

Abstract

This paper studies experimentally the harmonic distortion and the methods to mitigate the harmonics for a
6 KVA UPS system. Phase Locked Loop (PLL) based passive power filters are designed to reduce harmonic
distortion and to correct the power factor. The proposed method minimizes the designed filters total investment cost
such that the harmonic distortion reduced. In a real time 6KVA UPS system, the harmonics are measured and the
proposed filters are tested for the lower order odd harmonics (3rd, 5th, 7th and 9th).The filter greatly reduce the lower
order odd harmonics which show the effectiveness of the proposed filter. The harmonic detection is carried out by
using FLUKE 434 Power Quality Analyzer.

Keywords:Power Quality,Harmonics,Total Harmonic Distortion,Phase Locked Loop.

1. Introduction

The increase in the use of electronic equipment produces a large amount of harmonics in power
systems because of non-sinusoidal currents consumed by non linear loads. The deviation of the current
waveforms from sinusoidal is described in terms of the waveform distortion known as harmonic
distortion. The non-linear loads include diode-rectifiers, adjustable speed motor drives, arc welder etc.
Electronic Power Converters constitute the most important class of non linear loads in the power system.

The main objective of this proposed work is to detect and mitigate the lower order
odd harmonics in a real time system of UPS 6KVA. Here the 6KVA UPS system is loaded with six
computers. The UPS along with the computer is the highly non linear system which creates harmonic
problems. Here the harmonic detection is carried out by using FLUKE 434 power quality analyzer. Based
on harmonic detection the mitigation process is done by single tuned passive harmonic filter[1],[2] using
PLL technique. The PLL is tuned for separate order of harmonics (say 3rd, 5th, 7th, 9th). The tuned
frequencies are according to the order of harmonics (say 150, 250, 350, 450 Hertz). The PLL will capture
the external frequency and it will lock according to it. After this stage the PLL will produce the LOW (0)
output which is given to the relay driver circuit.[3]-[5]. The relay driver circuit will energize the
corresponding relay which is in series with the single tuned filter.

1876-6102 © 2011 Published by Elsevier Ltd. Selection and/or peer-review under responsibility of the organizing committee of 2nd International
Conference on Advances in Energy Engineering (ICAEE). Open access under CC BY-NC-ND license.
doi:10.1016/j.egypro.2011.12.887
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et al.\ Procedia
/ Energy 00(2011)
Procedia 000–000
14 (2012) 873 – 879

a* Corresponding author. Tel.:+919443402901

a* E-mail address: [email protected]

Due to the energisation of the relay the single tuned filter is connected to the line across the load. The
tuned filter will provide low impedance path for harmonic current to the ground. Hence the harmonic
current is suppressed and the system is protected from the unwanted harmonic distortions by which we
get the pure sinusoidal waveform.

2. Passive Filters For Harmonic Mitigation

Shunt passive filter is the most common type of filter which is used to reduce the total harmonic
distortion. The passive harmonics filters are composed of passive elements: resistor (R), inductor (L) and
capacitor (C). Passive filters are applied either to shunt the harmonic currents off the line or to block
their flow between parts of the system by tuning the elements to create a resonance at a selected harmonic
frequency.
The common types of passive harmonic filter include single-tuned and double-tuned filters,
second-order, third-order and C-type damped filter. The double-tuned filter is equivalent to two single-
tuned filters connected in parallel with each other. The third-order and C-type damped filters have two
capacitors with one in series with resistor and inductor, respectively[1,],[2].
The most common type of shunt passive filters used in harmonic mitigation is the single tuned
filter (STF). This type of filter is the simplest to design and the least expensive to implement [2].

Fig 2.1: Types of Passive Filters

3. Design Of Single Tuned Filter

The inductor reactance at fundamental frequency = ωL.

VL2 h2 (1)
X=c � 2
Q c h -1
The capacitor reactance at fundamental frequency=1/ωC.
Xc
XL = (2)
h2
Tuned harmonic order,
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XC
h= (3)
XL
The inductance and capacitance of the branch which the harmonic order to be tuned with respective to
load.
XL (4) C = 1 (5)
L=
2� o 2 � o C

Where,
Qc - Capacitive reactive power ; VL- Load voltage ; L - Inductance; C – Capacitance;fo -
Fundamental frequency ; h - Order of Harmonic.

4. Phase Locked Loop

The Phase-locked loop (PLL) is an important building block of linear systems. Electronic
phase-locked loop (PLL) came into vogue in the 1930s when it was used for radar synchronization and
communication applications. The high cost of realizing PLL in discrete form limited its use earlier. Now
with the advanced IC technology, PLLs are available as inexpensive monolithic ICs.[3]-[5]
A phase-locked loop or phase lock loop (PLL) is a control system that tries to generate an
output signal whose phase is related to the phase of the input "reference" signal. It is an electronic circuit
consisting of a variable frequency oscillator and a phase detector. It is also a closed-loop frequency-
control system based on the phase difference between the input clock signal and the feedback clock signal
of a controlled oscillator.[3]-[7]. The schematic diagram of PLL is shown in Fig.4.1.

4.1 Elements of Phase locked loop:

• Phase Detector/ Comparator.

• A low pass filter.
• An error amplifier.
• A Voltage Controlled Oscillator (VCO).

Fig 4.1 Phase Locked Loop(PLL)

4.2 Design of PLL:

The tuning frequencies of the PLL IC’s are selected based on the external components of R and C.
fα = 1 / (1.1 R*C ) (6)
For 150 Hz, R = 18 kΩ, C = 0.33 µF; like other tuned order parameters are going to be calculated.

5. Filter Circuit

The relay driver circuit is followed by a filter circuit. The filter circuit consists of four single
tuned filters designed for 3rd, 5th, 7th and 9th order of harmonics. When a particular frequency is detected
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by the PLL, then the corresponding relay driver circuit will switch ON the corresponding filter. The filter
will act as a low impedance path for that frequency and thus it is eliminated. If a 5th order harmonic is
detected by the PLL then the relay corresponding to 5th order will switch ON the filter corresponding to
5th order.[1],[2].

Fig 5.1 Filter and Relay circuit

The RLC denotes in Fig 5.1is parameters of the single tuned filter for the designed 3rd, 5th, 7th, and
th
9 order of harmonic. R1, R2, R3, R4 denotes the corresponding relay which is energized by the relay
driver circuit. The load may be a computer system or any other non-linear system. In this proposed
experimental work six numbers of computers are acting as a non linear loads which are connected in
output terminal of 6 KVA UPS system.
6.Implementation Proposed Work
6.1 Case study:
The design and idea of proposed work is being implemented in the Uninterruptible Power Supply
(UPS 6KVA). The UPS is being connected to about 6 computer systems which is common non linear
load used everywhere. The case study is done by using a “FLUKE 434 POWER QUALITY
ANALYSER” to measure the harmonic values of both the voltage and current. The UPS system is a
“SINGLE PHASE, 6KVA, ONLINE SYSTEM”. The details of the case study and result of proposed
work are as follows.
6.2 Harmonic Reduction Using PLL :
The PLL output is given to the relay driver circuit which is added in series to the single
tuned filter. The relay when closed gives the low impedance path for the harmonic current flow to the
ground. By this, the filter is prevented from acting as permanent load impedance across the load and also
acting as a harmonic current neutralizer.
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Fig. 6.1 Simplified Schematic diagram of proposed work

Fig .6.2 Experimental Setup

7. Results for UPS system with and without filter:

All the measurements are made in the input side of the UPS system, with the help of FLUKE
power quality analyzer, The Fig7.1,Fig.7.2,Fig7.3 and Fig7.4 are shows the harmonic parameters
with and without filter implementation. And also Table.1 shows the comparisons of THDI and power
factor for the UPS system with and without filter.

Without Filter With Filter

Fig. 7.1 Voltage and Current readings for UPS system
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Without Filter With Filter

Fig. 7.2 Power and Energy readings for UPS system

Without Filter With Filter

Fig 7.3. Harmonic Spectrum (THDI) for UPS system

Without Filter With Filter

Fig 7.4. Distorted voltage and current waveform for UPS system

Table 1: Comparison of THDI and Power Factor for UPS system with and without filter

Without filter With filter

THDI (% of fundamental) 91.5 24.1
Power factor 0.66 0.80
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8. Conclusion:

The proposed work is the real time harmonic mitigation for a 6KVA UPS system. Four single
tuned filter have been designed and implemented for reducing 3rd,5th,7th and 9th order of harmonics
produced by 6 KVA UPS system. The harmonic measurement has been carried out by the FLUKE 434
Power Quality Analyzer. The filter branches are selected based on the external frequency signal using
PLL. It is evident that the system without harmonic filter has high THDI of 91.5% and low power factor
of 0.66. After the implementation of harmonic filter for the UPS system using PLL, the THDI is reduced
to 24.1% and the power factor is improved to 0.80.

9. References

[1] Joshua phinney and David J. Perreault Filters with active tuning for power application, IEEE Journal on Power Electronics,
vol.18, No.2, March-2003.
[2] J.A.Bonner, W.M. Hunt , R.G. Rocamora , R.F. Dudley , M.R. Sharp , J.A. Twiss “Selecting Ratings For Capacitors And
Reactors In Applications Involving Multiple Single Tuned Filters” IEEE Trans. on Power Del.,Vol.10, No.1, Jan. 1995, pp.
547–555.
[3] G. Kolumb´an, “Phase-Locked Loops,” article in The Encyclopedia of Electrical and Electronics Engineering, J. G.
Webster, (Ed.), vol. 16, pp. 158–188, Wiley, New York, 1999.
[4] M. Karimi-Ghartemani,“ A distortion-free phase-locked loop system for FACTS and power electronic controllers”
Science Direct, Electric Power Research 77,pp 1095- 1100,October 2006.
[5] B. Razavi, Design of monolithic phase-locked loops and clock recovery circuits: a tutorial, in Monolithic Phase-Locked
Loops and Clock Recovery Circuits: Theory and Design, IEEE Press, New York, 1996.
[6] D.H.Wolaver, Phase-Locked Loop Circuit Design, Prentice Hall, Englewood Cliffs, NJ, 1993.
[7] R. E. Best, Phase Locked Loops: Design, Simulation and Applications, 3rd ed., McGraw-Hill, New York, 1997.