M27C64A

64 Kbit (8Kb x 8) UV EPROM and OTP EPROM

5V ± 10% SUPPLY VOLTAGE in READ

OPERATION
FAST ACCESS TIME: 150ns
LOW POWER “CMOS” CONSUMPTION:
– Active Current 30mA
– Standby Current 100µA
PROGRAMMING VOLTAGE: 12.5V ± 0.25V 28

HIGH SPEED PROGRAMMING

(less than 1 minute) 1 PLCC32 (C)
ELECTRONIC SIGNATURE FDIP28W (F)

– Manufacturer Code: 9Bh

– Device Code: 08h

DESCRIPTION
The M27C64A is a 64Kbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one Figure 1. Logic Diagram
time programmable). It is ideally suited for micro-
processor systems requiring large programs and is
organized as 8,192 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to expose
the chip to ultraviolet light to erase the bit pattern.
A new pattern can then be written to the device by VCC VPP
following the programming procedure.
For applications where the content is programmed
only on time and erasure is not required, the 13 8
M27C64A is offered in PLCC32 package. A0-A12 Q0-Q7

P M27C64A
Table 1. Signal Names
A0-A12 Address Inputs E

Q0-Q7 Data Outputs G

E Chip Enable

G Output Enable
VSS
P Program AI00834B

VPP Program Supply

VCC Supply Voltage

VSS Ground

March 1998 1/12

M27C64A

Figure 2A. DIP Pin Connections Figure 2B. LCC Pin Connections

VCC
VPP
A12
VPP 1 28 VCC

DU

NC
A7

P
A12 2 27 P
A7 3 26 NC 1 32
A6 4 25 A8 A6 A8
A5 5 24 A9 A5 A9
A4 6 23 A11 A4 A11
A3 7 22 G A3 NC
M27C64A A2 9 M27C64A 25 G
A2 8 21 A10
A1 9 20 E A1 A10
A0 E
A0 10 19 Q7
NC Q7
Q0 11 18 Q6
Q0 Q6
Q1 12 17 Q5
17
Q2 13 16 Q4

Q1
Q2
VSS
DU
Q3
Q4
Q5
VSS 14 15 Q3
AI00835
AI00836

Warning: NC = Not Connected Warning: NC = Not Connected, DU = Don’t Use

Table 2. Absolute Maximum Ratings (1)

Symbol Parameter Value Unit

TA Ambient Operating Temperature (3) –40 to 125 °C

TBIAS Temperature Under Bias –50 to 125 °C

TSTG Storage Temperature –65 to 150 °C

(2)
VIO Input or Output Voltages (except A9) –2 to 7 V

VCC Supply Voltage –2 to 7 V

(2)
VA9 A9 Voltage –2 to 13.5 V

VPP Program Supply Voltage –2 to 14 V

Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.

DEVICE OPERATION Read Mode

The modes of operation of the M27C64A are listed The M27C64A has two control functions, both of
in the Operating Modes table. A single power sup- which must be logically active in order to obtain
ply is required in the read mode. All inputs are TTL data at the outputs. Chip Enable (E) is the power
levels except for VPP and 12V on A9 for Electronic control and should be used for device selection.
Signature. Output Enable (G) is the output control and should

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 M27C64A

be used to gate data to the output pins, inde- control bus. This ensures that all deselected mem-
pendent of device selection. Assuming that the ory devices are in their low power standby mode
addresses are stable, the address access time and that the output pins are only active when data
(tAVQV) is equal to the delay from E to output (tELQV). is required from a particular memory device.
Data is available at the output after a delay of tGLQV System Considerations
from the falling edge of G, assuming that E has
been low and the addresses have been stable for The power switching characteristics of Advanced
at least tAVQV-tGLQV. CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
Standby Mode ments that are of interest to the system designer:
The M27C64A has a standby mode which reduces the standby current level, the active current level,
the active current from 30mA to 100µA. The and transient current peaks that are produced by
M27C64A is placed in the standby mode by apply- the falling and rising edges of E. The magnitude of
ing a CMOS high signal to the E input. When in the the transient current peaks is dependent on the
standby mode, the outputs are in a high impedance capacitive and inductive loading of the device at the
state, independent of the G input. output.
Two Line Output Control The associated transient voltage peaks can be
suppressed by complying with the two line output
Because EPROMs are usually used in larger mem- control and by properly selected decoupling ca-
ory arrays, this product features a 2 line control pacitors. It is recommended that a 0.1µF ceramic
function which accommodates the use of multiple capacitor be used on every device between VCC
memory connection. The two line control function and VSS. This should be a high frequency capacitor
allows: of low inherent inductance and should be placed
a. the lowest possible memory power dissipation, as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
b. complete assurance that output bus contention between VCC and VSS for every eight devices. The
will not occur. bulk capacitor should be located near the power
For the most efficient use of these two control lines, supply connection point. The purpose of the bulk
E should be decoded and used as the primary capacitor is to overcome the voltage drop caused
device selecting function, while G should be made by the inductive effects of PCB traces.
a common connection to all devices in the array
and connected to the READ line from the system

Table 3. Operating Modes

Mode E G P A9 VPP Q0 - Q7
Read VIL VIL VIH X VCC Data Out
Output Disable VIL VIH VIH X VCC Hi-Z
Program VIL VIH VIL Pulse X VPP Data In
Verify VIL VIL VIH X VPP Data Out
Program Inhibit VIH X X X VPP Hi-Z
Standby VIH X X X VCC Hi-Z
Electronic Signature VIL VIL VIH VID VCC Codes
Note: X = VIH or VIL, VID = 12V ± 0.5V

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code VIL 1 0 0 1 1 0 1 1 9Bh
Device Code VIH 0 0 0 0 1 0 0 0 08h

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M27C64A

Programming E input inhibits the other M27C64A from being

When delivered (and after each erasure for UV programmed.
EPROM), all bits of the M27C64A are in the "1" Program Verify
state. Data is introduced by selectively program- A verify (read) should be performed on the pro-
ming "0"s into the desired bit locations. Although grammed bits to determine that they were correctly
only "0"s will be programmed, both "1"s and "0"s programmed. The verify is accomplished with E
can be present in the data word. The only way to and G at VIL, P at VIH, VPP at 12.5V and VCC at 6V.
change a "0" to a "1" is by die exposition to ultra-
violet light (UV EPROM). The M27C64A is in the Electronic Signature
programming mode when Vpp input is at 12.5V, E The Electronic Signature (ES) mode allows the
is at VIL and P is pulsed to VIL. The data to be reading out of a binary code from an EPROM that
programmed is applied to 8 bits in parallel to the will identify its manufacturer and type. This mode
data output pins. The levels required for the ad- is intended for use by programming equipment to
dress and data inputs are TTL. VCC is specified to automatically match the device to be programmed
be 6V ± 0.25V. with its corresponding programming algorithm. The
High Speed Programming ES mode is functional in the 25°C ± 5°C ambient
The high speed programming algorithm, described temperature range that is required when program-
in the flowchart, rapidly programs the M27C64A ming the M27C64A. To activate the ES mode, the
using an efficient and reliable method, particularly programming equipment must force 11.5V to 12.5V
suited to the production programming environ- on address line A9 of the M27C64A, with
ment. An individual device will take around 1 minute VPP=VCC=5V. Two identifier bytes may then be
sequenced from the device outputs by toggling
to program.
address line A0 from VIL to VIH. All other address
Program Inhibit lines must be held at VIL during Electronic Signa-
Programming of multiple M27C64A in parallel with ture mode.
different data is also easily accomplished. Except Byte 0 (A0=VIL) represents the manufacturer code
for E, all like inputs including G of the parallel and byte 1 (A0=VIH) the device identifier code. For
M27C64A may be common. A TTL low level pulse the STMicroelectronics M27C64A, these two iden-
applied to a M27C64A P input, with E low and VPP tifier bytes are given in Table 4 and can be read-out
at 12.5V, will program that M27C64A. A high level on outputs Q0 to Q7.

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 M27C64A

AC MEASUREMENT CONDITIONS Figure 4. AC Testing Load Circuit

Input Rise and Fall Times ≤ 20ns
Input Pulse Voltages 0.4V to 2.4V 1.3V

Input and Output Timing Ref.

0.8V to 2.0V
Voltages 1N914

Note that Output Hi-Z is defined as the point where data

is no longer driven.
3.3kΩ

Figure 3. AC Testing Input Output Waveforms DEVICE

UNDER OUT
TEST
2.4V CL = 100pF
2.0V

0.8V
0.4V
CL includes JIG capacitance
AI00826 AI00828

Table 5. Capacitance (1) (TA = 25 °C, f = 1 MHz )

Symbol Parameter Test Condition Min Max Unit
CIN Input Capacitance VIN = 0V 6 pF
COUT Output Capacitance VOUT = 0V 12 pF
Note: 1. Sampled only, not 100% tested.

Figure 5. Read Mode AC Waveforms

A0-A12 VALID VALID

tAVQV tAXQX

tEHQZ
tGLQV

tELQV tGHQZ

Hi-Z
Q0-Q7

AI00778B

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M27C64A

Table 6. Read Mode DC Characteristics (1)

(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
Symbol Parameter Test Condition Min Max Unit

ILI Input Leakage Current 0V ≤ VIN ≤ VCC ±10 µA

ILO Output Leakage Current 0V ≤ VOUT ≤ VCC ±10 µA

E = VIL, G = VIL,
ICC Supply Current 30 mA
IOUT = 0mA, f = 5MHz
ICC1 Supply Current (Standby) TTL E = VIH 1 mA
ICC2 Supply Current (Standby) CMOS E > VCC – 0.2V 100 µA
IPP Program Current VPP = VCC 100 µA
VIL Input Low Voltage –0.3 0.8 V
(2)
VIH Input High Voltage 2 VCC + 1 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
Output High Voltage TTL IOH = –400µA 2.4 V
VOH
Output High Voltage CMOS IOH = –100µA VCC – 0.7V V
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.

Table 7. Read Mode AC Characteristics (1)

(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
M27C64A
Symbol Alt Parameter Test Condition -15 -20 -25 -30 Unit

Min Max Min Max Min Max Min Max

Address Valid to
tAVQV tACC E = VIL, G = VIL 150 200 250 300 ns
Output Valid
Chip Enable Low to
tELQV tCE G = VIL 150 200 250 300 ns
Output Valid
Output Enable Low
tGLQV tOE E = VIL 75 80 100 120 ns
to Output Valid
Chip Enable High to
tEHQZ (2) tDF G = VIL 0 50 0 50 0 60 0 105 ns
Output Hi-Z
Output Enable High
tGHQZ (2) tDF E = VIL 0 50 0 50 0 60 0 105 ns
to Output Hi-Z
Address Transition to
tAXQX tOH E = VIL, G = VIL 0 0 0 0 ns
Output Transition
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. Sampled only, not 100% tested.

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 M27C64A

Table 8. Programming Mode DC Characteristics (1)

(TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.25V)
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current VIL ≤ VIN ≤ VIH ±10 µA
ICC Supply Current 30 mA
IPP Program Current E = VIL 30 mA
VIL Input Low Voltage –0.3 0.8 V
VIH Input High Voltage 2 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High Voltage TTL IOH = –400µA 2.4 V
VID A9 Voltage 11.5 12.5 V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Table 9. Programming Mode AC Characteristics (1)

(TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
tAVPL tAS Address Valid to Program Low 2 µs
tQVPL tDS Input Valid to Program Low 2 µs
tVPHPL tVPS VPP High to Program Low 2 µs
tVCHPL tVCS VCC High to Program Low 2 µs
Chip Enable Low to
tELPL tCES 2 µs
Program Low
Program Pulse Width (Initial) 0.95 1.05 ms
tPLPH tPW
Program Pulse Width (Over
2.85 78.75 ms
Program)
Program High to Input
tPHQX tDH 2 µs
Transition
Input Transition to Output
tQXGL tOES 2 µs
Enable Low
Output Enable Low to
tGLQV tOE 100 ns
Output Valid
Output Enable High to
tGHQZ (2) tDFP 0 130 ns
Output Hi-Z
Output Enable High to
tGHAX tAH 0 ns
Address Transition
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.

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M27C64A

Figure 6. Programming and Verify Modes AC Waveforms

A0-A12 VALID

tAVPL

Q0-Q7 DATA IN DATA OUT

tQVPL tPHQX

VPP

tVPHPL tGLQV tGHQZ

VCC

tVCHPL tGHAX

tELPL

P
tPLPH tQXGL

PROGRAM VERIFY
AI00779

Figure 7. Programming Flowchart ERASURE OPERATION (applies to UV EPROM)

The erasure characteristics of the M27C64A is
such that erasure begins when the cells are ex-
VCC = 6V, VPP = 12.5V posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that sunlight
and some type of fluorescent lamps have wave-
n=1
lengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo-
P = 1ms Pulse rescent lighting could erase a typical M27C64A in
about 3 years, while it would take approximately 1
NO week to cause erasure when exposed to direct
++n NO sunlight. If the M27C64A is to be exposed to these
> 25 VERIFY ++ Addr types of lighting conditions for extended periods of
time, it is suggested that opaque labels be put over
YES YES
the M27C64A window to prevent unintentional era-
P = 3ms Pulse by n
sure. The recommended erasure procedure for
the M27C64A is exposure to short wave ultraviolet
FAIL
light which has a wavelength of 2537 Å. The inte-
Last NO
grated dose (i.e. UV intensity x exposure time) for
Addr erasure should be a minimum of 15 W-sec/cm2.
The erasure time with this dosage is approximately
YES 15 to 20 minutes using an ultraviolet lamp with
12000 µW/cm2 power rating. The M27C64A should
CHECK ALL BYTES
1st: VCC = 6V
be placed within 2.5 cm (1 inch) of the lamp tubes
2nd: VCC = 4.2V during the erasure. Some lamps have a filter on
their tubes which should be removed before erasure.
AI01167

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 M27C64A

ORDERING INFORMATION SCHEME

Example: M27C64A -15 C 1 TR

Speed Package Temperature Range Option

-15 150 ns F FDIP28W 1 0 to 70 °C X Additional
Burn-in
-20 200 ns C PLCC32 6 –40 to 85 °C
TR Tape & Reel
-25 250 ns Packing
-30 300 ns

For a list of available options (Speed, Package, etc...) refer to the current Memory Shortform catalogue.
For further information on any aspect of this device, please contact the STMicroelectronics Sales Office
nearest to you.

9/12
M27C64A

FDIP28W - 28 pin Ceramic Frit-seal DIP, with window

mm inches
Symb
Typ Min Max Typ Min Max
A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177
B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.057 – –
C 0.23 0.30 0.009 0.012
D 36.50 37.34 1.437 1.470
D2 33.02 – – 1.300 – –
E 15.24 – – 0.600 – –
E1 13.06 13.36 0.514 0.526
e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710
L 3.18 0.125
S 1.52 2.49 0.060 0.098
∅ 8.89 – – 0.350 – –
α 4° 11° 4° 11°
N 28 28

A2 A3 A

A1 L α
B1 B e C
eA
D2
eB
D
S
N

∅ E1 E

1
FDIPW-a

Drawing is no to scale

10/12
 M27C64A

PLCC32 - 32 lead Plastic Leaded Chip Carrier - rectangular

mm inches
Symb
Typ Min Max Typ Min Max
A 2.54 3.56 0.100 0.140
A1 1.52 2.41 0.060 0.095
A2 – 0.38 – 0.015
B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032
D 12.32 12.57 0.485 0.495
D1 11.35 11.56 0.447 0.455
D2 9.91 10.92 0.390 0.430
E 14.86 15.11 0.585 0.595
E1 13.89 14.10 0.547 0.555
E2 12.45 13.46 0.490 0.530
e 1.27 – – 0.050 – –
F 0.00 0.25 0.000 0.010
R 0.89 – – 0.035 – –
N 32 32
Nd 7 7
Ne 9 9
CP 0.10 0.004

D A1
D1 A2

1 N
B1

E1 E e
Ne F D2/E2
B
0.51 (.020)

1.14 (.045)

Nd A

R CP
PLCC

Drawing is no to scale

11/12
M27C64A

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

© 1998 STMicroelectronics - All Rights Reserved

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12/12
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