Coa Report
Coa Report
TECHNOLOGY,KOKRAJHAR
COMPUTER ORGANISATION & ARCHITECTURE
(UCSE401)
A REPORT ON DMA
SUBMITTED BY - GROUP G
First and foremost, we express our appreciation to Ranjan Patowary for their
invaluable mentorship throughout this period. Their expertise, patience, and
dedication have been instrumental in shaping our understanding and refining
our ideas.
We also extend our thanks to our classmates for their collaborative spirit and
insightful feedback. The exchange of ideas and constructive discussions have
significantly enriched our learning experience.
Last but not least, we owe a debt of gratitude to our friends and family for
their unwavering support and encouragement, which have been a constant
source of motivation during this journey.
Thank you all for your contributions and for being part of this enriching
experience.
Sincerely,
Nikita sarma
Afrina Ahmed
Daiji Kalita
Karabi Nath
INTRODUCTION TO DMA
DMA, or Direct Memory Access, is a pivotal mechanism in modern computer
architectures. It empowers peripheral devices to communicate directly with the
system's memory without involving the CPU for every data transfer operation. By
offloading these tasks from the CPU, DMA significantly enhances system
efficiency and performance.
This DMA controller acts as a mediator between the peripheral devices and the
memory, orchestrating data transfers independently of the CPU. When a peripheral
device needs to read from or write to memory, it sends a request to the DMA
controller, specifying the source and destination addresses of the data. The DMA
controller then takes control of the system bus and manages the data transfer
directly between the device and memory, without requiring continuous CPU
intervention.
DMA CONTROLLER
A DMA (Direct Memory Access) controller is a specialized hardware component
within a computer system responsible for managing and facilitating data transfers
between peripheral devices and the system's memory. Here's a breakdown of its
key functions and components:
1. DMA Controller Core: At the heart of the DMA controller is its core logic,
which coordinates and controls the overall operation of the DMA
functionality. This core includes various control circuits and logic gates
responsible for managing data transfers, address generation, and bus
arbitration.
2. Peripheral Interface: The DMA controller features interfaces that connect
to the peripheral devices requiring data transfers. These interfaces allow the
DMA controller to communicate with different types of peripheral devices,
such as disk drives, network cards, and graphics cards.
3. System Bus Interface: The DMA controller interfaces with the system bus,
which connects the CPU, memory, and other system components. This
interface allows the DMA controller to access the system memory and
transfer data between peripheral devices and memory without CPU
intervention.
4. Address Generation Unit: The address generation unit within the DMA
controller is responsible for generating memory addresses for data transfers.
It calculates the source and destination addresses in the system memory
where data will be read from or written to during the transfer process.
5. Data Transfer Control Logic: This component of the DMA controller
manages the actual movement of data between peripheral devices and
memory. It initiates and supervises data transfer operations, ensuring that
data is transferred accurately and efficiently.
6. Bus Arbitration Logic: The bus arbitration logic within the DMA
controller coordinates access to the system bus during data transfers. It
arbitrates between various devices competing for bus access, ensuring that
data transfers occur smoothly and without conflicts.
7. Interrupt Controller: The interrupt controller component handles interrupt
signals generated by the DMA controller to notify the CPU of completed
data transfer operations or other events requiring CPU attention.
8. Configuration and Control Registers: DMA controllers typically contain
configuration and control registers that allow programmers to configure
various parameters of the DMA operation. These registers enable setting
parameters such as transfer mode, memory addresses, transfer size, and
interrupt handling behavior.
1. Single-ended DMA
Single-ended DMA is a type of direct memory access where data transfer occurs in
one direction only, from the peripheral device to memory or vice versa. In this
mode, the data moves along a single path without needing bidirectional
communication. This simplifies the process and reduces the complexity of
managing data transfers.
2. Dual-ended DMA
Dual-ended DMA is a direct memory access type where data transfers can occur
bidirectionally between the I/O device and memory. Unlike single-ended DMA,
which only allows data to flow in one direction, dual-ended DMA enables
simultaneous data transfer in both directions.
In dual-ended DMA, the DMA controller can initiate read and write operations
independently without involving the CPU for each transfer. This enhances
efficiency by reducing CPU involvement in managing data movement tasks.
3. Arbitrated-ended DMA
In arbitrated-ended DMA, multiple devices on a bus contend for access to the
memory. In this setup, a central arbiter decides which device gets priority in
transferring data. This mechanism ensures fair access and prevents one device
from monopolizing the bus.
4. Interleaved DMA
Interleaved DMA allows multiple devices to transfer data simultaneously. Unlike
traditional DMA methods, where only one device can access the memory at a time,
interleaved DMA enables parallel data transfers from multiple sources.
In Interleaved DMA, data is divided into smaller blocks or packets, which are
transferred alternatingly between different devices. This ensures efficient memory
bus utilization and reduces bottlenecks that could occur with sequential transfers.
1. Source Address: This is the memory address where the data to be transferred
resides. It could be in RAM, a peripheral device's memory, or another source
location. The DMA controller reads data from this source address during the
transfer process.
2. Transfer Control: Transfer control includes parameters such as the number of
bytes to transfer, the direction of the transfer (e.g., from source to destination or
vice versa), and any specific transfer modes or operations (e.g., burst mode, block
mode). These parameters are typically set by the CPU during DMA initialization
and provide instructions to the DMA controller on how to perform the transfer.
3. Destination Address: This is the memory address where the data will be
transferred to. Like the source address, it could be in RAM, a peripheral device's
memory, or another destination location. The DMA controller writes data to this
destination address during the transfer process.
Cons:
THANK YOU