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ahmedafrina007
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CENTRAL INSTITUTE OF

TECHNOLOGY,KOKRAJHAR
COMPUTER ORGANISATION & ARCHITECTURE
(UCSE401)

A REPORT ON DMA
SUBMITTED BY - GROUP G

NIKITA SARMA 202202022103

AFRINA AHMED 202202022121

DAIJI KALITA 202202022119

KARABI NATH 202202022115

Submitted to : Prof. Ranjan Patowary


ACKNOWLEDGMENT
We would like to extend our deepest gratitude to all those who have
contributed to the success of this presentation. Our journey in preparing this
material has been enriched by the support, guidance, and encouragement of
many individuals.

First and foremost, we express our appreciation to Ranjan Patowary for their
invaluable mentorship throughout this period. Their expertise, patience, and
dedication have been instrumental in shaping our understanding and refining
our ideas.

We also extend our thanks to our classmates for their collaborative spirit and
insightful feedback. The exchange of ideas and constructive discussions have
significantly enriched our learning experience.

Last but not least, we owe a debt of gratitude to our friends and family for
their unwavering support and encouragement, which have been a constant
source of motivation during this journey.

Thank you all for your contributions and for being part of this enriching
experience.

Sincerely,
Nikita sarma

Afrina Ahmed

Daiji Kalita

Karabi Nath
INTRODUCTION TO DMA
DMA, or Direct Memory Access, is a pivotal mechanism in modern computer
architectures. It empowers peripheral devices to communicate directly with the
system's memory without involving the CPU for every data transfer operation. By
offloading these tasks from the CPU, DMA significantly enhances system
efficiency and performance.

Traditionally, data transfers between peripheral devices (such as hard drives,


network cards, and graphics cards) and the memory would require the CPU to
handle each operation, leading to increased overhead and reduced system
responsiveness. However, DMA circumvents this limitation by employing a
specialized DMA controller.

This DMA controller acts as a mediator between the peripheral devices and the
memory, orchestrating data transfers independently of the CPU. When a peripheral
device needs to read from or write to memory, it sends a request to the DMA
controller, specifying the source and destination addresses of the data. The DMA
controller then takes control of the system bus and manages the data transfer
directly between the device and memory, without requiring continuous CPU
intervention.
DMA CONTROLLER
A DMA (Direct Memory Access) controller is a specialized hardware component
within a computer system responsible for managing and facilitating data transfers
between peripheral devices and the system's memory. Here's a breakdown of its
key functions and components:

1. Data Transfer Coordination: The DMA controller coordinates data


transfers between peripheral devices (such as hard drives, network cards,
and graphics cards) and the system memory. It acts as an intermediary
between these devices and the CPU, facilitating efficient data movement
without CPU intervention.
2. Bus Arbitration: The DMA controller controls access to the system bus
during data transfers. It arbitrates between various devices competing for bus
access, ensuring that data transfers occur smoothly and without conflicts.
3. Address Generation: The DMA controller generates memory addresses for
data transfers. It determines the source and destination addresses in the
system memory where data will be read from or written to during the
transfer process.
4. Data Movement Control: The DMA controller manages the actual
movement of data between peripheral devices and memory. It initiates and
supervises data transfer operations, ensuring that data is transferred
accurately and efficiently.
5. Transfer Modes: DMA controllers support different transfer modes to
accommodate various data transfer requirements. These modes include
single transfer mode (transferring a single block of data) and block transfer
mode (transferring multiple blocks of data in a single operation).
6. Interrupt Handling: After completing a data transfer operation, the DMA
controller may generate an interrupt signal to notify the CPU of the
operation's completion. This allows the CPU to resume control and handle
any necessary processing tasks related to the transferred data.
7. Configuration and Control Registers: DMA controllers contain
configuration and control registers that programmers can access to configure
the controller's operation. These registers allow programmers to set
parameters such as transfer mode, memory addresses, transfer size, and
interrupt handling behavior.
BLOCK DIAGRAM OF DMA
CONTROLLER
The block diagram of a DMA (Direct Memory Access) controller typically consists
of several key components that work together to facilitate efficient data transfers
between peripheral devices and the system memory. Here's an overview of the
main components typically found in a DMA controller block diagram:

1. DMA Controller Core: At the heart of the DMA controller is its core logic,
which coordinates and controls the overall operation of the DMA
functionality. This core includes various control circuits and logic gates
responsible for managing data transfers, address generation, and bus
arbitration.
2. Peripheral Interface: The DMA controller features interfaces that connect
to the peripheral devices requiring data transfers. These interfaces allow the
DMA controller to communicate with different types of peripheral devices,
such as disk drives, network cards, and graphics cards.
3. System Bus Interface: The DMA controller interfaces with the system bus,
which connects the CPU, memory, and other system components. This
interface allows the DMA controller to access the system memory and
transfer data between peripheral devices and memory without CPU
intervention.
4. Address Generation Unit: The address generation unit within the DMA
controller is responsible for generating memory addresses for data transfers.
It calculates the source and destination addresses in the system memory
where data will be read from or written to during the transfer process.
5. Data Transfer Control Logic: This component of the DMA controller
manages the actual movement of data between peripheral devices and
memory. It initiates and supervises data transfer operations, ensuring that
data is transferred accurately and efficiently.
6. Bus Arbitration Logic: The bus arbitration logic within the DMA
controller coordinates access to the system bus during data transfers. It
arbitrates between various devices competing for bus access, ensuring that
data transfers occur smoothly and without conflicts.
7. Interrupt Controller: The interrupt controller component handles interrupt
signals generated by the DMA controller to notify the CPU of completed
data transfer operations or other events requiring CPU attention.
8. Configuration and Control Registers: DMA controllers typically contain
configuration and control registers that allow programmers to configure
various parameters of the DMA operation. These registers enable setting
parameters such as transfer mode, memory addresses, transfer size, and
interrupt handling behavior.

FIG: BLOCK DIAGRAM OF DMA CONTROLLER


TYPES OF DMA

1. Single-ended DMA

Single-ended DMA is a type of direct memory access where data transfer occurs in
one direction only, from the peripheral device to memory or vice versa. In this
mode, the data moves along a single path without needing bidirectional
communication. This simplifies the process and reduces the complexity of
managing data transfers.

2. Dual-ended DMA
Dual-ended DMA is a direct memory access type where data transfers can occur
bidirectionally between the I/O device and memory. Unlike single-ended DMA,
which only allows data to flow in one direction, dual-ended DMA enables
simultaneous data transfer in both directions.
In dual-ended DMA, the DMA controller can initiate read and write operations
independently without involving the CPU for each transfer. This enhances
efficiency by reducing CPU involvement in managing data movement tasks.

3. Arbitrated-ended DMA
In arbitrated-ended DMA, multiple devices on a bus contend for access to the
memory. In this setup, a central arbiter decides which device gets priority in
transferring data. This mechanism ensures fair access and prevents one device
from monopolizing the bus.
4. Interleaved DMA
Interleaved DMA allows multiple devices to transfer data simultaneously. Unlike
traditional DMA methods, where only one device can access the memory at a time,
interleaved DMA enables parallel data transfers from multiple sources.
In Interleaved DMA, data is divided into smaller blocks or packets, which are
transferred alternatingly between different devices. This ensures efficient memory
bus utilization and reduces bottlenecks that could occur with sequential transfers.

5. Programmed I/O DMA


Programmed I/O DMA is a method where the CPU directly controls data transfers
between peripheral devices and memory. In this type of DMA, the CPU initiates
each data transfer by issuing commands to move data to or from memory.
Unlike other types of DMA that operate independently once initiated, programmed
I/O requires continuous involvement from the CPU throughout the entire data
transfer process.

6. Bus master DMA


Here, the DMA controller takes control of the system bus for data transfer. In this
mode, the DMA controller acts as a bus master and communicates directly with
memory or other devices without involving the CPU.
DMA TRANSFER
In DMA transfers, the source address, transfer control, and destination address are
key components that determine how data is moved between devices. Here's how
they typically work together:

1. Source Address: This is the memory address where the data to be transferred
resides. It could be in RAM, a peripheral device's memory, or another source
location. The DMA controller reads data from this source address during the
transfer process.
2. Transfer Control: Transfer control includes parameters such as the number of
bytes to transfer, the direction of the transfer (e.g., from source to destination or
vice versa), and any specific transfer modes or operations (e.g., burst mode, block
mode). These parameters are typically set by the CPU during DMA initialization
and provide instructions to the DMA controller on how to perform the transfer.
3. Destination Address: This is the memory address where the data will be
transferred to. Like the source address, it could be in RAM, a peripheral device's
memory, or another destination location. The DMA controller writes data to this
destination address during the transfer process.

Here's how these components work together in a DMA transfer:

 Initialization: The CPU configures the DMA controller by specifying the


source address, destination address, transfer control parameters, and any
other necessary settings.
 Request: When a device requires data transfer (e.g., reading from a disk,
sending data over a network), it sends a DMA request to the DMA
controller.
 Arbitration: If multiple devices request DMA simultaneously, the DMA
controller arbitrates between them to determine the priority and grants
access to the bus accordingly.
 Transfer: The DMA controller reads data from the source address according
to the transfer control parameters, and writes it to the destination address.
This process continues until the specified number of bytes has been
transferred.
 Interrupt: Once the transfer is complete, the DMA controller interrupts the
CPU to notify it of the completion status. The CPU can then process the
interrupt and perform any necessary follow-up tasks.
By managing the transfer process independently of the CPU, DMA can improve
system performance and efficiency, especially for tasks involving large amounts of
data.

HOW DMA WORKS


1. DMA controller directly accesses the memory, bypassing the CPU:
 When a peripheral device, such as a network interface card or a disk
controller, needs to transfer data to or from memory, it typically
communicates with the CPU to initiate the transfer.
 In a system with DMA, the peripheral device sends a DMA request directly
to the DMA controller instead of the CPU.
 The DMA controller, upon receiving the request, takes control of the system
bus and directly accesses the system memory without involving the CPU.
 This bypassing of the CPU reduces the overhead associated with data
transfer, as the CPU does not need to be involved in every data movement
operation.
2. DMA controller manages the transfer of data between peripheral and
memory without CPU intervention:
 Once the DMA controller has control of the system bus, it manages the
entire data transfer process between the peripheral device and the system
memory autonomously.
 The DMA controller reads data from the peripheral device's buffer and
writes it to the appropriate memory location, or vice versa, based on the
transfer control parameters set by the CPU during initialization.
 The CPU does not need to intervene in the actual data transfer, allowing it to
focus on other tasks while the DMA controller handles the I/O operation.
3. By handling I/O operations, the DMA frees the CPU to focus on other tasks:
 Because the DMA controller manages data transfer between peripherals and
memory independently, the CPU is freed from the burden of overseeing
these operations.
 This allows the CPU to focus on executing application code, performing
calculations, or handling other system-level tasks without being interrupted
by I/O operations.
 As a result, system performance and efficiency can be significantly
improved, particularly in systems with high I/O demands or when dealing
with large data transfers, as the CPU can utilize its processing power more
effectively.

PROS & CONS of DMA


Pros:

1. Increased Performance: DMA can significantly improve system performance by


offloading data transfer tasks from the CPU, allowing it to focus on other
processing tasks. This is particularly beneficial for high-speed data transfer
operations.
2. Reduced CPU Overhead: Since DMA allows hardware peripherals to access
memory directly, it reduces the need for CPU intervention in data transfer
operations. This leads to lower CPU utilization and frees up CPU resources for
other tasks.
3. Efficient Data Transfers: DMA transfers data between devices and memory
without CPU involvement, which can lead to faster and more efficient data
transfers, especially for large data blocks.

Cons:

1. Complexity: Implementing DMA functionality can add complexity to hardware


design and software development. DMA controllers and associated software
drivers need to be carefully designed and tested to ensure proper operation and
compatibility with other system components.
2. Potential for Data Corruption: Improperly configured or managed DMA
transfers can lead to data corruption or system instability. Care must be taken to
properly synchronize data transfers and handle potential conflicts between DMA
and CPU access to memory.
3. Security Concerns: DMA access bypasses certain CPU-based memory protection
mechanisms, which could potentially be exploited by malicious devices or
software to access sensitive system memory. Mitigations such as DMA protection
features in modern systems help address these security concerns.
CONCLUSION
In conclusion, Direct Memory Access (DMA) offers substantial advantages in
terms of performance optimization and system efficiency. By enabling hardware
peripherals to access system memory directly, DMA reduces CPU overhead and
enhances data transfer rates, making it invaluable for tasks requiring high-speed,
concurrent data processing such as multimedia streaming, network communication,
and large-scale data manipulation.

However, the implementation of DMA introduces certain complexities and


challenges. Careful consideration must be given to hardware design, software
development, and system management to ensure proper functionality and mitigate
potential issues such as data corruption, resource contention, and security
vulnerabilities.

Despite these challenges, DMA remains a fundamental component of modern


computing systems, driving advancements in performance, multitasking capability,
and overall system responsiveness. With proper design, configuration, and
management, DMA serves as a powerful tool for optimizing data transfer
operations and enhancing the overall efficiency of computer systems.

THANK YOU

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