SGM61230
SGM61230
TYPICAL APPLICATION
VIN BOOT
VIN
CBOOT
CIN VOUT
SW
L
SGM61230 COUT
RFB1
EN FB
GND
RFB2
PACKAGE/ORDERING INFORMATION
SPECIFIED
PACKAGE ORDERING PACKAGE PACKING
MODEL TEMPERATURE
DESCRIPTION NUMBER MARKING OPTION
RANGE
SGM61230 TSOT-23-6 -40℃ to +125℃ SGM61230XTN6G/TR CE9XX Tape and Reel, 3000
MARKING INFORMATION
NOTE: XX = Date Code.
YYY X X
Date Code - Week
Date Code - Year
Serial Number
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
PIN CONFIGURATION
(TOP VIEW)
GND 1 6 BOOT
SW 2 5 EN
VIN 3 4 FB
TSOT-23-6
PIN DESCRIPTION
PIN NAME TYPE DESCRIPTION
Switching Node. Connection point of the internal converter lower and upper power MOSFETs.
2 SW O
Connect this pin to the output inductor and the bootstrap capacitor.
Input Supply Voltage Pin. VIN powers the internal control circuitry and the power converter.
Decouple this pin for very high frequency and high di/dt transitions, with small and high
3 VIN –
frequency ceramic capacitors placed as close as possible between VIN and GND pins. Input
under-voltage is protected by a UVLO comparator.
Feedback (Sense) Pin for Output Voltage and Programming. It is normally regulated at
4 FB I
0.603V. Tap an output feedback resistor divider to this pin.
Device Enable Pin. Device will operate if EN voltage is high and will shut down if it is low.
5 EN I Device will be enabled if this pin is left float. EN pin can be used to increase the UVLO
thresholds.
Bootstrap Pin. Place a 0.1µF capacitor (CBOOT) between BOOT and SW pins close to the
6 BOOT O device to provide the required drive voltage for the high-side switch. Do not place any series
resistor with CBOOT.
NOTE: O = Output, I = Input.
ELECTRICAL CHARACTERISTICS
(TJ = -40℃ to +125℃, VIN = 4.5V to 28V, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Voltage Range VIN 4.5 28 V
Non-Switching Quiescent Current IQ VEN = 5V, VFB = 1V 25 µA
Shutdown Supply Current ISD EN = GND 2 µA
VIH Rising 1.19 1.33
EN Terminal Input Threshold V
VIL Falling 0.93 1.10
IIL VEN = 0.5V 0.45
EN Terminal Leakage Current μA
IIH VEN = 1.5V 1.44
Feedback and Error Amplifier
Feedback Voltage VFB VIN = 12V, TJ = +25℃ 0.585 0.603 0.620 V
Power Stage
High-side FET On-Resistance RDSON_HS VBOOT - VSW = 5V 66 116 mΩ
Low-side FET On-Resistance RDSON_LS VIN = 12V 36 63 mΩ
Current Limit
High-side Current Limit ILIM_HS Maximum inductor peak current, TJ = +25℃ 3.4 4.0 4.6 A
Low-side Current Limit ILIM_LS Maximum inductor valley current, TJ = +25℃ 3.4 A
Input Under-Voltage Lockout
Rising VIN 4.1 4.5
UVLO Threshold Voltage VUVLO V
Falling VIN 3.4 3.7
UVLO Hysteresis VUVLO_HYS 400 mV
Over-Temperature Protection
Thermal Shutdown TSHDN Rising Temperature 165 ℃
Thermal Shutdown Hysteresis THYS 10 ℃
Oscillator
Switching Frequency fSW 340 410 480 kHz
Timing Requirements
Soft-Start Time tSS 5 ms
Quiescent Current vs. Junction Temperature Shutdown Current vs. Junction Temperature
60 6
VIN = 12V VIN = 12V
50 5
40 4
30 3
20 2
10 1
0 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Junction Temperature (℃) Junction Temperature (℃)
100 100
RDSON_HS (mΩ)
RDSON_LS (mΩ)
80 80
60 60
40 40
20 20
0 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Junction Temperature (℃) Junction Temperature (℃)
80 20
70
Efficiency (%)
60 15
50
40 10
30
20
5
VIN = 12V
10
VOUT = 5.0V VIN = 24V
0
0
0.001 0.01 0.1 1 10
0.593
0.594
0.595
0.596
0.597
0.598
0.599
0.600
0.601
0.602
0.603
0.604
0.605
0.606
0.607
0.608
0.609
0.610
0.611
Switching Frequency vs. Ambient Temperature Feedback Voltage vs. Ambient Temperature
440 0.608
VIN = 12V VIN = 12V
430 0.606
Switching Frequency (kHz)
420 0.604
410 0.602
400 0.600
390 0.598
380 0.596
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Ambient Temperature (℃) Ambient Temperature (℃)
UVLO Threshold Voltage vs. Junction Temperature EN Terminal Input Threshold vs. Junction Temperature
4.4 1.6
VIN = 28V
4.3 1.5
EN Terminal Input Threshold (V)
UVLO Threshold Voltage (V)
4.1 1.3
VIH
4.0 1.2
3.9 1.1
3.7 0.9
3.6 0.8
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Junction Temperature (℃) Junction Temperature (℃)
200mV/div
AC Coupled
20mV/div
VIN
VOUT
10V/div
10V/div
VSW VSW
AC Coupled
20mV/div
VOUT AC Coupled
VOUT
10V/div
10V/div
VSW
VSW
20mV/div
AC Coupled
AC Coupled
VOUT VOUT
10V/div
10V/div
VSW VSW
10V/div
VIN
10V/div
VIN
2V/div
VOUT
2V/div
VOUT
10V/div
VIN VIN
EN
2V/div
2V/div
EN
VOUT
2V/div
2V/div
VOUT
AC Coupled
VOUT
1A/div
IOUT
Time (200μs/div)
OV HS Current
Sensor
Voltage Thermal
UVLO Boot Regulator BOOT
Reference Sensor
+ HS Current HS Driver
Comparator and
- Limit
FB
Slope
Control Logic SW
Compensation
Soft-Start
Oscillator
LS Driver
EN
LS Current Limit
SGM61230
GND
DETAILED DESCRIPTION
Overview maximize power and limit the maximum peak current in
The SGM61230 is a 28V/3A synchronous step-down high-side and valley current in low-side, the device
converter with over-current, short-circuit and thermal keeps in cycle-by-cycle limit to obtain the system’s
shutdown with auto recovery. Figure 2 shows the power request. The SGM61230 does not shut down
simplified block diagram of the SGM61230. The two until the device heats and then goes to thermal
integrated MOSFET switches of the power stage shutdown. The load increase, the output voltage goes
(66mΩ high-side and 36mΩ low-side) can provide up to low, if the output voltage drops to 20%, the device will
3A of continuous current with high efficiency. go into short protection. It reduces current limit
threshold and the switching frequency goes down due
The device is powered up when VIN exceeds the UVLO
to reduce power dissipation and device goes into
threshold (4.1V TYP). At no load and with no switching,
thermal shutdown. When the output current is low
the typical operating current is 25μA and when the
enough, the device goes into PFM mode.
device is disabled by EN pin, it is only 2µA (TYP). The
internal loop compensation minimizes the BOM cost and Pulse Skip Mode (PSM) and PWM Mode
simplifies the design. The inrush current is also limited In light load, OVP does not occur and the device can
by an internal 5ms soft-start ramp. operate in the normal PWM mode, but to improve light
load efficiency, the device is designed to skip some
Operating Principle
pulses by entering to the PSM mode. When the peak
Peak current mode (PCM) control is used in the
current is lower than 500mA typically, the device enters
SGM61230 to regulate the output voltage. VOUT is
PSM. In PSM, when the output voltage is detected to
sensed by the external resistor divider on the FB pin
be above the internal voltage reference level of the
and compared to the internal 0.603V reference voltage
error amplifier, the high-side MOSFET is kept off for a
by a trans-conductance error amplifier. The error
few cycles (skipping clock pulses) by clamping current
amplifier (EA) output (current) is fed to the internal
reference until the output voltages are discharged
compensation components between the EA output and
below the internal voltage reference level. Note that the
GND to generate a voltage that is used as the peak
integrated current comparator operates based on the
current reference for comparing with the sensed
peak inductor current and the average load current may
high-side switch current. The output of this comparator
vary depending on the output filters and load type.
(COMP) can reset the flipflop that controls the switches.
This flipflop receives fixed frequency clock pulses from Enable Pin and UVLO Adjustment
the internal 410kHz oscillator. In the normal operation The EN pin can be used to turn the device on and off or
the high-side switch is turned on in the beginning of to change the UVLO thresholds. The device is enabled
each switching cycle. The current in the high-side when the EN pin voltage exceeds its high threshold. A
switch starts to rise until the peak current reference is low EN voltage disables the device brings it to the
reached that resets the flipflop. This will turn off the low-quiescent (IQ) state.
high-side switch and turn on the low-side switch. The
The EN pin is internally pulled up by a small current
low-side switch stays on until the end of the cycle.
source (IP) so the device is enabled if EN pin is floated.
Slope Compensation An open drain or open collector output can be used to
Peak current mode-controlled devices in general are control the EN pin.
subject to sub-harmonic oscillation instability at higher
VIN is monitored by the internal under-voltage lockout
duty cycles (typically > 50%). To avoid this instability a
circuit and if it is below UVLO threshold, the device is
compensating ramp signal is used. The ramp starts
disabled. The internal UVLO has a 400mV hysteresis. If
from zero in the beginning of each cycle with a specific
higher thresholds are needed, EN pin can be used as
slop and is added to the sensed high-side switch
shown in Figure 3.
current before it is compared to the peak current
reference. The EN pull-up current is used to set the hysteresis.
The pull-up current is increased by IIH - IIL when the EN
Anti-High-Overload Mode pin exceeds its high threshold. Use Equations 1 and 2
The SGM61230 supports overload mode. When the to calculate the R1 and R2 values for the desired UVLO
output current continues overload while the system low (VUV_L) and high (VUV_H) thresholds.
power up or in turbo mode, the SGM61230 exports the
SG Micro Corp NOVEMBER 2020
www.sg-micro.com
10
4.5V to 28V Input, 3A Output,
SGM61230 Synchronous Step-Down Converter
R (3)
Output Over-Voltage Protection (OVP)
VOUT =VFB × FB1 + 1 An over-voltage protection is included in the device to
RFB2
minimize the output voltage overshoots that may occur
Internal Voltage Reference and Soft-Start after recovery from an output fault or a large unloading
The SGM61230 device has an internal 0.603V transient. The FB pin voltage is compared with the OVP
reference (VREF) to program the output at the desired thresholds. If the VFB exceeds 108% of the VREF, the
level. The output voltage is determined by the high-side switch is forced to turn off. When the VFB falls
reference voltage seen by the error amplifier. When the below 104%, the high-side switch is allowed to turn on
converter starts (or is enabled), an internal ramp again.
ILIM_HS
ILIM_LS
High-side
MOSFET
Skip pulse when IL is Skip pulse when IL is
higher than ILIM_LS higher than ILIM_LS
Low-side
MOSFET
T T T T
Note: T = 1/fSW
APPLICATION INFORMATION
BOOT
CBOOT
SGM61230 0.1μF
VIN = 24V L VOUT = 5V, 3A
VIN SW
10μH
R1 C1 C2 C3 C4 RFB1
500kΩ 10μF 0.1μF 22μF 22μF 100kΩ
EN FB
R2 RFB2
100kΩ GND 13.3kΩ
Design Requirements
A 10pF feedforward capacitor is optioned to improve the response.
When the output is shorted, a large input capacitor is required to ensure that the output voltage ripple is lower than
1V, otherwise the device may not be stable.
To reduce the output ripple and keep the device stable, the output capacitor must be large. The recommended
value should not be lower than 22μF + 22μF, and a 100μF output capacitor will be very helpful for reducing ripple.
0.1% RFB1, RFB2 will be chosen to improve the output voltage precision, if it is needed.
In order to obtain a small VOUT ripple, it is recommended that the VIN is higher than 7V when the VOUT is 5V, and the
VIN is lower than 20V when the VOUT is 1.8V.
Layout Guide
Layout guide schematic for PCB Layout.
J1
TP1
VIN 8V~28V
VIN 3 6
VIN BOOT
C4
100μF/35V C1 C2 R4 0.1μF
10μF 0.1μF J3
Optional 510kΩ SGM61230 L TP2
VOUT
5 2 VOUT
EN SW
10μH 5A
J2
TP3 C5 C6 C7
GND
SW 22μF 22μF NC 5V/3A
4 1
EN FB GND
2 TP4 TP5
R2 100kΩ J4
JP1 1 GND GND GND
R1 499Ω
R5 R3
105kΩ 13.3kΩ C3
10pF
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
0.95 0.69
D
E1 E 2.59
0.99
θ
A1 0.25 c
A2
Dimensions Dimensions
Symbol In Millimeters In Inches
MIN MAX MIN MAX
A 1.000 0.043
A1 0.000 0.100 0.000 0.004
A2 0.700 0.900 0.028 0.039
b 0.300 0.500 0.012 0.020
c 0.080 0.200 0.003 0.008
D 2.850 2.950 0.112 0.116
E 1.550 1.650 0.061 0.065
E1 2.650 2.950 0.104 0.116
e 0.950 BSC 0.037 BSC
L 0.300 0.600 0.012 0.024
θ 0° 8° 0° 8°
REEL DIMENSIONS
TAPE DIMENSIONS
P2 P0
W
Q1 Q2 Q1 Q2 Q1 Q2
B0
Q3 Q4 Q3 Q4 Q3 Q4
Reel Diameter
P1 A0 K0
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
DD0001
TSOT-23-6 7″ 9.5 3.20 3.10 1.10 4.0 4.0 2.0 8.0 Q3
NOTE: The picture is only for reference. Please make the object as the standard.