DIGITAL ELECTRONICS LAB

WORKSHEET

EXPERIMENT:- 1.1
Annie Garg
NAME:- SPARSH R.B. 20BCS5387
UID:-21BCS9452
SUBJECT:- DIGITAL ELECTRONICS GROUP:- 503(B)

Aim:
Validate truth table for:
 NAND gates HD74LS00
 NOR gates HD74LS02
 NOT gates HD74LS04
 AND gates HD74LS08
 OR gate HD74LS32
 XOR gates HD74LS86
Task to be done:
 To verify the truth table of a logic gate, we have to take suitable IC
and the connections are given using the circuit diagram.
 For all the ICs, suitable power supply is applied to the pin 14 while
the pin 7 is connected to the ground.
 The logical inputs of the truth table are applied and the
corresponding output is noted.
 Similarly, the output is noted for all other combinations of inputs.
 In this way, the truth table of a logic gate is verified.
Requirements:
S.NO EQUIPMENT QUANTITY
1. Power supply 1
2. Slide switch 2
3. LED 1
4. NAND gate ,NOR gate, NOT gate,AND gate, 1
OR gate, XOR gate, XNOR gate
5. 1 K-ohm Resistor 1
6. Connecting wire -
7. Breadboard 1
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Circuit diagram/ Block diagram:

1. Logic NAND Gate

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2. Logic AND Gate:

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3. Logic OR Gate:
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4. Logic NOT Gate:

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5. Logic NOR Gate:

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6. Logic XOR Gate:

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Simulation Results:
1. Logic NAND Gate:
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2. Logic AND Gate:

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3. Logic OR Gate:
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4. Logic NOT Gate:

5. Logic NOR Gate:

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6. Logic XOR Gate:
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Concept used:
Binary information is represented in digital computers by physical
quantities called signals. Electrical signals such as voltages exist
throughout the computer in either one of the two recognizable states.
The two states represent a binary variable that can be equal to 1 or 0.
For example, a particular digital computer may employ a signal of 3 volts
to represent binary 1 and 0.5 volts to represent binary 0. Now the input
terminals of digital circuits will accept binary signals of only 3 and 0.5
volts to represent binary input and output corresponding to 1 and 0,
respectively. So now we know, that at a core level, the computer
communicates in the form of 0 and 1, which is nothing but low and high
voltage signals.

Binary logic deals with binary variables and with operations that assume
a logical meaning. It is used to describe, in algebraic or tabular form, the
manipulation is done by logic circuits called gates. Gates are blocks of
hardware that produce graphic symbol and its operation can be
described by means of an algebraic expression. The input-output
relationship of the binary variables for each gate can be represented in
tabular form by a truth-table. Digital logic gates may have more than
one input, (A, B, C, etc.) but generally only have one digital output, (Q).
Individual logic gates can be connected together to form combinational
or sequential circuits or larger logic gate functions.
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Learning/ observation:

• NOT Gate: When logic 1 is applied to one of NOT gate of 7404

IC, then output becomes 0.

• OR Gate: The output of an OR gate is a 1 if one or the other or

both of the inputs are 1, but a 0 if both inputs are 0.

• AND Gate: The output of an AND gate is only 1 if both its inputs
are 1. For all other possible inputs, the output is 0.

• NOR Gate: The output of the NOR gate is a 1 if both inputs are 0
but a 0 if one or the other or both the inputs are 1.

• NAND Gate: The output of the NAND gate is a 0 if both inputs are
1 but a 1 if one or the other or both the inputs are 0.

• XNOR gate: the output of the XNOR gate is a 1 if both inputs

are either low or high and 0 if any of the input is low and high.

Troubleshooting:
• Sometimes wires are connected in wrong manner so our ICs is
breaking down when we closed the circuit due to more current
supply. Then we have to check all the wirings of circuit again and
has to fix this issue.

• Sometimes we use wrong IC so our observation are getting

wrong and our LED may not glow so we have to cross check
every IC’s code and pin diagram of every IC before use.
 EXPERIMENT NO. -1.2

Annie Garg
Name: - Sparsh R.B. 20BCS5387
UID:-21BCS9452
GROUP&SECTION: - 503(B) SUB:-DIGITAL ELECTRONICS

AIM OF THE EXPERIMENT : -

1. Design a Burglar alarm using an AND gate such that the alarm
should turn on whenever the light falling on the LDR is disrupted.

2. Design a voting system to consider a valid vote when a person

sitting at a desk presses both the buttons. IN case only one button is
Pressed during the casting of the vote will be considered invalid.
Also, a valid casted vote will be represented by green light invalid
casted vote will be represented by a red light.

3. Design an automatic heater controller using NOT gate such that at a

temperature below 10 o C the heater should turn ON (the heater can be
represented by using an LED).

Task to be done : - To design circuits for a burglar alarm,

voting system, and automatic heat controller.
Requirements:-
Hardware: Breadboard, IC for NAND, NOR, NOT, AND, and XOR
Gate, balance resistor, pull down resistors, connecting wires,
power
Supply, multimeter, switches, LED.

Software: - Tinker cad.

Circuit diagram/ Block diagram

(The following diagram could be used for NAND, NOR, AND, and XOR Gates by
simply changing the gate without changing any other component)
(This circuit diagram is for NOT Gate only)

Simulation Results:
Burglar Alarm:
(When no light is detected by the photo resistor.)
 (When light falls on the photo resistor.)

Voting System:-
(When both buttons are pressed)
(When only first button is pressed)

(When only second button is pressed)

Automatic Heat Controller:
(When the temperature is above 10℃)

(When the temperature is Below 10℃)

The concept used

For Burglar Alarm:

AND gate is used in the construction of a burglar alarm as it gives an

output when both the inputs are positive. So, we keep a switch in the
house which is always on and another input is of LDR sensor as when
a burglar’s flashlight falls on It will detect it and give the output as
positive resulting in the sound of the buzzer.

For Voting System:

Here we use two ICs AND gate and XOR gate as when both the
buttons are pressed AND gate gives positive output and the vote is
considered but if any one output is negative or 0 the XOR gate gives
positive output and vote is considered invalid
For Automatic Heat Controller:

Temperature sensor detects temperature and for any temperature

below 10 ℃ the heater switches ON. An operational Amplifier is also
used which compares one analog voltage level with another analog
voltage level and produces an output signal based on this voltage
comparison.

Learning/ observation: We observed the working of a temperature

sensor, LDR sensor, operational amplifier, using two ICs in one
breadboard for the voting system, and the use of a buzzer.

Troubleshooting

1. Operational Amplifiers can be used as both inverting and

non inverting amplifiers. For an automatic heat controller, we have
to use it as an inverting amplifier to get the desired output.

2. LM 35 sensor was not available but T MP36 can be used as its

substitute.
 EXPERIMENT:1.3

Annie Garg
Name:-SPARSH R.B. 20BCS5387
UID:- 21BCS9452
Date of Performance: 7.03.2022
Branch: CSE Subject : Digital Electronics

Aim :-
Design a two-way switch for room light (XOR). Design
a multiplayer game trigger mechanism (NOR).

Requirements :-
7400 (NAND) IC, 7402 (NOR) IC, 7486 (XOR) IC, 5V Power Supply, Breadboard, Connecting
wires, Simulation software, Windows 10 PC

Circuit diagram/ Block diagram :-

FOR TWO WAY SWITCH

 FOR MULTIPLAYER GAME TRIGGER

PROBLEM STATEMENTS AND APPROACH

FOR TWO WAY SWITCH

The Exclusive-OR logic function is a very useful circuit that can be used in many
different types of computational circuits. There are two other types of digital logic gates
which although they are not a basic gate in their own right as they are constructed by
combining together other logic gates, their output Boolean function is important enough
to be considered as complete logic gates. These two “hybrid” logic gates are called the
Exclusive-OR (Ex-OR) Gate and its complement the Exclusive-NOR (Ex-NOR) Gate.
The output of an Exclusive-OR gate ONLY goes “HIGH” when its two input terminals are
at “DIFFERENT” logic levels with respect to each other. An odd number of logic “1’s” on
its inputs gives a logic “1” at the output. These two inputs can be at logic level “1” or at logic
level “0” giving us the Boolean expression of:

Q= A’B + AB”
The Exclusive-OR Gate function, or Ex-OR for short, is achieved by combining standard
logic gates together to form more complex gate functions that are used extensively in
building arithmetic logic circuits, computational logic comparators, and error detection
circuits. The Exclusive-OR Gate is widely available as a standard quad two-input 74LS86
TTL gate or the 4030B CMOS package.
 FOR MUTIPLAYER GAME TRIGGER
The Logic NOR Gate is a combination of the digital logic OR gate and an
inverter or NOT gate connected together in series. he inclusive NOR (Not-
OR) gate has an output that is normally at logic level “1” and only goes
“LOW” to a logic level “0” when ANY of its inputs are at logic level “1”. The
Logic NOR Gate is the reverse or “Complementary” form of the inclusive
OR gate. The NOR gate can also be classed as a “Universal” type gate.
NOR gates can be used to produce any other type of logic gate function
just like the NAND gate and by connecting them together in various
combinations the three basic gate types of AND, OR, and NOT function
can be formed using only NOR gates. n order to implement the multiplayer
game trigger mechanism, it required to initiate the game when the
detection of both the players competing in the game as present at the
designated completing stations. The circuit for the same is given below.
 Simulation Results:-

FOR TWO WAY SWITCH

WHEN IT’S OFF (BOTH HAVE SAME POSITION)
WHEN IT’S OPEN (WHEN ONE HAS DIFFERNET INPUT)
FOR MULTIPLAYER GAME TRIGGER
WHEN IT’S SWITCHED ON
WHEN IT’S SWITCHED OFF
.
Learning/ observation :-
The practical applications of logic gates (NAND, NOR & XOR) were
studied and implemented.

Troubleshooting :-
Problem occurred during the experiment is that on high voltage IC
was bread then I added resistor in it which prevents IC to get blast.
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Annie
NAME:- SPARSH Garg
R.B. 20BCS5387
UID:-21BCS9452
SUBJECT:- DIGITAL ELECTRONICS GROUP:- 503(B)

Aim:
Design and realize a given function using K-maps and verify its
performance.

Task to be done:
 Minimize the function given
 Do this using k map
 Finally realize and implement the given minimized function
using k map
Requirements
 7486 (XOR) IC, 5V Power Supply, Breadboard, Connecting
wires, Simulation software, Windows PC
Circuit diagram/ Block diagram:

This is the circuit for xor gate using which we will realize our
function
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Design:
Canonical Forms (Normal Forms): Any Boolean
function can be written in disjunctive normal form (sum
of min-terms) or conjunctive normal form (product of
max- terms). A Boolean function can be represented by
a Karnaugh map in which each cell corresponds to a
minterm. The cells are arranged in such a way that any
two immediately adjacent cells correspond to two
minterms of distance 1. There is more than one way to
construct a map with this property.
Since we have a 4 input function we will use a 4
variable k map
F(W, X, Y, Z) = Σm(1, 3, 4, 6, 9, 11, 12, 14 )
4- VARIABLE K-MAP

The number of cells in 4 variables K-map is sixteen, since the number of variables is four.
The following figure shows 4 variables K-Map.
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Steps:
F(W, X, Y, Z) = Σm(1, 3, 4, 6, 9, 11, 12, 14)
 Draw a k map for the following function
 Minimize it using sop
 Then finally use logic gates to realize it
 No check and verify for all the cases


Simulation Results:
For the above function
F(W, X, Y, Z) = Σm(1, 3, 4, 6, 9, 11, 12, 14)

F (W, X, Y, Z)= (W’X + WX) (Y’Z’ + YZ’) + (W’X’ + WX’) (Y’Z +

YZ)

=XZ’ + X’Z
=X ⊕ Z

Thus, minimized Boolean expression is-

F(W,X,Y,Z)=X⊕Z
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Learning/ observation
 The integrated circuits and their connections on the breadboard
were studied and implemented. The practical applications of
logic gates ( XOR ) were studied and implemented
 Annie Garg
Name: SPARSH Branch: CSE
Subject: DE lab 20BCS5387
UID: 21BCS9452
Class & Sec: 503-B

Aim :
Design traffic lights using D Flip Flop.

Task to be done:
The task is to design traffic lights using D flip flop and
draw circuit diagram and then implement on the tinker cad
software.

Requirements:
555 timer IC (NE555), D flip flop IC (7474), 5V Power
Supply, Breadboard, Connecting wires, Tinkercad
simulator.
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Circuit diagram/ Block diagram
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Simulation Results :-
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Concept used
D flops follow the input when the clock is enabled i.e., it take enable
as a positive edge trigger and remain in the previous state when
clock is disabled.

Initially Input at flip flop 1 is 0. Input at flip flop 2 is 0.

So if you code Q of first flip flop as green led, Q' of second flip flop as
red led and yellow led is coded to the combination Q' of first and Q of the
second. At the first positive edge trigger you give input as 0 to flip flop 1
so the output is also 0 and the output at Q' which is 1 will act as a
positive edge trigger at flip flop 2 which will again give input as 0 to Q of
flip flop 2 so the output is also 0 and the output at Q' of flip flop 2 which
is 1 will turn ON the red led connected to it.

After first positive edge: Input at flip flop 1 is 1 (equal to Q' of flip flop 1)
Input at flip flop 2 is 1.

At the second positive edge: At flip flop 1 the input 1 is given to output Q
which is connected to yellow LED and Q' turns 0 giving the clock at flip
flop 2 a 0, turning the red led OFF.

After second positive edge Input at flip flop 1 is 0 (equal to Q' of flip flop
1) Input at flip flop 2 is 1

At the third positive edge at flip flop 1 the input which is 0 is given to the
output which is also made 0 and the output at Q' which is 1 will act as a
positive edge trigger at flip flop 2

which will again give input as 1 to Q of flip flop 2. Now Q of flip flop 2 and
Q' of flip flop 1 which are both at 1 will give 1 to the yellow LED turning it
on.

And the loop will continue.

Now once led glows make sure that the next positive edge trigger will
come after the required time in other words change the frequency of
clock pulse according to your requirement (you can use 555 timer to
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generate required clock pulse) so that LED will stays glowing and after
that particular time give 1 as Input at positive edge of the clock the other
LED glows and maintain the same clock frequency.

Learning/ observation
The practical applications of D flip flop in designing traffic lights is
studied and implemented. Using two D flip flops and one AND gate we
designed the traffic lights and made its implementation on the tinkercad
software.
It is a simultaneous process in which the clock signals are generated.
once red light glows then yellow light glows then the green light starts
glowing. after green light yellow light does not glow and directly red light
starts glowing instructing the vehicles to stop.

Troubleshooting Simulation Results

NA
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Annie Garg
NAME :- SPARSH R.B.
20BCS5387
UID :- 21BCS9452
SECTION/GROUP :- 503-B
BRANCH :- CSe.
SUBJECT NAME :- DIGITAL ELECTRONIC

Aim:-
Design a data acquisition system using multiplexer.

Task to be done
Design a data acquisition system using 2:1 multiplexer and temperature sensor and
photoresistor.

Requirements
Operational amplifier, Temperature sensor, 2:1 MUX, LED,
Photoresistor, Resistors, Tinkercad software

Circuit diagram/ Block diagram:-

 D.E. LAB WORKSHEET:-2.2

(Block diagram)

Figure: Schematic Diagram showing the functioning of Multiplexer

Simulation Results:
SIMULATION 1: WHEN A=0 AND TEMPERATURE SENSORSENSES
TEMPERATURE LESS THAN 250 C
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SIMULATION 2: WHEN A=0 AND TEMPERATURE SENSOR

SENSES TEMPERATURE MORE THAN 250 C

SIMULATION 3: WHEN A=1 AND PHOTORESISTOR

SENSES LIGHT LESS THAN THRESHOLD VALUE
 D.E. LAB WORKSHEET:-2.2
SIMULATION 4: WHEN A=1 AND PHOTORESISTOR
SENSES LIGHT MORE THAN THRESHOLD VALUE

Concept used
Photo resistor : The photo resistor gives one as output if it is given power and the it
detects light above a certain intensity.

Operational Amplifier: An operational amplifier is an integrated circuit that can

amplify weak electric signals.

Multiplexer
A multiplexer also known as a data selector, is a device that selects between
several analog or digital input signals and forwards the selected input to a single output
line. The selection is directed by a separate set of digital inputs known as select lines. A
multiplexer of 2n inputs has n select lines, which are used to select which input line to send to
the output.
The 2:1 MUX works such that when it forms SOP form of Y=I0*A+I1*A’.
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Learning/ observation
A data acquisition system is a collection of software and hardware that allows one to
measure or control physical characteristics of something in the real world. A complete
data acquisition system consists of DAQ hardware, sensors and actuators, signal
conditioning hardware, and a computer running DAQ software.

Working of the DAQ:

● A sensor, which is a type of transducer, is a device that converts a physical

property into a corresponding electrical signal.
● Signal conditioning may be necessary if the signal from the transducer is not
suitable for the DAQ hardware being used.
● After the signal is made suitable for use, it is sent the multiplexer which out of
the certain number of connected inputs selects the desired input and gives out
the single desired output which may be analog or digital.
● The analog output can be used if desired but if not then the output is further
processed under A/D Converter. For transmission purposes, single ended
analog signals, which are more susceptible to noise can be converted to
differential signals.
● Once digitized, the signal can be encoded to reduce and correct transmission
errors.
●

NOTE:
As the 2:1 MUX is not available on tinkercad software. The SOP form is used in
the circuit above.

Troubleshooting
● N.A.
● N.A.
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EXPERIMENT :-2.3

Name: Annie Garg Group: 503 (B)

SPARSH R.B. Subject Name:
20BCS5387
UID: 21BCS9452
DIGITAL ELECTRONICS

Aim:
Design a home appliance control system with 3-to-8 decoder.
Requirements:
(i) 74LS138 IC
(ii) 10K Ohms resistances
(iii)LED’s
(iv)+5V Power Supply
(v)Bread Board
(vi)Connecting Wires
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Circuit diagram/ Block diagram

74LS138 Decoder Pinout :
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Home Appliance System Design Using Decoder

Truth Table Of A Decoder

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Simulation Results:
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Concept used:
74LS138 is a member from ‘74xx’family of TTL logic gates.
The chip is designed for decoding or demultiplexing
applications and comes with 3 inputs to 8 outputs setup. The
design is also made for the chip to be used in high-
performance memory-decoding or data-routing applications,
requiring very short propagation delaytimes. In high
performance memory systems these decoders can be used to
minimize the effects of system decoding. The three enable
pins of chip (in which Two active-low and one active-high)
reduce the need for external gates or inverters when
expanding. The memory unit data exchange rate determines
the performance of any application and the delays of any kind
are not tolerable there. In such applications using 74LS138
line decoder is ideal because the delay times of this device are
less than the typical access time of the memory. This means
that the effective system delay introduced by the decoder is
negligible to affect the performance.
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Learning/ observation:
The outputs are connected to LED to show which output pin
goes LOW and do remember the outputs of the device are
inverted. We are using a single device so we will connect
G2A and G2B pin to ground followed by connecting G1 to
VCC to enable the chip. The three buttons here represent three
input lines for the device.
The enable pins needed to be connected appropriately or
irrespective of input lines all outputs will be high. After
connecting the enable pins use the input line to get the output.
After powering, if all buttons are not pressed Y0 will be LOW
and remaining output will be HIGH
After only B1 is pressed, A0=HIGH and Y1 will become
LOW while remaining will be HIGH. Following if only B2 is
pressed, A1=HIGH and Y2 will become LOW while
remaining will be HIGH. This way we can realize all the truth
table by toggling the three buttons B1, B2 and B3 (Three
inputs A0, A1 and A2) and with that we have three input to
eight output decoder.
Result:
Home appliance control system has been Designed and
Implemented using 3 to 8 Decoder.
Troubleshooting :
No problem occurs.
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Annie Garg
Student Name – SPARSH R.B.
20BCS5387
Student UID – 21BCS9452
Section/Group – 503-B
Branch – Computer Science and Engineering
Semester – 2nd

Experiment 3.1

Aim
Design a Shift Register Circuit using IC 74HC595.

Task to be done
Design a Shift Register Circuit using IC 74HC595 using Tinkercad.

Requirements
 74HC595
 LEDs
 220Ω resistors
 Arduino Uno R3
 Tinkercad Simulator.
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Circuit diagram/ Block diagram

Simulation Results:
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Concept used
In Serial in Parallel Out (SIPO) shift registers, the data is stored into the register
serially while it is retrieved from it in parallel-fashion. Figure 1 shows an n-bit
synchronous SIPO shift register sensitive to positive edge of the clock pulse.
Here the data word which is to be stored (Data in) is fed serially at the input of
the first flip-flop (D1 of FF1). It is also seen that the inputs of all other flip-flops
(except the first flip-flop FF1) are driven by the outputs of the preceding ones
like the input of FF2 is driven by the output of FF1. In this kind of shift register,
the data stored within the register is obtained as a parallel-output data word
(Data out) at the individual output pins of the flip-flops (Q1 to Qn).
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In general, the register contents are cleared by applying high on the clear pins of
all the flip-flops at the initial stage. After this, the first bit, B1 of the input data
word is fed at the D1 pin of FF1.This bit (B1) will enter into FF1, get stored and
thereby appears at its output Q1 on the appearance of first leading edge of the
clock. Further at the second clock pulse, the bit B1 right-shifts and gets stored
into FF2 while appearing at its output pin Q2 while a new bit, B2 enters into
FF1. Similarly, at each clock pulse the data within the register moves towards
right by a single bit while a new bit of the input word enters into the register.
Meanwhile one can extract the bits stored within the register in parallel-fashion
at the individual flip-flop outputs.

Analysing on the same grounds, one can note that the n-bit input data word is
obtained as an n-bit output data word from the shift register at the rising edge of
the nth clock pulse. This working of the shift-register can be summarized as in
Table I and the corresponding waveforms are given by figure 2.
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Learning/ observation

In the right-shift SIPO shift-register, data bits shift from left to right for each
clock pulse. However, if the data bits are made to shift from right to left in the
same design, one gets a left-shift SIPO shift-register as shown by figure 3.
Nevertheless, the basic working principle remains the same except the fact that
now Bn down to B1 is stored in Qn down to Q1 i.e., Q1 = B1, Q2 = B2 … Qn =
Bn at the nth clock pulse.

Troubleshooting
No Troubleshooting
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LAB WORKSHEET
Student Name: SPARSH R.B.
Annie Garg
Section & Group: ON21BCS503-(B)
UID:21BCS9452
20BCS5387
Subject: Digital Electronics

Experiment 3.2
 Aim: Design a light based object counter with 7-segment display (CD4026).

 Apparatus:

LDR
CD4026 IC
7-segment display
5V Power Supply
Breadboard
Connecting wires
Windows 10 PC

 Circuit Diagram:
  Working:

Object counters or product counters are important applications used in industries,

shopping malls, etc. They count objects or products automatically and so reduce human
efforts. They are used at different places for different purposes and different usages.
They can be used as visitor counter, vehicle counter material/product counter etc.
Following are some of the examples where object counters are used.
 In LIFT to count and display number of persons inside the lift at a particular
given time
 In any big super market or shopping malls as a visitor counter, to keep track of
the number of visitors who have visited the Mall.
 On the conveyor belt in the industry to count number of objects passed
 In vehicle parking place to count and display number of vehicles inside the
parking lot
Thus the application areas are varied where object counters are used. The object
counter is made up of sensor, counter and display. Sensor senses any object that passes
in front of it and gives output pulse to the counter. Counter increments count by one
when it gets pulse input from sensor. Current count is displayed on any type of display
like the 7-segment or LCD display.

The light source from the torch is continually hit on the LDR if so the resistance of
LDR is too low and the voltage drop across LDR and ground is less than 0.6V. When
an object is passed
between the light beams, light will not hit on the LDR so the resistance of LDR
becomes high. We have V=I x R (Voltage = Current x Resistance) i.e., the resistance of
LDR is the high voltage across LDR become high. As soon as the object crosses the
light beam a LOW and HIGH voltage transition occurs, which is given to the Clock
(input) of CD4026 IC, it will start to count with the clock and display the count on 7-
segment display.

 Result:
The working object counter using LDR, CD4026 and 7-segment was verified on
simulation software, and implemented on breadboard

 Troubleshooting:
NON
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Annie Garg
Student Name: SPARSH R.B. Branch: CSE
20BCS5387
UID:21BCS9452 Section/Group:503-B
DateofPerformance:20/04/2022 Subject Name: Digital Electronics

Aim
Design traffic lights using D Flip Flop.

Requirements
555 timer IC (NE555), D flip flop IC (7474), 5V Power Supply,
Breadboard, Connecting wires, Tinker cad simulator.

Design:
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Circuit Diagram and Working:

Working:
Basically D flops follow the input when the clock is enable i.e. it take
enable as a positive edge trigger and remain in the previous state
when clock is disabled.
Initially
Input at flip flop 1 is 0.
Input at flip flop 2 is 0.
So if you code Q of first flip flop as Yellow led, Q' of second flip flop
as red led and Green led is coded to the combination Q' of first and Q
of the second. At the first positive edge trigger you give input as 0 to
flip flop 1 so the output is also 0 and the output at Q' which is 1 will
act as a positive edge trigger at flip flop 2 which will again give input
as 0 to Q of flip flop 2 so the output is also 0 and the output at Q' of
flip flop 2 which is 1 will turn ON the red led connected to it.
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After first positive edge:
Input at flip flop 1 is 1 (equal to Q' of flip flop 1)
Input at flip flop 2 is 1
At the second positive edge:
At flip flop 1 the input 1 is given to output Q which is connected to
yellow LED and Q' turns 0 giving the clock at flip flop 2 a 0, turning
the red led OFF.
After second positive edge
Input at flip flop 1 is 0 (equal to Q' of flip flop 1)
Input at flip flop 2 is 1
At the third positive edge at flip flop 1 the input which is 0 is given to
the output which is also made 0 and the output at Q' which is 1 will
act as a positive edge trigger at flip flop 2 which will again give input
as 1 to Q of flip flop 2. Now Q of flip flop 2 and Q' of flip flop 1
which are both at 1 will give 1 to the yellow LED turning it on.
And the loop will continue.
Now once led glows make sure that the next positive edge trigger will
come after the required time in other words change the frequency of
clock pulse according to your requirement (you can use 555 timer to
generate required clock pulse) so that LED will stays glowing and
after that particular time give 1 as Input at positive edge of the clock
the other LED glows and maintain the same clock frequency.

Schematic Representation:
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Simulation Results:

You can change frequency by using function generator.

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Concept used
When the clock is low, there is no change in the Q' terminal of the 1st
Flip Flop then the Amber light is off. With the clock pulses, the
Amber light of the Traffic Light turns on. When the clock is high, we
get the output inverse of the D Flip Flop.

Learning/ observation
The practical applications of D flip flop in designing traffic
lights is studied and implemented.
When you change the frequency you can see the different
output After changing the frequency you can see the LED is
blinking side by side first of all yellow LED is blink after that
red will blink and then green LED will blink.

Troubleshooting
I have not faced any problem during the execution of this
experiment.