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Module 3

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BECE101 – Basics Electronics

Module 3 : Transistors

Dr. Sridhar Chandrasekaran


Assistant Professor (Senior)
VIT University, Chennai
Topics in Module 3
Bipolar Junction Transistor (BJT) - Device structure and physical operation,
Concept of CB, CE and CC Configuration, Transistor as a Switch, - Metal-
Oxide Field Effect Transistor (MOSFET) - Device Structure, mode of
operation and Characteristics, MOSFET configurations (CS, CD, CG).

Weightage
Internals (3 assignments)
External (2- CAT, and FAT)
Midterm – Module 1 - 3
BJT
• Transistor – Transfer and resistance
– a signal applied at the low resistance input circuit will be transferred to
the high resistance output circuit
• Basic transistor principle
– Voltage between two terminals controls the current through the third
terminal
• Formed by sandwiching a layer of P-type or N-type material between two N-
type or P-type
• Bipolar junction transistor (BJT)
– Three separately doped regions, three-terminal device two pn junctions
– Current in the transistor is due to the flow of both electrons and holes
(bipolar)
6/12/24 3
Introduction

6/12/24 4
Structure of a Transistor
• Base region is much thinner compared to the
collector and emitter regions
• npn device
– p region between two n regions
• Doping level
– Emitter heavily doped
– Base lightly doped
– Collector intermediate
• The collector is physically the largest
• Transistor is like two back-to-back diodes
– Emitter-base diode (Emitter diode)
– Collector-base diode (collector diode)
– Each diode has a barrier potential of
approximately 0.7 V
6/12/24 5
Transistor Structures
• pnp bipolar transistor contains a thin n-region sandwiched between two
p-regions
• The three regions and their terminal connections are called the emitter,
base, and collector
• Operation of the device depends on the two pn junctions being in close
proximity
• Width of the base must be very narrow

6/12/24 6
Unbiased transistor
• Depletion layers Diode equivalent

6/12/24 7
Device Structure and Physical Operation

6/12/24 8
Biased Transistor
• Emitter
– Emit or inject its free electrons
into the base
• The lightly doped base
– Pass emitter-injected electrons
on to the collector
• The collector
– collects or gathers most of the
electrons from the base
• VBB forward-biases the emitter
diode If VBB is greater than the emitter-base barrier
• VCC reverse-biases the collector potential, emitter electrons will enter the base
diode
6/12/24 region 9
Biased Transistor
• The base is lightly doped and very thin
– Light doping => free electrons have a long lifetime in the base region
– Very thin base => free electrons have only a short distance to go to
reach the collector
– Almost all the emitter-injected electrons pass through the base to the
collector
• Once they are in the collector, they feel the attraction of the VCC
• Free electrons flow through RC until they reach the positive terminal of VCC
• Only a few free electrons will recombine with holes in the lightly doped
base
• Flow through the base resistor to the positive side of the VBB supply
6/12/24 10
Biased Transistor

6/12/24 11
Transistor Currents

Conventional flow Electron flow pnp currents

6/12/24 12
Transistor Currents
• Because the emitter is the source of the electrons, it has the largest
current
• Since most of the emitter electrons flow to the collector, the collector
current is almost as large as the emitter current
• The base current is very small by comparison, often less than 1 percent of
the collector current
• By KCL IE = IC + IB
• IC IE (IB << IC)

6/12/24 13
Mode of Operation
• Two pn junctions has four possible modes of operation, depending
on the bias condition of each pn junction
• Forward-active (active region)
– Base–emitter (B–E) junction is forward biased
– Base–collector (B–C) junction is reverse biased
– Transistor is used as an amplifying device
• Reverse active: B-E reverse biased and B-C forward biased
• Cut off: Both B-E and B-C reverse biased
• Saturation: Both B-E and B-C forward biased

6/12/24 14
npn bipolar transistor biased in the
forward-active mode
• Base–emitter junction forward biased
• Base–collector junction reverse biased
• B–E junction is forward biased, electrons from the emitter are injected
across the B–E junction into the base
• Creating an excess minority carrier concentration in the base

6/12/24 15
Minority carrier electron concentration
across the base region
• Electron concentration at the edge of B–C
junction is approximately zero (reverse biased)

• Base region is very narrow

• Injected electrons will not recombine with any


of the majority carrier holes in the base

• In this case, the electron distribution versus Minority carrier electron concentration
across the base region of an npn bipolar
distance through the base is a straight line transistor biased in the forward-active
mode
6/12/24 16
Transistor current
• Because of the large gradient in this concentration, electrons that
are injected, from the emitter region diffuse across the base
• And are swept across the B-C SCR by the electric field, and are
collected in the collector region creating the collector current
• If some carrier recombination does occur in the base, the electron
concentration will deviate from the ideal linear curve
• To minimize recombination effects, width of the neutral base region
must be small compared to the minority carrier diffusion length

6/12/24 17
Emitter Current

• Approximation of neglecting the (−1) term is usually valid since vBE


>> VT in most cases
• IEO, contains electrical parameters of the junction
• In addition is directly proportional to the active B–E cross-sectional
area
• Typical values of IEO are in the range of 10−12 to 10−16 A
• The conventional emitter current direction is out of the emitter
terminal

6/12/24 18
Collector Current
• The number of injected electrons reaching the collector is the major
component of collector current
• The number of electrons reaching the collector per unit time is
proportional to the number of electrons injected into the base
• The number of electrons injected into the base in turn is a function of B–E
voltage
• To a first approximation, collector current is proportional to exp(VBE/VT)
and is independent of the reverse-biased B–C voltage
• The collector current is controlled by the B–E voltage
• The current at one terminal (the collector) is controlled by the voltage
across the other two terminals
• This control is the basic transistor action
6/12/24 19
Common-base current gain
• The collector current is slightly smaller than the emitter
current
• The emitter and collector currents are related by iC = α iE
• Also relate the coefficients by IS = α IEO
• The parameter is called the common-base current gain
• Value is always slightly less than unity

6/12/24 20
Base Current
• B–E junction is forward biased, holes from the base are
injected across the B–E junction into the emitter
• They are not part of the transistor action since these holes do
not contribute to the collector current
• Instead, the flow of holes forms one component of the base
current
• This component is also an exponential function of the B–E
voltage, because of the forward-biased B–E junction

6/12/24 21
Base Current
• A few electrons recombine with majority carrier holes in the base
• The holes that are lost must be replaced through the base terminal
• The flow of such holes is a second component of the base current
and is known as recombination current
• Proportional to the number of electrons being injected from the
emitter, which in turn is an exponential function of the B–E voltage

• Total base current is the sum of the two components

6/12/24 22
Electron and hole currents in an npn bipolar
transistor biased in the forward active mode

6/12/24 23
Electron and hole currents in an npn bipolar
transistor biased in the forward active mode
• If the concentration of electrons in the n-type emitter is much
larger than the concentration of holes in the p-type base
– Then the number of electrons injected into the base will be much larger
than the number of holes injected into the emitter
• This means that the iB1 component of the base current will be much
smaller than the collector current
• In addition, if the base width is small, then the number of electrons
that recombine in the base will be small,
• And the iB2 component of the base current will also be much
smaller than the collector current
6/12/24 24
Common-Emitter Current Gain
• In the transistor, the rate of flow of electrons and the resulting collector
current are an exponential function of the B–E voltage
• The collector current and the base current are linearly related

• β is the common-emitter current gain


• Key parameter of the bipolar transistor
• Constant for any given transistor
• The value of is usually in the range of 50 < β < 300

6/12/24 25
Current Relationships
• BY treating bipolar transistor as a single node by Kirchhoff’s current law

• If the transistor is biased in the forward-active mode

iC = α iE

• if β = 100, then α = 0.99


6/12/24 26
β and α Relation

6/12/24 27
Summary of Transistor Operation
• First-order model of the operation of the npn bipolar transistor biased in the
forward-active region
• The forward-biased B–E voltage, vBE, causes an exponentially related flow of
electrons from the emitter into the base where they diffuse across the base
region and are collected in the collector region
• The collector current, iC , is independent of the B–C voltage as long as the B–
C junction is reverse biased
• The collector, then, behaves as an ideal current source
• The collector current is a fraction α of the emitter current,
• Base current is a fraction 1/β of the collector current
• If β >> 1, then α = 1 and iC= iE
6/12/24 28
Calculation of collector and emitter
currents
• Assume a common-emitter current gain of β = 150 and a base
current of iB = 15 μA. Also assume that the transistor is biased
in the forward-active mode.

iC = β iB = (150)(15μA) = 2.25mA
iE = (1 + β)iB = (151)(15μA) = 2.27mA
Common-base current gain α = β/(1 + β) = 0.9934

6/12/24 29
pnp Transistor: Forward-Active Mode
Operation
• Electron and hole currents in a pnp bipolar transistor biased in the
forward-active mode

• Emitter, base, and collector currents are proportional to evEB/VT


6/12/24 30
pnp Transistor: Forward-Active Mode
Operation
• B–E junction is forward biased
• p-type emitter is positive with respect to the n-type base
– Holes flow from the emitter into the base
– Holes diffuse across the base
– They are swept into the collector
– The collector current is a result of this flow of holes
• Since the B–E junction is forward biased, the emitter current is an
exponential function of the B–E voltage
• vEB is the voltage between the emitter and base
• Implies that the emitter is positive with respect to the base
• Assumed that −1 term in the ideal diode equation is negligible
6/12/24 31
Summary of the bipolar current–voltage
relationships in the active region

6/12/24 32
Voltage Polarity and Current Flow in
Transistor Biased in Active Mode

6/12/24 33
Majority and minority carrier flow of a pnp
transistor

6/12/24 34
Common-Emitter circuits
• (a) with an npn transistor (b) with a pnp transistor

• Common or ground side of each voltage source is connected to the emitter


• The circuit has two loops. The left loop is the base loop, and the right loop is
the collector loop
• VBB forward-biases the emitter diode with RB as a current-limiting resistance
• By changing VBB or RB one can change the base current
6/12/24 35
Common-emitter (CE) circuits
• Changing the base current will change the collector current
• The base current controls the collector current
• Small current (base) controls a large current (collector)
• VBB and VCC base and collector voltage source
• VBE and VCE => the voltage between the two points
• VB => voltage between the base and ground

6/12/24 36
Input Characteristics (Base Curve)
• Looks like the graph of an ordinary diode
• This is a forward-biased emitter diode
• Usual diode graph of current versus voltage

6/12/24 37
Output characteristics (Collector curve)
• VCE small
• VCE = VCB + VBE
• VCB = VCE – VBE
• VCB ≈ - VBE => VC < VB (C-B Junction(diode) forward biased)
• Saturation region (IC increases with VCE)

6/12/24 38
Output characteristics (Collector curve)
• VCE is a few tenths of a volt
– The collector current becomes almost constant
– Collector diode becomes reverse biased (Active region)
– Further increases in VCE cannot increase the collector current
– Because the collector can collect only those free electrons that the emitter
injects into the base
– The number of these injected electrons depends only on the base circuit, not
on the collector circuit
• VCE is greater than 40 V (Breakdown region)
– Collector diode breaks down
– Normal transistor action is lost
– Collector-emitter breakdown voltage VCE(max)
6/12/24 39
Regions of Operation
• Active region
– Horizontal part of the curve (region in the middle 1 < VCE 40 V)
– Represents the normal operation of a transistor
– Emitter diode is forward biased and the collector diode is reverse
biased
– Collector is gathering almost all the electrons that the emitter has sent
into the base
– Changes in collector voltage have no effect on the collector current
– Transistors operate in the active region when they are used to amplify
weak signals
– Also called linear region because changes in the input signal produce
proportional changes in the output signal
6/12/24 40
Regions of Operation
• Breakdown region
– The transistor should never operate in this region because it will be
destroyed
• Cut off region
– Collector diode has reverse minority-carrier current and surface-
leakage current
• Saturation region
– VCE is between 0 V and a few tenths of a volt. Early rising part of the
curve
– In this region, the collector diode has insufficient positive voltage to
collect all the free electrons injected into the base
– IB is larger than normal (Current gain βdc is smaller than normal)
6/12/24 41
Collector Curves, Voltage and Power
• Apply KVL around collector loop
– VCC = ICRC + VCE
– VCE = VCC – ICRC
• Power dissipation in transistor
– PD = VCE IC

6/12/24 42
6/12/24 43
Load Line
• Plot of IC and VCE for every possible IB value
• Visual summary of all possible transistor operating points
• Biasing the transistor
– In order for a transistor to function as an amplifier or a switch, proper
dc circuit conditions must be set
• Base bias circuit (setting up a fixed value of base current)
if RB = 1 MΩ, If βdc = 100; IC ≈ 1.43 mA and
IB = 14.3 μ A VCE = VCC–IC RC = 15-1.43m x 3k = 10.7 V
(second Quiescent (Q point)
IC ≈ 1.43 mA & VCE = 10.7 V
approximation)

6/12/24 44
Load Line & Saturation point
• VCE = VCC – IC RC

Saturation point
• Point where the load line intersects the
saturation region of the collector curves
• Saturation point tells you the maximum possible collector current for the circuit
• Transistor goes into saturation when the collector current is approximately 5 mA
• At this current, VCE has decreased to approximately zero
• When a transistor is saturated, further increases in base current produce no further
increases in collector current
6/12/24 45
Load line & Cut off Point

A transistor is cut off when its


collector current is zero.
cutoff point tells you the
maximum possible collector-
6/12/24 emitter voltage for the circuit.
46
Saturation current and Cutoff voltage

6/12/24 47
Operating Point

assuming an ideal transistor


QL when β=50
assume β=100 QH when β=150
6/12/24 48
Determining Transistor’s Operating Region
• Assume that the transistor has a breakdown voltage greater than 20 V
– Transistor is not operating in the breakdown region
• Transistor is not operating in the cutoff region because of the biasing
voltages
• Transistor is operating in the active region or the saturation region ?

6/12/24 49
Determining Transistor’s Operating Region
• 1. Assume that the transistor is operating in the active region.
• 2. Carry out the calculations for currents and voltages.
• 3. If an impossible result (transistor is saturated) occurs in any calculation, the
assumption is false

• Saturation-Current Method

• IB = 0.1 mA
• Ic = 50x0.1 m = 5 mA (> IC(Sat) impossible)
• Transistor cannot be operating in the active region; it must be operating in the
saturation region

6/12/24 50
Determining Transistor’s Operating Region
• Collector-Voltage Method

– Impossible because VCE cannot be negative in active region


– So the transistor must be operating in the saturation region
• Less current gain in saturation region
– Given the current gain, it is usually for the active region
– β=50 => that the collector current will be 50 times the base current,
provided the transistor is operating in the active region
– When a transistor is saturated, the current gain is less than the current
gain in the active region

6/12/24 51
Transistor as a Switch
• RB = 10 kΩ ; IB = 1 mA; IC = βIB = 50 x 1 m = 50 mA;
• VCE = VCC-ICRC = 10-50 m x 1 k= 10-50 = - 40 V (Saturation)
• Q point is at the upper end of the load line
Switch open
IB = 0; IC = βIB =0 => VCE = VCC
Q point is at the lower end of the load line

6/12/24 52
Digital Circuits
• The circuit can have only two output voltages: 0 or +10 V
• Has only two output levels: low or high
• The exact values of the two output voltages are not important
• Often called switching circuits
– Q point switches between two points on the load line
– In most designs, the two points are saturation and cutoff.
• Two state circuits, referring to the low and high output

6/12/24 53
Numerical Example
• The collector supply voltage is decreased to 5 V. What are the two values of
the output voltage? If the saturation voltage VCE(sat) is 0.15 V and the collector
leakage current ICEO is 50 nA, what are the two values of the output voltage?

• VCE = VCC-ICRC = 5 - 50 m x 1 k= 5 - 50 = - 45 V (Saturation)


Switch open
• VCE = VCC – ICEO x RC = 5 – 50 n x 1 k = 5-50 μ = 4.99995 ≈ 5 V

• In switching circuits, all you need is two distinct voltages: one low and the
other high
• It doesn’t matter whether the low voltage is 0, 0.1, 0.15 V, and so on and the
high voltage is 5, 4.9, or 4.5 V

6/12/24 54
Device Structure
• The basic MOS capacitor structure

(a) A parallel-plate capacitor, showing the electric field and conductor charges
(b) a corresponding MOS capacitor with a negative gate bias, showing the electric
field and charge flow
6/12/24
Physical operation

Effect of positive gate bias, electric field and charge flow

MOS capacitor with an induced space charge MOS capacitor with an induced space-charge region and
region due to a moderate positive gate bias electron inversion layer due to a larger positive gate bias
6/12/24
Modes of operation
• Accumulation

• Depletion

6/12/24
Modes of operation
• Inversion

• Threshold voltages depends on the thickness of the insulator,


doping concentration of substrate and non idealities

6/12/24
Threshold Voltage (VT)
• Applied gate voltage needed to create an inversion charge
• Gate voltage required to “turn on” the transistor
• For the n-channel enhancement-mode MOSFET, the threshold voltage is
positive
• Positive gate voltage is required to create the inversion charge
• If the gate voltage is less than VT , the current in the device is essentially
zero
• If the gate voltage is greater than VT , a drain-to-source current is
generated as the drain-to-source voltage is applied
• The gate and drain voltages are measured with respect to the source

6/12/24
Types of MOSFET
• Based on the structure
– nMOS (n channel MOSFET) Current conduction is by electron
– pMOS (p-channel MOSFET) Movement of holes constitute
current

• Based on the operation mode


– Enhancement mode MOSFET
– Depletion mode MOSFET

6/12/24
Types of MOSFET
• Enhancement mode MOSFET
• Normally OFF devices
• Channel is not doped
• Application of gate voltages turn ON the devices
• Used in low power applications
• Depletion mode MOSFET
• Normally ON devices
• Channel is doped
• Application of gate voltages turn the devices OFF

6/12/24
MOSFET Circuit Symbol and
Cross section

6/12/24
Enhancement-mode MOSFET

6/12/24
Depletion-Mode MOSFET

6/12/24
Modes of operation
Regions of Operation

Cut-off

Ohmic or Linear Saturation


Electrical behavior ID-VGS

I DS
VDS

VGS

Ø Current zero for negative gate voltage


Ø Current in transistor is very low until
the gate voltage crosses the threshold
voltage of device (same threshold
voltage as MOS capacitor)
Ø Current increases rapidly at first and
then it finally reaches a point where it
simply increases linearly
Electrical behavior ID-VDS

I DS
VDS

VGS

Ø For low values of drain voltage, the


device is like a resistor
Ø As the voltage is increases, the
resistance behaves non-linearly and
the rate of increase of current slows
Ø Eventually the current stops growing
and remains essentially constant
(current source)
6/12/24
Ideal MOSFET Current–Voltage
Characteristics—NMOS Device
• VGS < VTN
• No electron inversion layer, the drain-to-substrate pn junction
is reverse biased
• Drain current is zero (neglecting pn junction leakage currents)

6/12/24
Current–Voltage Characteristics
• VGS > VTN
• An electron inversion layer is created
• When a small drain voltage is applied, electrons in the inversion
layer flow from the source to the positive drain terminal
• The conventional current enters the drain terminal and leaves the
source terminal

6/12/24
Current–Voltage Characteristics

• Cross section and iD versus vDS curve for an n-channel


enhancement-mode MOSFET when vGS > VTN and for small VDS
value

6/12/24
Cross section and iD versus vDS curve for an n-channel
enhancement-mode MOSFET when and vGS > VTN and larger VDS
value but VDS < VDS(sat)
• As the drain voltage increases, the voltage
drop across the oxide near the drain
terminal decreases
• Induced inversion charge density near the
drain also decreases
• The incremental conductance of the
channel at the drain then decreases
• Slope of the iD versus vDS curve to decrease

6/12/24
Cross section and iD versus vDS curve for an n-channel
enhancement-mode MOSFET when vGS > VTN and larger VDS value
but VDS >= VDS(sat)

(d) vDS > vDS(sat)


6/12/24 (c) vDS = vDS(sat)
Current–Voltage Characteristics when vGS >
VTN and larger VDS value but VDS >= VDS(sat)
• As vDS increases to the point where the potential difference,
vGS − vDS, across the oxide at the drain terminal is less than
VTN
• The induced inversion charge density at the drain terminal is
zero
• For this condition, the incremental channel conductance at
the drain is zero, => the slope of the iD versus vDS curve is zero

6/12/24
iD versus vDS curves for an n-channel
Enhancement-mode MOSFET

6/12/24
Current–Voltage Characteristics
• In the saturation region, since the ideal drain current is independent
of the drain-to source voltage, the incremental or small-signal
resistance is infinite

• Kn is sometimes called the trans conduction parameter for the n-


channel device
• Normally, kn is considered to be a constant for a given fabrication
technology

• Kn’ = μnCox and is called the process conduction parameter.


6/12/24
Three regions of operations of
MOSFET
• Cut off (Vgs < Vt and Vds ≤ Vgs-Vt)
– No channel is formed => Ids = 0
– Sub-threshold region

6/12/24
Regions of operations Cont’d
• Linear Region (Vgs > Vt and 0 ≤ Vds ≤ Vgs-
Vt )
– Channel is formed and it is uniform
– Ids increases with Vds
– Non saturation region

6/12/24
Regions of operations Contd…
• Saturation Region (Vgs > Vt and Vds >= Vgs – Vt)
– Vgd < Vt
– Channel is pinched off near the drain end
– Ids independent of Vds

6/12/24
Current Voltage characteristics

nMOSFET Enhancement pMOSFET enhancement


6/12/24
MOS Transistor Bias Modes

6/12/24
Current Equations

Where VGT = Vgs – Vt

Gain factor

6/12/24
Electrical behavior ID-VDS

BECE303L, Dr. C. Sridhar Lecturer Note Page 84


Example 2
• An NMOS transistor with VTN = 1 V has a drain current iD = 0.8
mA when vGS = 3V and vDS = 4.5V.
Calculate the drain current when:
(a) vGS = 2 V, vDS = 4.5 V; and
(b) vGS = 3 V, vDS = 1 V.

6/12/24
Solution

6/12/24
6/12/24
6/12/24
References
• Ch 2.1, Donald A Neamen, Microelectronics: Circuit Analysis
and Design / Edition 4, 2010.
• A. P. Malvino, D. J. Bates, Electronic Principles, 2017, 7/e, Tata
McGraw-Hill
• Donald A Neamen, Microelectronics: Circuit Analysis and
Design / Edition 4, 2010.
• Jan M. Rabaey, Anantha Chadrakasan, BorivojeNikolic, “Digital
Integrated Circuits: A Design Perspective”, 2014, Third Edition,
Prentice Hall India, New Jersey, US
6/12/24 89

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