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Oct - 2022

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8 views

Oct - 2022

Uploaded by

jayus24270
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Total No. of Questions : 4] SEAT No.

8
23
PA-26 [Total No. of Pages : 1

ic-
[5931] - 36

tat
6s
S.E. (Information Technology)

6:2
LOGIC DESIGN & COMPUTER ORGANIZATION

02 91
0:4
(2019 Pattern) (Semester - I) (214442)

0
31
Time : 1 Hour]
7/0 13 [Max. Marks : 30
0
1/2
Instructions to the candidates :
.23 GP

1) Attempt Q.1 or Q.2 and Q.3 or Q.4.


2) Figures to the right indicate full marks.
E
81

8
C

23
ic-
Q1) a) List and explain the characteristics of CMOS.
16

[7]

tat
8.2

b) Perform following operations using unsigned binary format

6s
[8]
.24

6:2
i) 1011 + 1100
91
49

0:4
ii) 1011 – 0110
30
31

OR
01
02

Q2) a) Design 4-bit binary to gray code convertor. [7]


1/2
GP

b) Simplify f (A, B, C, D) =  m (0, 2, 5, 6, 7, 8, 10, 13, 14, 15) using


7/0

k-map and draw it’s logic diagram. [8]


CE
81

8
23
.23

Q3) a) Design Full Subtractor using basic gates.


ic-
[7]
16

tat
b) Differentiate multiplexor & Demultiplexor. [8]
8.2

6s

OR
.24

6:2

Q4) a) Design BCD adder using binary adder IC 7483.


91

[7]
49

0:4

b) Implement following using IC 74138 Decoder [8]


30
31

y0 (A, B, C) =  m (0, 3, 4)
01
02

y1 (A, B, C) =  m (0, 1, 7)
1/2
GP
7/0

y2 (A, B, C) =  m (0, 5, 6)
CE
81

y3 (A, B, C) =  m (1, 4, 7)
.23
16


8.2
.24
49

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