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2018 TCASI I. Galton Understanding Phase Error and Jitter Definitions Implications Simulations and Measurement

Abstract: Precision oscillators are ubiquitous in modern electronic systems, and their accuracy often limits the performance of such systems. Hence, a deep understanding of how oscillator performance is quantified, simulated, and measured, and how it affects the system performance is essential for designers. Unfortunately, the necessary information is spread thinly across the published literature and textbooks with widely varying notations and some critical disconnects. This paper addresses this

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Xiaodong Liu
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29 views

2018 TCASI I. Galton Understanding Phase Error and Jitter Definitions Implications Simulations and Measurement

Abstract: Precision oscillators are ubiquitous in modern electronic systems, and their accuracy often limits the performance of such systems. Hence, a deep understanding of how oscillator performance is quantified, simulated, and measured, and how it affects the system performance is essential for designers. Unfortunately, the necessary information is spread thinly across the published literature and textbooks with widely varying notations and some critical disconnects. This paper addresses this

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Xiaodong Liu
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© © All Rights Reserved
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS 1

Understanding Phase Error and Jitter: Definitions,


Implications, Simulations, and Measurement
Ian Galton , Fellow, IEEE, and Colin Weltin-Wu, Member, IEEE
(Invited Paper)

Abstract— Precision oscillators are ubiquitous in modern elec- multiplication by a sinusoidal oscillator signal whereas most
tronic systems, and their accuracy often limits the performance practical mixer circuits perform multiplication by squared-up
of such systems. Hence, a deep understanding of how oscillator oscillator signals. Fundamental questions typically are left
performance is quantified, simulated, and measured, and how unanswered such as: How does the squaring-up process change
it affects the system performance is essential for designers. the oscillator error? How does multiplying by a squared-up
Unfortunately, the necessary information is spread thinly across
the published literature and textbooks with widely varying
oscillator signal instead of a sinusoidal signal change a mixer’s
notations and some critical disconnects. This paper addresses this behavior and response to oscillator error?
problem by presenting a comprehensive one-stop explanation of Another obstacle to learning the material is that there are
how oscillator error is quantified, simulated, and measured in three distinct oscillator error metrics in common use: phase
practice, and the effects of oscillator error in typical oscillator error, jitter, and frequency stability. Each metric offers advan-
applications. tages in certain applications, so it is important to understand
Index Terms— Oscillator phase error, phase noise, jitter, how they relate to each other, yet with the exception of [1],
frequency stability, Allan variance, frequency synthesizer, crystal, the authors are not aware of prior publications that provide
phase-locked loop (PLL). this information directly.
The goal of this tutorial is to comprehensively and sys-
tematically present this information. There are many publica-
I. I NTRODUCTION tions that describe and model the circuit-level mechanisms of

E LECTRONIC oscillators are in nearly all electronic


devices. They make it possible to modulate and demod-
ulate wireless signals, clock both digital and sampled-data
oscillator error, e.g., [2]–[9], so this material is not covered
here. Instead, the paper describes how to evaluate, simulate,
and measure oscillator error, and the system-level effects of
analog circuits, and measure time intervals. Moreover, they are oscillator error in typical circuit applications.
astonishingly precise. For example, present-day mobile tele-
phone transceivers incorporate several highly-tunable multi-
GHz oscillators whose output signals have integrated jitter of II. P HASE E RROR
less than a few hundred femtoseconds. Nevertheless, oscillator A. Sinusoidal Oscillator Signal Model
precision is often a limiting factor in high-performance appli-
Oscillator accuracy is critical in so many electronics applica-
cations such as modern wireless and wireline communications,
tions that the recommended quantities with which to quantify
radar, and high-speed digital circuits. Accordingly, it is critical
it have been specified in an IEEE standard [10]. As with most
for engineers to understand how oscillator performance is
other papers and textbooks that touch on the subject, the IEEE
quantified, simulated, and measured, and how oscillator error
standard starts from the premise that an ideal oscillator is
affects application performance.
purely sinusoidal. It expresses the instantaneous output of a
Unfortunately, acquiring this knowledge is not easy. The
non-ideal oscillator as
information is spread thinly across the published literature,
and there are fundamental disconnects between much of the v(t) = [V0 + ε(t)] sin (ω0 t + φ(t)) , (1)
published information and actual practice. One disconnect
is that most textbooks and papers define oscillator error where V0 is the nominal peak amplitude, ε(t) is the amplitude
in terms of sinusoidal oscillator signals, but most practical error, ω0 is the nominal frequency, and φ(t) is the phase
circuits use squared-up versions of such oscillator signals error. The amplitude error represents the oscillator’s deviation
that approximate square waves. A related disconnect is that from the nominal amplitude, and the phase error represents the
most communication textbooks define a mixer as performing oscillator’s deviation from the ideal phase, ω0 t. It is assumed
that |ε(t)| < V0 for all t and ω0 t + φ(t) monotonically
Manuscript received March 6, 2018; revised May 16, 2018 and increases with t, which are reasonable assumptions given
June 14, 2018; accepted July 10, 2018. This work was supported by the
National Science Foundation under Grant 1617545. This paper was recom- that the purpose of the model is to characterize precision
mended by Associate Editor E. Blokhina. (Corresponding author: Ian Galton.) oscillators.
I. Galton is with the University of California at San Diego, La Jolla, The oscillator signal’s zero-crossing times, i.e., the values of
CA 92093 USA (e-mail: [email protected]). t for which v(t) = 0, are of particular importance. Throughout
C. Weltin-Wu is with Analog Devices, Inc., San Jose, CA 95134 USA.
Color versions of one or more of the figures in this paper are available
this paper, the zero-crossing times are denoted as tn and
online at http://ieeexplore.ieee.org. ordered such that tn > tn−1 for all integers n, so tn is an
Digital Object Identifier 10.1109/TCSI.2018.2856247 increasing sequence that comprises all values of t at which
1549-8328 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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2 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

v(t) = 0. It follows from (1) and the |ε(t)| < V0 assumption


that, for each integer n,
φ(tn ) = πn − ω0 tn . (2)
Samples of the phase error at the zero-crossing times,
i.e., φ(tn ) for every integer n, can be measured directly from
v(t) by substituting the nth time at which v(t) crosses zero
into (2). In this sense, the φ(tn ) values are uniquely determined
by v(t).
However, φ(t) is not uniquely determined by v(t) for values Fig. 1. Superimposed squared-up oscillator signals with and without
amplitude noise.
of t that are not zero-crossing times, because at such times
there are an infinite number of ε(t) and φ(t) functions that
yield the same value of v(t). This can be verified by observing the squared-up oscillator signal are generally different from
that whenever t = tn , the right side of (1) can be written as those associated with the sinusoidal oscillator signal. However,
[V0 + ε1 (t)] sin(ω0 t + φ1 (t)), where to the extent that the amplifying and clipping circuitry has
negligible noise and input offset voltage, the zero-crossing
sin (ω0 t + φ(t)) times, tn , and the phase error sampled at the zero-crossing
ε1 (t) = [V0 + ε(t)] − V0 (3)
sin (ω0 t + φ1 (t)) times, φ(tn ), are not altered by the squaring up process.
It is convenient to rewrite the squared-up oscillator signal
and φ1 (t) is any function for which ω0 t + φ1 (t) is not an model as
integer multiple of π.
Furthermore, ε(t) is not uniquely determined by v(t) for v(t) = V0r (ω0 t + φ(t)) + e(t), (6)
any value of t. This follows directly from the argument above
for each t that is not a zero-crossing time. For each t that is a which is equivalent to (4) when e(t) = ε(t)r (ω0 t + φ(t)) but
zero-crossing time, it follows because the sine function in (1) emphasizes that ε(t) can be viewed as a type of additive error.
evaluates to zero, so ε(t) can take on any value. Practical oscillator circuits typically introduce other types of
These ambiguities generally make it impossible to separate additive error as well, and error introduced by the circuits they
the effects of φ(t) from those of ε(t) on the performance of drive often can be modeled as input-referred error added to the
a circuit driven by v(t). Yet it is often the case in practice oscillator signal. Therefore, e(t) is more realistically modelled
that the effects of ε(t) on circuits driven by oscillators are as e(t) = ε(t)r (ω0 t + φ(t)) + ea (t), where ea (t) is all additive
negligible compared to those of φ(t). One reason is that the error other than ε(t)r (ω0 t + φ(t)).
mean squared value of ε(t) is often very small for practical To the extent that r (θ ) approximates (5), v(t) is only near
oscillators. Another reason is that typical circuits driven by zero at its zero-crossing times, a consequence of which is that
oscillators only change state when v(t) is relatively close to e(t) only has a significant effect on the oscillator signal when
zero where the magnitude of the sinusoid in (1) is small, so it the magnitude of v(t) is large. This phenomenon is illustrated
attenuates the effect of ε(t). In such cases, φ(t) represents the in Fig. 1, wherein the oscillator signal was generated by (6)
oscillator’s only significant non-ideal behavior, so the above- with an r (θ ) that well-approximates (5). Two versions of the
mentioned ambiguities are avoided. waveform are superimposed: an ideal version in which e(t)
is zero, and a non-ideal version in which e(t) is a noise
waveform. The two waveforms are nearly identical except
B. Squared-Up Oscillator Signal Model when their magnitudes are much greater than zero. If such
Oscillator signals that switch as abruptly as possible an oscillator signal drives a circuit that is insensitive to the
between ±V0 at each zero-crossing are often used instead oscillator signal when its magnitude is far from zero, e(t) has
of the sinusoidal oscillator signal given by (1). Such oscil- little effect on the circuit’s behavior.
lator signals are sometimes generated by amplifying and The common practice of using squared-up oscillator signals
clipping sinusoidal oscillator signals, so they are often called to drive such circuits renders even relatively strong amplitude
squared-up oscillator signals. Squared-up oscillator signals are and additive error negligible in terms of circuit performance.
widely used in practice, because, as described shortly, they Nevertheless, as described in Sections VI and VII, care must be
offer practical benefits when used to drive circuits that are only taken to prevent e(t) from corrupting phase error simulations
sensitive to the oscillator signals near their zero-crossings. and laboratory measurements.
In analogy with (1), a squared-up oscillator signal can be Unlike e(t), phase error cannot be neglected in practical
modelled as circuits. However, as explained shortly, it is not the phase
error waveform itself, but the phase error sampled at times
v(t) = [V0 + ε(t)] r (ω0 t + φ(t)) , (4) tn , i.e., φ(tn ), that matters, and this sampling process leads to
where r (θ ) is a 2π-periodic function which is as close as several practical issues because of aliasing.
possible to a unit square wave given by
⎧ C. Reconciliation of the Two Oscillator Signal Models
⎨1, if sin (θ ) > 0,
rideal (θ ) = 0, if sin (θ ) = 0, (5) For the reasons described above, it is neither common, nor
⎩ desirable in many cases, for oscillator signals to be sinusoidal
−1, if sin (θ ) < 0.
in practical circuits. Yet the official IEEE definition and most
Thus, φ(tn ) is still given by (2). In cases where the squared- communication system textbooks describe oscillator signals as
up oscillator signal is obtained by amplifying and clipping a sinusoidal. As shown in this subsection, these two viewpoints
sinusoidal oscillator signal, the φ(t) and ε(t) associated with can be reconciled to an extent by observing that the sinusoidal
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 3

Fig. 3. Communication system textbook version of a mixer with the addition


of oscillator phase and amplitude error.

signal model in the absence of amplitude error except for a


Fig. 2. Power spectrum of the first three terms of the squared-up oscillator
signal given by (8). scale factor of 4/π.†
This behavioral equivalence between sinusoidal and
squared-up oscillator signals in mixers provides some rationale
and squared-up oscillator signal models often have nearly for the persistence of the sinusoidal oscillator signal model
equivalent spectra for frequencies from 0 to well above ω0 . despite the widespread use of squared-up oscillator signals.
Given that r (θ ) in (6) is a 2π-periodic real function, it can Mixers are of great importance in communication systems so
be expressed as a Fourier series. Substituting the Fourier series they are taught early at the undergraduate level, and it is easier
representation of r (θ ) into (6) yields to explain the basic operation of communication system text-

book style mixers with sinusoidal oscillator signals than with
 squared-up oscillator signals. Mixers of one type or another
v(t) = V0 ρn sin (nω0 t + nφ(t) + θn ) + e(t), (7)
have been in use for over a century [13], [14], and for the first
n=0
several decades they were the primary application of oscilla-
where ρn and θn are constants that depend on the Fourier tors. Moreover, early mixers did approximate multiplication
series coefficients. For the case where r (θ ) = rideal (θ ), (7) by sinusoidal oscillator signals, and this remains so in very
reduces to high-frequency (e.g., millimeter wave) applications wherein
parasitic capacitances and other electronic device nonidealities

 make squared-up oscillator signals impractical.
4 1
v(t) = V0 sin (nω0 t + nφ(t)) + e(t). (8) Nevertheless, as described in more detail below, the ratio-
π n nale breaks down somewhat with typical present-day mixers.
n=1,3,5,...
Furthermore, in other oscillator applications, such as sampling
Except for the 4/π constant scale factor, the n = 1 term of (8) and clocking, the sinusoidal oscillator model is not particularly
is identical to the right side of (1) in the absence of amplitude useful. These applications use the zero-crossing times of
error. The remaining terms are therefore the only significant oscillator signals to initiate specific events, so there is no
differences between the sinusoidal and squared-up oscillator benefit to thinking of the oscillator signals as being sinusoidal
signal models in this case. in such cases.
The nth term of (8) for n > 1 is a sinusoid with phase
modulation nφ(t), so Carson’s rule suggests that its bandwidth
D. Circuit Applications of Oscillators
is approximately n times larger than that of the first term [11].
However, the power spectrum of the nth term is centered This subsection describes the types of analog and mixed-
n times further away from zero than that of the first term. signal circuits commonly driven by oscillators. A comprehen-
Furthermore, its power is 1/n 2 times that of the first term. sive description of this subject could easily fill a textbook,
Consequently, it is reasonable to expect that the terms in (8) for so it is far beyond the scope of this paper. Instead, the goal
n > 1 are negligible at frequencies from 0 to well above ω0 , is to provide qualitative descriptions that explain the practical
as illustrated conceptually in Fig. 2. reasons which underlie the statements made above regarding
This phenomenon is particularly relevant to frequency trans- squared-up oscillator signals and why the circuits driven by
lation via mixers in communication systems. The classic them usually are insensitive to e(t).
communication system textbook definition of a mixer is a 1) Mixers: As described in Section II-C, communication
circuit that multiplies an input signal by a sinusoidal oscillator system textbooks describe mixers as ideal multipliers followed
signal and filters the result. An example of such a mixer by filters. In contrast, circuit design textbooks typically con-
that translates the center frequency of a bandpass signal from sider just the multiplier to be the mixer. Filtering is always
a non-zero frequency, ω1 , to another non-zero frequency, performed following the multiplier, but it is not considered by
ω1 – ω0 , is shown in Fig. 3. most circuit designers to be part of the mixing operation.
In most practical situations, the sinusoidal oscillator signal Practical mixers do not implement true multiplication.
in the communication system textbook version of a mixer Instead, as depicted in Fig. 4 a practical mixer usually can
could be replaced by a squared-up oscillator signal without be modelled as a device that multiplies the input signal,
significantly changing the output of the mixer. For example, x(t), by a strongly nonlinearly distorted and limited version
consider the mixer of Fig. 3 except with the sinusoidal of the oscillator signal, i.e., f (v(t)). The nonlinearity, f (v),
oscillator signal replaced by a squared-up oscillator signal. It is is monotonic and is limited in the sense that f (v) ∼ = 1 when
straightforward to verify that each of the n > 1 terms in (8) v > Vs+ and f (v) ∼ = −1 when v < Vs− , where Vs+ and Vs−
contribute signal components that lie outside the passband of
† An exception occurs if the mixer input has unwanted signal components
the filter provided the bandwidths of the mixer’s input signal
at ω1 – kω0 , for any k = 3, 5, . . ., in which case the unwanted components
and bandpass filter are sufficiently narrow. In this case, only corrupt the desired component in the mixer’s output. A harmonic rejection
the n = 1 term in (8) significantly affects the output of the mixer that consists of multiple conventional mixers with squared-up oscillator
mixer, and this term is identical to the sinusoidal oscillator signals of different phases can be used to avoid this problem if necessary [12].
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4 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

Fig. 6. Simplified diagram of an ADC’s sampling circuit.

of the V /I converter causes the mixer’s behavior to be fairly


insensitive to non-zero transistor on-resistance. In this context,
Vs− and Vs+ are voltage levels such that v(t) < Vs− and
v(t) > Vs+ are the ranges of v(t) over which the on-resistance
Fig. 4. Model of a practical mixer with an example that demonstrates how
f (v) suppresses the squared-up oscillator signal’s e(t) error. of the transistors is sufficiently low to negligibly affect mixer
performance. By design, the value of V B I AS is chosen to
cause Vs− ∼ = −Vs+ and V0 is chosen large enough to ensure
V0 + e(t) > Vs+ and −V0 + e(t) < Vs− for all t, so the mixer
is insensitive to e(t) for the reasons described above.
2) Oscillators as Clocks in Non-Mixer Applications:
In most other applications, the oscillator signal is used as a
clock to mark a set of times, τn for n = . . . , −1, 0, 1, 2, …,
that are as close to being uniformly spaced as possible.
The zero-crossing times of a squared-up oscillator are ideal
Fig. 5. Simplified diagram of a passive mixer circuit. for this purpose. Typically, only the positive-going zero-
crossings or only the negative-going zero-crossings are used to
denote the approximate values of v where f (v) saturates at mark τn in any given application, so the oscillator signal’s duty
1 and −1, respectively. The limiting causes the mixer to be cycle can deviate from 50% without causing timing errors.
nearly insensitive to v(t) when v(t) < Vs− or v(t) > Vs+ . In the following, without loss of generality τn is taken to be the
Suppose v(t) is the squared-up oscillator signal given by (6) nth positive-going zero-crossing time of the oscillator signal.
with an r (θ ) that well-approximates rideal (θ ), and V0 is large Ideally, τn = nT0 , where T0 = 2π/ω0 is the oscillator
enough that V0 +e(t) > Vs+ and −V0 +e(t) < Vs− . In this case signal’s nominal period, but oscillator phase error causes
v(t) is nearly independent of e(t) when Vs− < v(t) < Vs+ deviations from this ideal. It follows from (2) that τn = t2n =
for the reasons described in Section II-B. While v(t) does [2πn − φ(t2n )]/ω0 . This can be rewritten as
depend on e(t) when v(t) < Vs− or v(t) > Vs+ , these
are the regions over which the mixer is insensitive to v(t). φ (τn )
τn = nT0 + τn , where τn = − . (10)
Consequently, the mixer output is insensitive to e(t) for all ω0
values of v(t). Given that the oscillator signal is only in the Thus, τn is the deviation of τn from its ideal value of nT0 ,
range Vs− < v(t) < Vs+ very near the oscillator signal’s and it is proportional to the oscillator signal’s phase error
zero-crossing times, the mixer output is also insensitive to sampled at τn . It is often called absolute jitter or aperture
the nonlinearity imposed by f (v). It follows that under these jitter and it is described further in Section V.
circumstances the behavior of the mixer is nearly identical to 3) Analog-to-Digital Converters: A typical ADC uses a
that of an ideal multiplier with the important and beneficial squared-up oscillator signal, v(t), as a clock to mark the times,
exception that it practically ignores e(t). Specifically, the τn , at which to sample its input signal, x(t). It converts the
mixer’s output under these circumstances well approximates resulting sequence of sampled values, x(τn ), to a digital output
4 sequence. The sampling circuitry is designed to be insensitive
y(t) = sin (ω0 t + φ(t)) x(t). (9) to the clock signal, v(t), except near its positive-going zero-
π crossings, so ADCs, like mixers, are insensitive to e(t).
A practical example of such a mixer is shown in Fig. 5. There are several types of ADC sampling circuits, but the
The figure shows the general structure of a MOS transistor circuit shown in Fig. 6 is representative of the core operation
based mixer of the type currently used in mobile telephone performed by most of them. The gates of the MOS transistors
receivers [15], [16]. The mixer consists of a differential voltage are driven by V B I AS − v(t), where V B I AS is a constant bias
to current (V /I ) converter, four MOS transistors controlled by voltage and v(t) is the squared-up oscillator signal given
the oscillator signal, and a differential current-to-voltage (I /V ) by (6) with an r (θ ) that well-approximates rideal (θ ). When
converter. v(t) is close to −V0 the transistors are turned on, and the
Each of the four transistor gates is driven by V B I AS +v(t) or voltage across the capacitor tracks x(t). At the positive-going
V B I AS −v(t), where V B I AS is a constant bias voltage and v(t) zero-crossing of the oscillator signal, v(t) rapidly transitions
is the squared-up oscillator signal. The circuit is designed such toward V0 which abruptly turns off the transistors, thereby
that the four transistors approximate switches which connect freezing the voltage stored on the capacitor until the subse-
the differential outputs of the V /I converter to the differential quent negative-going zero-crossing time.
inputs of the I /V converter directly when v(t) is sufficiently The circuit is designed such that V B I AS − V0 − e(t) < Vo f f
greater than zero and with swapped polarity when v(t) is and V B I AS + V0 − e(t) > Von for all t, where Vo f f and Von
sufficiently less than zero. are voltage levels for which the transistors have high-enough
Although the on-resistances of the transistors are never zero, off-resistance when V B I AS − v(t) < Vo f f and low-enough on-
the low differential input impedance of the I /V converter resistance when V B I AS − v(t) > Von so as not to degrade
combined with the much higher differential output impedance performance. Hence, the use of a squared-up oscillator signal
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 5

for v(t) ensures that V B I AS − v(t) is only between Vo f f provided the limit exists, where f has units of Hz, and
and Von very near the zero-crossing times of v(t). One FT{φT (t)} is the Fourier transform of φ(t) restricted to the
consequence is that e(t) can be neglected much like in the case interval 0 ≤ t ≤ T . Specifically,
of the mixer described above. Another consequence is that  ∞
each transistor’s nonlinear transition between its on and off F T {φT (t)} = φT (t)e− j 2π f t dt (12)
states has little effect on the sampling circuit’s performance. −∞
Hence, the frozen voltage stored on the capacitor when v(t)
is close to V0 well-approximates x(τn ). where
4) Other Clocking Applications: Oscillators are also used to 
φ(t), if 0 ≤ t ≤ T,
clock a wide range of other analog, mixed-signal, and digital φT (t) = (13)
0, otherwise.
circuits including DACs, frequency dividers, phase-frequency
detectors (PFDs), time-to-digital converters (TDCs), digital- As is well known and can be verified from the definition
to-time converters (DTCs), timers, and synchronous digital above, Sφφ ( f ) for any value of f can be interpreted as 1/ f
logic. In most cases, the components within these circuits times the time average power of φ(t) in the frequency band
that are clocked by the oscillator signals are edge-triggered between f and f + f in the limit as f → 0. Hence, each
latches or flip-flops. value of Sφφ ( f ) represents a power density per Hz. In this
The clock input of each such edge-triggered latch or flip- case, φ(t) has units of radians, so Sφφ ( f ) has units of radians2
flop is driven by a clock signal of the form V B I AS + v(t), per Hz.
where, once again, V B I AS is a constant bias voltage and Replacing |FT{φT (t)}|2 in (11) by the product of the right
v(t) is a squared-up oscillator signal. By design, the edge- side of (12) and the complex conjugate of the right side of (12)
triggered circuit only changes its state when v(t) is in a and rearranging the result yields
narrow range of values about its midpoint, and V0 is large
enough that that −V0 + e(t) and V0 + e(t) are outside this  ∞
range for all t. Therefore, by exactly the same reasoning Sφφ ( f ) = Rφφ (τ )e− j 2πτ f dτ , (14)
−∞
described above for mixers and sampling circuits, such circuits
are insensitive to e(t). where Rφφ (τ ) is given by
 T
E. Phase Error Versus Phase Noise 1
Rφφ (τ ) = lim φ(t)φ(t + τ )dt (15)
T →∞ T
An oscillator signal’s phase error, φ(t), usually contains 0
both a random component and a deterministic component. The and is called the time average autocorrelation of φ(t).
random component is caused by device noise, such as thermal Equation (14) implies that Sφφ ( f ) is the Fourier transform of
and flicker noise, introduced by the transistors and other com- the time average autocorrelation. Applying the inverse Fourier
ponents that make up the oscillator circuit. The deterministic transform to (14) gives
component is the result of deterministic disturbances that are
 ∞
inadvertently generated within or parasitically coupled into the
oscillator circuitry. For example, the deterministic component Rφφ (τ ) = Sφφ ( f ) e j 2πτ f d f . (16)
−∞
of φ(t) in a PLL-based oscillator inevitably contains spurious
tones, also known as spurs, that are not harmonics of the It follows from (15) that the time average power of φ(t) is
oscillator frequency. Rφφ (0), so (16) implies that the time average power of φ(t)
In this paper, φ(t) is called phase error and the random is the integral of Sφ ( f ) over all frequencies.
component of φ(t) is called phase noise. This choice was The Fourier transform of any real-valued function is conju-
made to avoid confusion because the word noise is considered gate symmetric, and |c| = |c∗ | for any complex number c,
by many people to denote purely random phenomena. It is also so (11) implies that Sφφ ( f ) = Sφφ (− f ). Consequently,
consistent with much of the published literature, e.g., most the one-sided time average power spectrum of φ(t), defined as
papers that report the measured performance of PLL-based
oscillators refer to phase noise and spurious tones as distinct Sφ ( f ) = 2Sφφ ( f ) for f ≥ 0, (17)
types of phase error. Unfortunately, the literature is not con-
sistent in this respect. For instance, in the IEEE standard is often used. The factor of 2 ensures that the time average
φ(t) is called phase fluctuations and, somewhat confusingly, power of φ(t) is the integral of Sφ ( f ) over all positive
the term phase noise is reserved exclusively for a function frequencies.‡
L( f ) (pronounced “script-ell of f ”) equal to half the one-sided As described above,
time average power spectrum of φ(t) [10].
1
L( f ) = Sφ ( f ) (18)
2
F. Time Average Power Spectra
Laboratory measurements and circuit simulations of power by definition. This definition is important because L( f ) is
spectra inevitably estimate time average power spectra as what laboratory phase noise measurement instruments esti-
opposed to statistical power spectra [17]. The two-sided time mate. For reasons explained in Section III-A, when L( f ) is
average power spectrum of a real-valued continuous-time expressed in decibels (dB), i.e., 10log10(L( f )), its units are
signal, in this case φ(t), is defined as defined to be dBc/Hz.
1 ‡ For the remainder of the paper, all time average power spectra are referred
Sφφ ( f ) = lim |F T {φT (t)}|2 for − ∞ < f < ∞ (11)
T →∞ T to as just power spectra for brevity.
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6 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

G. Spurious Tones from an oscillator signal’s power spectrum. Unfortunately,


A signal or its power spectrum is said to contain a spur the simple relationship between the old definition of L( f ) and
at a frequency f m if the signal’s power spectrum contains a Sφ ( f ) breaks down unless |φ(t)| << 1. Given that practical
Dirac delta function at fm . The power of a phase error spur cases of interest exist for which |φ(t)| << 1 does not hold,
at frequency f m is therefore given by the definition was eventually changed to (18) [10].
 fm +|ε| The error term in (22) caused by oscillator phase error
can be viewed as an amplitude modulated (AM) waveform
Pspur = lim Sφφ ( f )d f (19) with carrier signal A cos(ω0 t) and modulation signal φ(t).
ε→0 f m −|ε|
The time average power of the carrier signal is A2 /2, and
with units of radians2 . for f = ω0 /(2π) the one-sided power spectrum of the AM
Due to the symmetry of Sφφ ( f ) about f = 0, its spurs waveform is Sv ( f ). The portion of an AM waveform’s power
appear in pairs, e.g., a sinusoidal component B sin(2π f m t) in spectrum on either side of the carrier frequency is traditionally
φ(t) gives rise to two B 2 /4-powered spurs, at frequencies f m called a sideband of the signal. Therefore (24) implies that
and − f m . Nevertheless, the power of each spur is quantified L( f ) is approximately equal to the power density per Hz in
separately by (19), a justification for which is explained in the a sideband of v(t) at an offset of f from the carrier divided
next section. by the power of the carrier.§
As shown in Section IV, spurs are especially detrimental It follows that 10 times the logarithm of the right side of (24)
to the performance of wireless systems, so spur mitigation can be interpreted as having units of dBc/Hz, i.e., the power
techniques in PLL-based oscillators are an active research density per Hz in a sideband relative to the power of the
topic [18]–[21]. carrier in dB. Therefore, with the old definition of L( f ), the
units of 10log10(L( f )) are dBc/Hz. This is not strictly true
III. O SCILLATOR S IGNAL P OWER S PECTRUM for the current definition of L( f ), but for consistency, and
because (24) holds approximately with the current definition,
A. Relationship to Phase Error Spectrum the units of 10log10(L( f )) are defined to be dBc/Hz.
As described in Section II, it is usually the case in practice If Sφ ( f ) contains a spur at f m , the argument above can be
that only the fundamental term of an oscillator signal (e.g., the repeated while integrating both sides of (23) over an ε-interval
n = 1 term in (8)) contributes to the oscillator signal’s power around f 0 + fm and applying (19). This shows that Pspur is
spectrum in a wide bandwidth around f = ω0 /(2π), and equal to the power of the spur in Sv ( f ) at f 0 + f m , divided by
in many applications e(t) can be neglected. In these cases, the power of the carrier. Hence, the units of 10log10(Pspur )
the oscillator signal of interest has the form are defined to be dBc.
By the symmetry of Sφφ ( f ), if Sv ( f ) has a spur at f 0 + f m
v(t) = A sin (ω0 t + φ(t)) (20) caused by oscillator phase error, it also has a spur of the
where A is a constant amplitude. same power at f0 − fm . Therefore, it might seem redundant to
Applying the angle sum trigonometric identity to (20) gives evaluate the power of each spur individually, e.g., as in (19).
However, for reasons explained in Section VII, measurements
v(t) = A sin (ω0 t) cos (φ(t)) + A cos (ω0 t) sin (φ(t)) . (21) of oscillator signal power spectra are seldom perfectly sym-
If |φ(t)| << 1 for all t as is often the case for oscillators, metric for frequency offsets above and below f 0 , and therefore
applying the sine and cosine small angle approximations evaluating the power of each spur separately is not redundant
to (21) results in in practice.

v(t) ∼
= A sin (ω0 t) + A cos (ω0 t) φ(t). (22)
B. Continuous-Time Versus Discrete-Time Paradox
The first and second terms on the right side of (22) are the
It is argued in Section II that only the samples of a squared-
ideal oscillator signal and an additive noise term caused by
up oscillator signal’s phase error at the oscillator signal’s
oscillator phase error, respectively.
zero-crossing times, i.e., φ(tn ), affect the oscillator output
The power spectrum of v(t) and its properties are given
waveform in the absence of e(t) error. Yet it is argued in
by (11)-(17) except with φ replaced by v. Given that the ideal
Section III-A that in many cases of interest the power spectrum
oscillator signal term in (22) has zero bandwidth, the one-sided
of the fundamental term of such an oscillator signal is a
power spectrum of v(t) for f = ω0 /(2π) only depends on
function of the power spectrum of the continuous-time phase
the noise term. It follows from well-known Fourier transform
error waveform, φ(t). This apparent contradiction can be
properties and the power spectrum definition that the one-sided
resolved as follows.
power spectrum of v(t) can be written as
As described in Section II-C, a squared-up oscillator signal
A2  ω0 ω0 can be used in place of a sinusoidal oscillator signal provided
Sv ( f ) ∼
= Sφ f − for f = . (23) the power spectra of the terms in the squared-up signal
4 2π 2π
centered at integer multiples of f 0 = ω0 /(2π) do not overlap
This can be rearranged and combined with (18) to give the power spectrum of the fundamental term centered at f 0 .
ω0 This requires that Sφφ ( f ) be bandlimited to a bandwidth that
Sv 2π + f
L( f ) ∼
= for f > 0. (24) is lower than f 0 /2. In such cases the definition of Sφφ ( f )
A2 /2 given by (11)-(13) implies that FT{φT (t)} is also bandlimited
The right side of (24) used to be the definition of L( f ) [22]. with this bandwidth in the limit as T → ∞. It follows from
When this was the case, (18) followed from this definition as the sampling theorem that FT{φT (t)} in (11) can be replaced
an approximation. The old definition had the advantage that it
was a proxy for Sφ ( f )/2 that could easily be measured directly § Older literature often shows phase noise as L( f ) to underscore this fact.
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 7

Both the broadband phase and the broadband additive error are
sampled at the zero crossings of the oscillator signal. The lim-
iting amplifier’s wide bandwidth typically causes aliasing of
many bands of broadband noise into the | f | < f0 /2 frequency
band.
The conversion of additive error to phase error also affects
the clock buffers which follow the limiting amplifier. The
purpose of a clock buffer is to maintain the squared-up
edges of the clock signal over long transmission distances,
and therefore is susceptible to the same error-sampling effect
discussed for limiting amplifiers. While each clock buffer may
only contribute a small amount of phase error, in ICs such as
network routers or FPGAs where GHz clocks are distributed
several centimeters, their cumulative error usually dominates
the oscillator’s intrinsic phase error [23], [24].
Fig. 7. Sampling behavior of the limiting amplifier on the oscillators phase The simulation methodology described in Section VI-A
and additive error. ensures that the sampling and conversion effects described
above are properly captured, so that any amplitude error on
by T0 times the discrete-time Fourier transform of φ(nT0 ) for the resulting squared-up clock signal can usually be ignored,
| f | < f 0 /2. Hence, in such cases as explained in Section II-B. The phase error power spectrum
of this squared-up clock signal can then be “input-referred”
Sφφ ( f )
⎧ as shown in Fig. 7 to generate the equivalent band-limited
∞ 2

⎨ T2  f0 Sφφ ( f ) which contains all the sampled noise.
− j 2π f nT0
lim 0 φT (nT0 ) e , if | f | < ,
= T →∞ T 2 Throughout the remainder of the paper, Sφφ ( f ) is used

⎩ n=−∞
in equations that relate the phase error power spectrum to
0, otherwise. samples of the phase error or, equivalently, to jitter, as a proxy
(25) for either the actual phase error power spectrum or Sφφ ( f ).
Provided the bandwidth of Sφφ ( f ) is sufficiently low, (10) In cases where the actual phase error is bandlimited to
implies that φ(τn ) ∼ | f | < f 0 /2, the reader should view Sφφ ( f ) as denoting
= φ(nT0 ) to a high degree of accuracy.
In such cases, it follows from (25) that Sφφ ( f ) can be the power spectrum of the actual phase error. Otherwise,
expressed as a function of φ(t) sampled at the oscillator the reader should view Sφφ ( f ) as denoting Sφφ ( f ). In this
signal’s positive-going zero-crossing times. A nearly identical way, the quantity denoted by Sφφ ( f ) in such equations is
argument shows that it can also be expressed as a function of bandlimited to | f | < f 0 /2 by definition.
φ(t) sampled at the oscillator signal’s negative-going zero- D. Why Sφφ ( f ) Increases With Oscillator Frequency
crossing times. Thus, provided |φ(t)| << 1, it follows As can be seen from (1) and (6), oscillator frequency,
from (17), (23), and (25) that Sv ( f ) can be expressed as a ω0 , and phase error, φ(t), are separate variables in both
function of φ(tn ) instead of φ(t). the sinusoidal and squared-up oscillator signal models. This
C. Sampled Phase Error separation obscures an implicit dependency of phase error
on oscillator frequency that arises because phase error rep-
The assumption that Sφφ ( f ) = 0 for | f | ≥ f 0 /2, which resents the oscillator’s timing error as a fraction of its period
led to (25), is usually acceptable in wireless transceivers, but its period is inversely proportional to its frequency. For
because the various signal paths in wireless transceivers example, (10) implies that changing an oscillator’s frequency
typically have bandwidths much less than f 0 /2 by design. by X dB without changing the mean squared value of its
In contrast, the assumption is rarely valid in clocked systems absolute jitter would increase its phase error power by 2X dB.
which generally lack equivalent band-limiting circuits. In such Indeed, it has been shown for many different types of
cases, (25) does not hold because sampling the phase error at oscillators that the effect of circuit noise on absolute jitter
a rate of f 0 causes aliasing. is relatively independent of the frequency to which a given
A common approach to avoid this problem is to replace oscillator is tuned [25]–[28]. In such cases, changing the
the actual phase error power spectrum, Sφφ ( f ), with a con- oscillator’s frequency does not significantly change the mean
ceptual modified phase error power spectrum, Sφφ ( f ), equal squared value of its absolute jitter.
to the right side of (25). Even though Sφφ ( f ) = Sφφ ( f ) This effect can cause confusion when comparing the phase
when Sφφ ( f ) is not bandlimited to | f | < f 0 /2, Sφφ ( f ) is noise performance of oscillators tuned to different frequencies.
bandlimited to | f | < f 0 /2 and already contains all content that The confusion can be avoided by normalizing the phase noise
would have aliased into the frequency band | f | < f 0 /2 had of the oscillators to a common frequency prior to comparing
Sφφ ( f ) been sampled at a rate of f0 . Accordingly, Sφφ ( f ) can their phase noise spectra. The phase noise of an oscillator
be used in place of Sφφ ( f ) in all of this paper’s results that normalized to a frequency ωn is (ωn /ω0 )2 Sφφ ( f ) where ω0 is
relate the phase error power spectrum to f0 -rate samples of the nominal frequency and Sφφ ( f ) is the phase noise spectrum
the phase error or, by extension, to absolute jitter. of the oscillator. In general, the phase noise of two oscillators
Fig. 7 shows how this approach can be extended to handle normalized to the same frequency will be approximately equal
broadband additive error that gets converted to phase error if they have equivalent jitter performance. For example, two
when a sinusoidal oscillator signal is amplified and clipped by oscillators, one with frequency ω0 and phase error power
a limiting amplifier to generate a squared-up oscillator signal. spectrum Sφφ ( f ) and one with frequency 2ω0 and phase error
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8 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

power spectrum 4Sφφ ( f ) would have the same normalized


phase noise power spectrum. Normalizing the phase noise
spectra of different oscillators to a common frequency in this
fashion allows for a fair phase noise performance comparison.
A commonly-used oscillator figure of merit (FOM) that
implicitly performs this normalization is
  
f0 2 1
F O M = 10 log (26)
f L( f ) P
where f 0 = ω0 /(2π), f is any frequency offset, and P is
the oscillator’s power consumption in mW [25]. For instance,
if an oscillator’s frequency is doubled (increased by 3 dB)
without changing its phase noise or power consumption, its
FOM increases by 6 dB, which is consistent with the above
discussion.
Fig. 8. Power spectra on a dBc/Hz scale of: the desired signal and an
IV. E FFECTS OF P HASE E RROR ON M IXING interferer in x(t), φ(t) (frequency-shifted by f d ), and φ(t)x(t). Hash marks
In wireless receivers, a mixer’s input signal, x(t), usually show a portion of φ(t) that causes reciprocal mixing error (top plot) and the
resulting reciprocal mixing error (bottom plot).
consists of a desired signal plus multiple unwanted signals
at other frequencies called interferers or blockers. The inter- spectrum of φ(t)x(t) has a non-zero component in the fre-
ferers not only arise from unwanted signals received through quency range f d – f /2 to f d + f /2 if an interferer with
the antenna, but they can also result from non-ideal circuit bandwidth f is centered at frequency f i and Sφφ ( f − f d )
behavior. For example, in frequency division duplex (FDD) is non-zero for f i – f ≤ | f | ≤ f i + f . This component
transceivers it is not possible to fully isolate the receiver from is centered on and therefore corrupts the desired signal com-
the transmitted signal, so a partially attenuated version of the ponent of x(t). As illustrated in Fig. 8, if the interferer has a
transmitted signal appears to the receiver as an interferer. high-enough power relative to the desired signal, the reciprocal
Ideally, the mixer frequency-translates x(t) such that the mixing error can be significant even when Sφφ ( f − f d ) is small
desired signal resides within the passband of the filter fol- for f i – f ≤ | f | ≤ f i + f .
lowing the mixer, and the interferers are either suppressed by Thus, reciprocal mixing error is caused by phase error
the filter or subsequently suppressed by digital filtering after mixing with interferers via the φ(t)x(t) term in (27), and
analog-to-digital conversion. Unfortunately, oscillator phase the corresponding signal-to-noise ratio (SNR) over the desired
error mixes with the interferers which can result in error signal band decreases with increasing interferer power. This
that ends up in the same frequency range as the desired often places stringent restrictions on the phase error, because
signal, thereby corrupting the desired signal and reducing interferers can be extremely powerful relative to the desired
the sensitivity of the receiver. This phenomenon is known as signal in typical wireless receivers.∗∗ For example, in LTE
reciprocal mixing. cellular handset receivers, interferers with | f i – f d | ≥
It follows from (9), (20), and (22) that the output of a typical 10 MHz can be up to 87 dB more powerful than the desired
mixer in the band of interest can be written as signal [29].
4 4 Of course, the phase error also mixes with the desired
y(t) = sin (ω0 t) x(t) + cos (ω0 t) φ(t)x(t). (27) signal component via the φ(t)x(t) term, and this causes
π π
error in the desired signal band too. In applications such as
The first term on the right side of (27) represents the ideal
GSM handset receivers wherein the required SNR over the
behavior of the mixer, and the second term represents the
signal band is modest, this error is less problematic than
effect of oscillator phase error. The sine and cosine factors in
reciprocal mixing error because the SNR does not decrease
the two terms both perform the same frequency translations;
with increasing signal power. However, in receivers for high-
the sine factor frequency-translates x(t) by both ω0 /(2π)
order modulation formats, such as 256 QAM in LTE handset
and −ω0 /(2π) Hz, and the cosine factor frequency-translates
receivers, the required SNR over the signal band is high
φ(t)x(t) by both ω0 /(2π) and −ω0 /(2π) Hz. Therefore, any
enough that close-in oscillator phase error, i.e., phase error
portion of the power spectrum of φ(t)x(t) that overlaps the
below several MHz, becomes one of the most challenging
power spectrum of the desired signal portion of x(t) causes
oscillator specifications to meet [21].
reciprocal mixing error.
Oscillator phase error also causes mixing error in wire-
For example, suppose x(t) contains a desired signal com-
less transmitters. Mixers are used in a wireless transmitter
ponent centered at frequency fd and an interferer centered
to frequency-translate the desired signal to the RF transmit
at frequency f i , and suppose φ(t) contains a spurious tone
frequency. As in receivers, each mixer behaves according
given by B sin[2π( f d − fi )t] where B is a constant. The
to (27); it performs the same frequency translations on both
spurious tone causes φ(t)x(t) in the second term of (27) to
its input signal, x(t), and the phase error term, φ(t)x(t).
contain a copy of the interferer scaled by B/2 and centered at
After frequency translation, these signals have spectral shapes
frequency f d , which corrupts the desired signal component
comparable to the interferer and φ(t)x(t) power spectra,
unless the power spectrum of the interferer times B 2 /4 is
sufficiently small that it can be neglected. ∗∗ Typically, large interferers occur relatively far from f , so they place
d
More generally, multiplication in the time domain is equiv- stringent requirements on the far-out phase error, i.e., on the phase error
alent to convolution in the frequency domain, so the power power spectrum above at least several MHz.
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 9

respectively, shown in the bottom plot of Fig. 8, except in


this case f i corresponds to the transmit frequency.
The combined signals are passed through a power amplifier
and then bandpass filtered. Typically, the bandpass filter is
a SAW filter or duplexer which attenuates the out-of-band
portion of φ(t)x(t) by about 50 dB, but the amplification
prior to filtering is often so high that the residual out-of-band
emission from the term corresponding to φ(t)x(t) can still be
significant. For example, in FDD transceivers, its overlap with
the receive band can desensitize the receiver. This out-of-band
emission phenomenon generally dictates the maximum far-out
phase error that can be tolerated in a given application.
The close-in phase error results in the portion of the
error power spectrum arising from φ(t)x(t) that overlaps the
desired transmitted signal. As in receivers, this term can be
Fig. 9. Divide-by-N circuit block diagram and effect on input clock jitter.
problematic in applications that use high-order modulation
formats such as the 256 QAM option in LTE handset receivers B. Jitter of Divided Clocks
unless the close-in phase error is kept very low.
A clock divider that reduces the frequency of its input
clock by an integer factor, N, is a fundamental building
V. J ITTER block in many clocked systems. As shown in Fig. 9, such
In mixers it is convenient for the reasons described a clock divider typically consists of edge-selection logic,
above to represent non-ideal oscillator behavior in terms of i.e., an N-fold digital divider driven by the oscillator signal,
continuous-time phase error, φ(t). In most other applications, v(t), followed by a retiming flip-flop. The retiming operation
it is more useful to represent the non-ideal behavior in terms renders the absolute jitter of the output clock signal insensi-
of the absolute jitter, τn , as defined in (10), or quantities tive to noise and other non-ideal circuit behavior within the
derived from the absolute jitter. edge-selection logic, thereby isolating the jitter-contributing
Like phase error, jitter typically consists of random and circuitry to just the retiming flip-flop. To the extent that the
deterministic components. Accordingly, the modifiers ran- absolute jitter added by the retiming flip-flop is negligible,
dom or deterministic are applied to jitter metrics in cases the output clock signal’s absolute jitter is approximately equal
where the metrics represent only the effects of the random to a sub-sampled version of the input clock signal’s absolute
or deterministic components, respectively. The modifier total jitter.
is also often used to indicate when a jitter metric represents The jitter density of a typical clock signal has regions with
the effects of both components, e.g., total absolute jitter is different slopes [30]. The top right plot in Fig. 9 shows the
comprised of random absolute jitter and deterministic absolute jitter density of the divider’s input clock, where the sloped
jitter. Without a modifier, the total quantity is usually implied. regions have been simplified into a single low-frequency
(close-in) sloped region with jitter density Jnb ( f ), and a
broadband (far-out) flat region with jitter density Jwb ( f ). The
A. Jitter Density bottom right plot in Fig. 9 shows the jitter density of the
In many clocked systems, the clock signal undergoes several divider’s output clock signal for the case of division by 2
frequency multiplications and divisions between its source and (i.e., N = 2). In this example, the power of the input clock
each circuit that it drives. In such cases, phase error is an signal’s close-in jitter density falls far below the power of the
inconvenient metric, because, as discussed in Section III-D, far-out jitter density in the frequency band [ f 0 /4, f 0 /2), so the
it increases with clock frequency. To avoid the tedium of scal- aliased contribution of the close-in jitter density to the jitter
ing phase error after every frequency translation, a normalized density of the output clock signal is negligible. The far-out
power spectrum called jitter density and defined as jitter density of the output clock signal is, however, doubled
in power because of aliasing introduced by the sub-sampling.
1 Generalizing this example to N-fold division, the output
J( f ) = Sφ ( f ) (28)
ω02 clock’s close-in jitter density remains that of the input clock,
whereas its far-out jitter density is N times that of the input
is often used in place of the phase error power spectrum when clock. In theory, it is possible for the division ratio, N, to be
analyzing such systems. Jitter density is so-named because for large enough that aliasing of the close-in jitter density is
f < f 0 /2 it is proportional to the single-sided discrete-time non-negligible, but this rarely happens in practical low-jitter
power spectrum of the absolute jitter sequence, τn . This can circuits.
be seen by dividing both sides of (25) by ω02 , and using (10)
and the symmetry property (17). The units of τn are seconds, C. Integrated Jitter
so the units of J ( f ) are seconds2 per Hz.
The jitter densities of oscillator signals at different nominal In some applications, the mean squared value of the absolute
frequencies do not need to be normalized to a common jitter, i.e., the time average of ( τn )2 , is of interest. This can
frequency for comparison as would be necessary for the corre- usually be related to the phase error spectrum as shown below.
sponding phase error power spectra, because the normalization Equation (25) can be rearranged as
is built into the definition of jitter density. This property ∞
 f0
simplifies many practical computations as demonstrated in the Sφφ ( f ) = T0 Rφφ [k]e− j 2π f kT0 , for | f | < (29)
following sections. 2
k=−∞
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10 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

where It follows from (33) that this contribution can be written as


 fm +|ε|
1 
N−1
1
Rφφ [k] = lim φ (nT0 ) φ ((n + k) T0 ). (30) σabs−spur
2
= 2 lim Sφ ( f )d f (34)
N→∞ N ω0 ε→0 fm −|ε|
n=0
The summation on the right side of (29) has the form of a where f m is the frequency of the spur. Hence, (17) and (19)
discrete-time Fourier transform. Applying the inverse discrete- imply that
time Fourier transform equation gives 2 2
 ∞ σabs−spur
2
= Pspur = 2 10 Pd Bc /10 (35)
ω0
2 ω0
Rφφ [k] = Sφφ ( f ) e j 2π f kT0 d f . (31)
−∞ where PdBc is the spur power in units of dBc, obtained through
It follows from (30) that the mean squared value of φ(nT0 ) measurements as described in Section VII.
is Rφφ [0], so (31) implies that the mean squared value of
φ(nT0 ) is equal the integral of Sφφ ( f ) over all frequencies. D. Other Jitter-Based Metrics
To the extent that φ(τn ) ∼
= φ(nT0 ), this with (10) implies that
the mean-squared value of the absolute jitter is given by In typical clocked digital circuits, multiple flip-flops whose
 ∞  ∞ inputs and outputs are interconnected through combinational
1 1 logic are driven by the same clock signal. Each timing path
σabs = 2
2
Sφφ ( f )d f = 2 Sφ ( f )d f. (32) in such a digital circuit is defined as a path that begins at the
ω0 −∞ ω0 0
output of a flip-flop, passes through combinational logic, and
This and other mean-squared quantities derived from the ends at the input of a flip-flop. Correct functionality of the
absolute jitter that are defined in the next section are often overall digital circuit requires that the maximum delay among
stated as their square-root equivalents, i.e., the root-mean- all such timing paths, which is called the critical path delay,
squared (rms) absolute jitter σabs . is less than the minimum clock period. The minimum clock
Section III-C defined the use of Sφ ( f ) in this paper as period depends on the jitter: the higher the jitter the lower the
a proxy for either the one-sided power spectrum of the minimum clock period and, therefore, the lower the maximum
continuous-time phase error, or S φ ( f ), the conceptual mod- possible clock frequency of the digital circuit.
ified power spectrum. As explained in that section, clocked In particular the variation of a clock signal’s period from
circuits tend to contain sources of broadband noise which its nominal value, i.e., τn − τn−1 , is the jitter metric of
result in broadband jitter, and the applications which they interest. It is called period jitter, and is frequently used in
serve also tend to have wide bandwidths. For these rea- place of absolute jitter to specify the performance of clock
sons, it is almost always S φ ( f ) that is used in applications signals for digital circuits.
that specify jitter. Irrespective of whether Sφ ( f ) or Sφ ( f ) The concept of period jitter can be generalized to accu-
is appropriate, both are bandlimited to the frequency mulated jitter, which is also known as N-cycle, or long-term
range [0, f0 /2). Therefore, (32) can be rewritten as jitter. Accumulated jitter is defined as the variation of the time
 f0 /2  f0 /2 interval spanned by a clock edge and the Nth edge preceding
2 1
σabs = 2 Sφ ( f )d f = J ( f )d f . (33) it minus N times the nominal period, so it can be expressed
ω0 0 0 as τn − τn−N . Thus, accumulated jitter for N = 1 is just
Actually integrating the jitter density down to f = 0 would period jitter.
yield an unbounded result in practice, because oscillator phase By definition, accumulated jitter is equivalent to absolute
error power spectra (and correspondingly, jitter density) tend jitter passed through a discrete-time filter with transfer func-
to be unbounded at low frequencies [30]. Usually this is not tion 1 – z −N , so its mean squared value can be written as
a practical concern, though, as many clocked systems are  f0 /2
2
designed to be insensitive to low-frequency jitter density. For σacc (N) =
2
1 − e− j 2π N f / f 0 J ( f )d f. (36)
example, transmitter-receiver pairs in serial communication 0
links use PLL-based oscillators and clock and data recov-
ery (CDR) circuits configured in a manner that effectively
bandpass-filters the transmitter clock jitter density before it E. Effects of Jitter on Analog to Digital Conversion
reaches timing-sensitive circuits in the receiver [31]. A common use of precision oscillators is the clocking of
Hence, in practice the integration limits of 0 and f 0 /2 in (33) ADCs. The operation of many ADCs can be abstracted into
are usually replaced by limits that are greater than 0 and two sequential operations. The first operation is sampling the
less than f 0 /2, respectively. In particular, integration limits continuous-time, continuous-valued input signal, x(t), at a
of 12 kHz to 20 MHz are widely used. These limits were discrete set of times defined by the oscillator, τn . The second
first seen in the specifications for the PLL-based oscillators operation is quantizing the sequence of continuous-valued
designed for the synchronous optical network (SONET) [32]. samples, x(τn ), into a sequence of digital codes. In many ADC
They have since proliferated to applications where they no architectures, the second operation is insensitive to clock jitter,
longer have any architectural significance, but because most so only the initial sampling operation is analyzed here [33].
PLL-based oscillators have qualitatively similar phase error Fig. 6 shows a simplified input sampling circuit. Ignoring
power spectra, they provide a useful means by which to all non-idealities except clock jitter, the nth sample of the
quickly compare the performance of different PLL-based input voltage is given by y[n] = x(nT 0 + τn ). Equation (10)
oscillators. implies that the |φ(t)| << 1 assumption made in previous
In some applications, it is of interest to evaluate the contri- sections is equivalent to | τn | << T0 . Assuming x(t) is
bution of a phase error spur at a particular frequency to σabs 2 . bandlimited to prevent aliasing, the sampling error caused by
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 11

jitter can be approximated as y[n] ∼ = x(nT 0 ) + x (nT0 ) · τn , necessary to capture phase error quantities of interest. For
where x (t) is the first derivative of x(t). example, to measure the phase error of a 1 GHz oscillator
Even with these assumptions and approximation, the jitter- down to 1 kHz would require running a transient simulation
induced error, x (nT0 ) · τn , is hard to analyze without for one million oscillator periods just to capture a single period
simulation. Textbooks typically consider a worst-case scenario of a 1-kHz phase error component.
in which x(t) is a maximum-frequency, maximum-amplitude For the past few decades, simulation methods have been
sinusoid, x(t) = Amax sin(ωx t) [33]. In this case, the sampled available that greatly accelerate the analysis of relatively
voltage error is approximately Amax ωx τn cos(ωx nT0 ). Thus, simple circuits that generate and process periodic signals, such
prior to quantization, this jitter-induced error already sets an as oscillators and clock buffers. While such methods are much
upper bound on the maximum achievable SNR given by faster than direct transient simulation, they have limitations,
    as described below, which make them generally inapplica-
1 2
2 A max 1 ble to the simulation of larger systems such as PLL-based
S N Rmax = 10 log10 1 2 = 10 log10 .
2 A max ωx σabs
2 2 ω2x σabs
2 oscillators.
(37) For larger systems, it is more common to use the data gener-
ated in block transistor-level simulations to develop behavioral
Restricting x(t) to be a single sinusoid makes the analysis models, which are then used to simulate the complete system
tractable, but it has been shown empirically that the SNRs in an event-driven simulator. As explained below, event-driven
of ADCs with broadband input signals achieve much higher simulators are ideally suited for simulating large systems that
performance than the single-tone result would suggest [34]. process discrete events, such as an oscillator’s zero crossings.
Yet (37) remains useful as pessimistic performance bound.
Moreover, σabs , the clock quality metric on which SNRmax A. Transistor-Level Simulation
depends, is often used instead of Sφ ( f ) to stipulate the To perform a phase noise or random jitter simulation,
required ADC clock quality in applications. When an ADC’s the simulator must first compute the circuit’s periodic steady
input signal, x(t), is broadband, the error caused by jitter, state, which is comprised of the periodic waveforms at the
i.e., x(nT0 + τn ) – x(nT0 ), tends to be spread across the various circuit nodes after all transient settling effects have
Nyquist band in a way that does not depend strongly on died out. For example, when an oscillator with a high-
the shape of Sφ ( f ), so σabs is a more convenient metric. Q resonator is started, it usually takes many cycles for
Notable exceptions are software-defined and reconfigurable the oscillation envelope to stabilize. In contrast, a clock
radios in which ADCs capture broad spectrum signals, but buffer driven by an external clock signal may only need
the constituent desired signals and interferers each occupy a few cycles to stabilize [38]. There are two main tech-
relatively narrow bandwidths [35]. In such cases, Sφ ( f ) is niques used to compute this solution: shooting and harmonic
required to characterize the full radio performance [36]. balance [39]–[41].
The shooting method is a time-domain approach wherein
F. Jitter Histograms the circuit is iteratively simulated over a time interval equal
to the expected period. After each iteration, the differences
Equation (33) provides a means with which to calculate
between the circuit’s initial and final states are measured, and
σabs from J ( f ), but it is possible to approximate σabs without
the initial state for the next iteration is modified. This process
knowing J ( f ) by plotting a histogram of the τn sequence.
continues until the circuit’s final state is equal to its initial
The histogram provides an estimate of the probability distribu-
state, indicating the periodic solution is achieved [39]. The
tion of τn from which σabs can be calculated directly. This is
majority of the computation time is spent on transient simu-
useful in applications like ADC clocking wherein J ( f ) is not
lations, so this method is especially effective for circuits with
particularly useful. Furthermore, with reasonable assumptions
short periodicities, e.g., multi-GHz RF oscillators. Moreover,
on the sources of the random and deterministic absolute jitter
as the waveforms are computed in the time-domain, sharp
contributions to the total absolute jitter, it is possible to
transitions resulting in broadband frequency-domain content,
estimate the relative magnitudes of their contributions [37].
such as occur in ring oscillators and CMOS clock buffers, are
For many clocked systems, jitter histograms are also a useful
not problematic [42].
visualization of clock signal phase error. For example, in a
In contrast, harmonic balance is considered a frequency-
serial communication receiver there is a circuit which samples
domain method. The circuit is first divided into two partitions,
incoming data at time intervals controlled by a sampling clock.
one containing all the linear elements, and another containing
As described in Section VII-C, it is usually possible to observe
the nonlinear elements. The simulator iteratively solves for
the waveforms of the data and sampling clock in the time
the voltages at, and current through, the nodes at the interface
domain. Knowing the histogram of the sampling clock jitter
between these two partitions. Given an initial guess at the
shows the distribution of when the data is sampled in time,
node voltages, the currents into the linear partition are solved
which is usually informative because realistic absolute jitter
in the frequency domain, which are computed using simple
histograms are non-Gaussian. In contrast, simply calculating
matrix multiplications. This is much faster than a transient
σabs by integrating J ( f ) would give no information on the
simulation which requires iteratively solving differential equa-
distribution of τn .
tions. The currents into the nonlinear partition are solved by
first applying the Inverse-Fast-Fourier Transform (IFFT) to the
VI. P HASE E RROR S IMULATION node voltages, computing the currents in the time domain,
In principle, an oscillator’s phase error could be esti- then returning them to the frequency domain via the FFT.
mated via transistor-level transient simulations. However, this By Kirchoff’s current law, the current into the linear partition
is rarely practical, even with present-day high-performance must equal the current leaving the nonlinear partition, so the
computers. The difficulty arises from the large timescales simulator iterates until this condition is satisfied.
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12 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

The computation of the nonlinear currents is cumbersome, is performed on the clock signal at the output of the limiting
but the huge speed advantage gained in the frequency-domain amplifier.
computation of the linear currents gives the harmonic bal- In spite of the advancements in simulator technology, there
ance method an overall advantage for circuits which are are still situations where simulating the combined oscillator
weakly nonlinear, only have a few nonlinear elements, or have and limiting amplifier can cause the simulator to have conver-
extremely long periodicities. For weakly nonlinear circuits, gence issues. For example, this often occurs when simulating
the overhead of the FFT and IFFT operations is modest a high-Q crystal oscillator driving a CMOS limiting amplifier.
because the circuit solution can be represented by only a For the reasons discussed above, the oscillator and its limiting
few harmonics in the frequency domain, and by having few amplifier are optimally simulated using the harmonic balance
nonlinear elements, the quantity of time-domain computations and shooting methods, respectively, so their combination is
is reduced. For circuits with long periodicities, to achieve challenging for either simulator. In this situation, what is
a given accuracy the harmonic balance method is usually often done is to perform separate simulations on each block,
more efficient than the shooting method because it does not while loading the oscillator with an approximation of the
suffer from accumulated numerical noise which plagues long CMOS buffer load, and driving the CMOS buffer with an
transient simulations. Ideal candidates for harmonic balance approximation of the oscillator’s sinusoidal output. The two
analysis are low-noise, extremely high-Q systems such as results are then added in power to represent the total phase
crystal oscillators [42]. noise at the CMOS buffer’s output.
Regardless of how the circuit’s periodic steady state solution When simulating clock buffer chains, their layout strongly
is calculated, the second step in a phase noise or random jitter influences the clock signal waveforms, which in turn influ-
simulation is to use this solution to compute how the different ences their jitter performance. It is therefore important to
circuit noise sources contribute to voltage noise on the periodic electromagnetically model the interconnect between the clock
signal at a chosen node. This method takes advantage of the buffers, including both the signal and ground return path,
periodicity of the signals within the circuit so that the effect of to account for potential transmission-line effects that are not
very low frequency circuit noise can be analyzed using only accurately captured in RC parasitic extractors [51]. The results
a single period of the circuit’s behavior [43], [44]. from electromagnetic simulators are invariably high-order
The distinctions made in the above discussion regarding the frequency-domain models in the form of s- or y-parameters.
types of circuits best suited to either the shooting or harmonic Such models are most efficiently simulated in their native form
balance methods were more critical when these methods using the harmonic balance method. Alternatively, their domi-
were first developed. However, the rapid improvement in nant effects can usually be captured in lumped element models
simulation and computer technology over the intervening to be used with transient-based simulators, and some simula-
decades has blurred this separation. While there do still exist tors can automatically perform this conversion [46], [47].
specialized problems which are better served by one or the Clock buffer chains are also highly sensitive to their power
other method, there are now general-purpose industry-standard supplies and power distribution networks. This includes the
simulation tools based on both methods, as well as hybrid interconnect between the clock buffers’ voltage regulators,
methods [45], [46]. the voltage regulators themselves, and even the package
Moreover, while early incarnations of these simulators models. Clock buffer supply current waveforms usually have
only estimated the raw signal power spectrum, present-day broadband content at frequencies well beyond a voltage
simulators are able to estimate both phase and amplitude regulator’s bandwidth. At these high frequencies, there are
error power spectra, and decompose the spectra into upper- often parasitic resonances. Therefore, accurate clock buffer
and lower-sideband contributions [47]. Furthermore, provided simulations require not only the circuits and their drivers and
the necessary information, they can accurately compute the loads, but electromagnetic models of their complete on-chip
modified phase error power spectrum resulting from sampling environment, and their supply circuitry as well [52]–[54].
and/or noise folding, as discussed in Section III.C [48].
Simulation technology has reached a level of maturity where
the simulator tool is typically no longer the design bottleneck. B. Behavioral Simulation
Rather, assuming the device models are accurate, most analysis There are two major obstacles to using the simulation
errors are the result of improper or incomplete simulation methods described above for more complicated systems such
methodology. For example, a complete clock distribution sys- as PLL-based oscillators. The first obstacle is that a peri-
tem comprised of an oscillator, limiting amplifier, and clock odic steady-state solution must exist and be computed [42].
buffers is usually still too large to be simulated efficiently This precludes the simulation of fractional-N type PLL-based
in one circuit. Rather, it is partitioned into sections which are oscillators, as well as systems which use digitally-generated
simulated independently. Unfortunately, oscillators and buffers pseudorandom dither, because such circuits tend to have
tend to be extremely sensitive to the circuits they drive, and extremely long periods (e.g., several days) [48]. The second
buffers additionally tend to be sensitive to the circuits that obstacle is that even in cases where the period is relatively
drive them [49], [50]. Therefore, realistic driving and loading small, the complexity of a complete PLL-based oscillator
conditions must be included when simulating each partition. imposes impractical processing and memory requirements, and
In particular, the oscillator and its limiting amplifier is a even when these resources are available, computing the peri-
critical combination, as the interface between them is espe- odic steady-state solution can still take days. This simulation
cially susceptible to broadband additive noise to phase noise methodology would provide little utility during the design
conversion. When simulating the jitter of an oscillator and phase, where many iterations usually are required.
its limiting amplifier, the clock buffer following the limiting A more practical method for simulating PLL-based oscil-
amplifier should be included. This only serves as a realistic lators is to use behavioral event-driven simulations [55]–[57].
load, for reasons described above, as the simulation analysis These simulations offer a huge speed advantage over transient
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 13

transistor-level simulations, because behavioral event-driven signal in the frequency band ( f − RBW/2, f + RBW/2).
simulations only capture the relevant functionality of circuits This is proportional to an estimate of the power spectrum of
rather than all of the voltages and currents of every node with the oscillator signal, Sv ( f ), as described in Section II-F. The
very small time steps. For example, a transistor-level oscillator accuracy of this estimate improves as the RBW decreases.
simulation iteratively solves differential equations to compute If the assumptions that ε(t) ∼ = 0 and |φ(t)| << 1 made
many points per period of the oscillator waveform. Yet, as has in Section III-A are valid, then (23) can be used to estimate
been argued throughout this paper, many circuits driven by an Sφ ( f ) from Sv ( f ). As oscillator phase error power spectra
oscillator signal are insensitive to the oscillator signal at times tend to rise at low frequencies, this approximation becomes
other than its zero crossings. Therefore, PLL-based oscillators invalid at very low offsets from the carrier [61]. Extremely
are almost always behaviorally-modeled by generating the low frequency oscillator phase error is indistinguishable from
sequence of their rising or falling zero-crossing times, τn . This frequency drift, which can also corrupt spur measurements,
sequence can be processed using (10) and (25) to generate the as explained shortly.
conceptual band-limited phase error power spectrum, Sφφ ( f ). Most spectrum analyzers have modes specifically for phase
Even though the shape of the oscillator signal waveform is lost noise measurement which perform the carrier power normal-
in a behavioral simulation, many non-idealities such as noise ization and apply any instrument-specific correction factors
and nonlinearity can still be accurately modeled [55]–[59]. automatically. Examples of correction factors include account-
The main drawback of behavioral event-driven simulations ing for the exact transfer function of the equivalent bandpass
is that their results are only as accurate as their behav- filter, and accounting for non-idealities in the power detector
ioral models of the circuit’s sub-blocks. Care is therefore that follows the equivalent bandpass filter [62], [63].
required to continually cross-verify the behavioral models If amplitude error is not negligible, then replacing A with
against transistor-level simulations of the corresponding circuit [ A+ε(t)] in (20) results in an extra additive term ε(t) sin(ω0 t)
sub-blocks. in (22). Furthermore, any additive error on the oscillator signal
Mixed-signal simulators, or co-simulators, bridge the gap will also appear in its power spectrum. Therefore, the oscillator
between the speed of behavioral event-driven simulators and signal power spectrum contains both amplitude error as well
the functional accuracy of transistor-level simulators [60]. as additive error, and these errors are indistinguishable from
A co-simulator can efficiently simulate a system comprised phase error in Sv ( f ). This results in a pessimistic estimate of
of transistor circuits, behaviorally-modeled circuits, and fully- Sφ ( f ) from Sv ( f ).
digital circuits. The behavioral models are written in a mixed- The full form of the right side of (22) including ampli-
signal language such as Verilog-AMS, while the digital circuits tude modulation is the carrier signal plus ε(t)sin(ω0 t) +
can be described in Verilog. The co-simulator partitions the Acos(ω0 t)φ(t), where ε(t) and Aφ(t) can be viewed as com-
system into its different types, and runs simulators optimized plex modulation of the carrier. Therefore, when the oscillator
for each type in lock-step. Data between the simulated parti- signal has both phase and amplitude error, the sidebands of
tions is continually communicated, so that the whole system its power spectrum are no longer symmetric, in contrast to the
is simulated in unison. case of pure phase error described in Section III-A. Parasitic
The power of a co-simulation is that a design can start coupling in both the circuit as well as the measurement setup
with all behavioral models, and then transistor-level circuit can result in amplitude modulation of the oscillator signal,
blocks can be used in place of the corresponding behavioral leading to such asymmetries. This effect is often noticeable in
models as they are designed. As different combinations of the spurious tones of PLL-based oscillators.
transistor-level circuits and behavioral models can be run, As explained in Section III-A, the power of a spur in the
this implicitly improves the behavioral model verification. oscillator phase error power spectrum at frequency f m is equal
Unfortunately, because the analog portions of the system are to the power of the spur in the oscillator signal power spectrum
simulated with a transistor-level simulator, co-simulations still at frequency f0 + f m , divided by the power of the carrier. Thus,
take orders of magnitude more simulation time than fully the phase error spur power in dBc can be read from a dB-scale
behavioral simulations. oscillator signal power spectrum as the difference between the
values of the power spectrum at f0 + f m and f 0 .
VII. P HASE E RROR M EASUREMENT However, there is a caveat to this spur measurement tech-
nique. As described above, the value of the spectrum analyzer
A. Spectrum Analyzers measurement at frequency f 0 + f m is the power at the output
A spectrum analyzer performs the equivalent of passing its of the conceptual RBW-bandwidth bandpass filter centered
input signal through a bandpass filter whose center frequency at frequency f 0 + f m . Therefore, the measured power is
is swept across a user-defined range of frequencies, called approximately the sum of the spur power plus the oscillator
the span.†† This frequency-swept bandpass filter is called the signal noise power density integrated over the band ( f 0 + f m −
equivalent bandpass filter. The power of the equivalent band- RBW/2, f 0 + f m + RBW/2). As the power of the spur of
pass filter’s output signal is measured, and this power is plotted interest decreases, the RBW must be decreased so that the
on the spectrum analyzer display’s vertical axis on a dB scale measured power at that frequency is dominated by the spur
against the equivalent bandpass filter’s center frequency on power, not the integrated noise power.
the horizontal axis. The bandwidth of the equivalent bandpass The left plot in Fig. 10 shows a PLL-based oscillator’s signal
filter is called the resolution bandwidth (RBW), and the time measured power spectrum over a 100 kHz span centered at the
it takes for the equivalent bandpass filter’s center frequency to 2.4 GHz carrier frequency, measured by a Rohde & Schwarz
traverse the span is called the sweep time. FSW13 spectrum analyzer. Symmetric spurs are visible at
If the spectrum analyzer input is driven by an oscillator
signal, then the displayed power on the spectrum analyzer †† This is a behavioral description, not an explanation of how spectrum
at a frequency f is equal to the power of the oscillator analyzers are implemented (a good explanation of which can be found in [17]).
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14 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

Fig. 10. Measured power spectra of a PLL-based oscillator signal (left) and its phase noise (right).

approximately 7.4, 14.7, and 29.5 kHz offsets from the carrier, lock the spectrum analyzer’s local oscillator to the PLL-based
with the largest shown by the delta marker as −73 dBc. The oscillator’s reference oscillator [62]. In this case, the spectrum
phase noise of this PLL-based oscillator in the 10 kHz to analyzer’s local oscillator has the same frequency drift as
100 kHz region is known to be −108 dBc/Hz. However, the PLL-based oscillator, which avoids the spur-measurement
because this measurement was taken with a 10 Hz RBW problem described above.
and without averaging, any spur below about −80 dBc would
become indistinguishable from the noise, so to resolve a lower-
power spur would require a narrower RBW. B. Phase Noise Analyzers
Unfortunately, narrow RBWs can complicate spur measure- The lowest-noise phase noise measurements are made with
ments and lead to erroneously optimistic results, because the phase noise analyzers, which are also called signal source ana-
time it takes for the spectrum analyzer to measure the power lyzers depending on the manufacturer. Phase noise analyzers
at the output of the equivalent bandpass filter increases as the are essentially extremely sensitive receivers, and are capable
RBW decreases. Oscillator frequency drift may cause the spur of differentiating between the amplitude and phase noise com-
frequency to drift in the measurement. Often, this has the effect ponents of an oscillator signal over a limited bandwidth [64].
of spreading the spur power across a range of frequencies that Two different measurement techniques are commonly used,
can extend beyond the bandwidth of the spectrum analyzer’s homodyne phase discrimination and heterodyne frequency
conceptual bandpass filter, thereby underestimating the spur discrimination [65]. The phase discrimination method is typ-
power. Moreover, because frequency drift varies randomly ically called narrowband-optimized mode, as it is optimized
over time, its effect on a spur may differ from its effect on for measuring the close-in phase noise of oscillators with very
the carrier, as they are measured at different points during the little frequency drift, such as crystal oscillators and PLL-based
sweep time. These effects can cause spur power measurement oscillators locked to crystal oscillators. The frequency discrim-
to be optimistic, often by several dB. inator method is often called wideband-optimized mode, and
The above discussion also explains why it is necessary to is better-suited to measure the phase noise of oscillators with
disable spectrum analyzer averaging when measuring spurs. relatively high low-frequency phase noise or frequency drift,
Spectrum analyzer averaging causes the instrument to average such as free-running voltage-controlled oscillators. Both of
the results of multiple sequentially captured measurements. these measurement methods are further improved by corre-
This mode is useful for increasing the precision of noise lation techniques, which essentially average out the uncorre-
measurements. Unfortunately, oscillator frequency drift causes lated noise between multiple identical measurement channels
the spur to appear at different frequencies across different inside the instrument [66]. The total added noise from these
measurement sweeps. When these results are averaged, the instruments can be less than 10 femtoseconds of integrated
resulting spur power is reduced as it is averaged with noise, jitter.
and just as explained above, the averaging may affect the spur The right side of Fig. 10 shows the phase noise plot of
power and carrier power differently, due to any randomness in the same PLL-based oscillator discussed in the previous sub-
the frequency drift. section, as measured by a Keysight E5052B signal source
Most spectrum analyzers implement the conceptual band- analyzer. For the reasons given in the previous section,
pass filtering operation described above by either downcon- the averaging techniques used by this instrument to improve
verting the input signal to a fixed intermediate frequency the noise measurement precision adversely affects its ability to
and passing the result through a fixed-frequency bandpass resolve spurs. For example, the spurs at 7.4, 14.7, and 29.5 kHz
filter, or digitizing the input signal and performing fast Fourier in the left-side power spectrum are also visible in the phase
transform (FFT) based spectrum estimation [17]. Either way, noise plot, but their powers are not directly readable as they
the accuracy of the center frequency of the conceptual band- are spread over a range of frequencies.
pass filter depends on the accuracy of the spectrum analyzer’s
local oscillator frequency, which, in turn, depends on the accu-
racy of the spectrum analyzer’s reference oscillator frequency. C. Time-Domain Methods
Most spectrum analyzers offer the option of using an exter- For serial communication applications, phase error is usu-
nal reference oscillator signal. When measuring PLL-based ally measured in the time domain with high-speed digitizing
oscillator phase error spurs, this feature makes it possible to oscilloscopes, as they can make measurements that would
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 15

be configured to transmit a repeating data sequence. Provided


the duration of each data sequence transmission is slower than
the maximum sub-sampling rate of the sampling oscilloscope,
it is possible to sub-sample a very high-speed clock signal
relative to the start time of each repeated data sequence. The
full clock signal can then be slowly reconstructed in the time
domain, hence the “equivalent-time” name for this instrument.
Fig. 11. Measured 14 GHz clock eye diagram and jitter histogram. The limitation of this method stems from the instrument’s sub-
sampling behavior, in that any periodic disturbances in the
be impossible with other instruments [67]. Digitizing oscil- oscillator signal not harmonically-related to the sub-sampling
loscopes fall into two categories, realtime and sampling (also rate can corrupt the measurement.
called equivalent-time). A realtime oscilloscope operates like A drawback of time-domain measurement instruments is
a digital version of a traditional analog oscilloscope, in that caused by their wide analog bandwidths. The analog circuitry
continuous segments of the input signal are digitized and present in both types of oscilloscopes prior to their ADCs
displayed onscreen. The maximum bandwidth of the input adds broadband thermal noise to the oscillator signal, and this
signal is limited by the sample-rate of the ADC, which is additive noise corrupts the oscillator signal via the mechanism
currently up to well over 100 GS/s [68]. described in Section III-C. Therefore, even the highest-
Realtime oscilloscopes often have internal configurable performance realtime and sampling oscilloscopes have inte-
zero-crossing detectors, so that finite-duration segments of the grated jitter floors well above those of phase noise analyzers.
oscillator signal absolute jitter can be extracted. An absolute
jitter sequence can be processed via an FFT, which, by (25), VIII. F REQUENCY S TABILITY
gives an estimate of the oscillator phase error’s modified In the preceding sections, oscillator error was analyzed in
conceptual power spectrum. An absolute jitter sequence can the frequency domain via phase error and jitter power spectra,
also be viewed as a histogram, and by analyzing the histogram Sφ ( f ) and J ( f ). There exist, however, a broad class of prob-
as described in Section V-F, various aspects of the type and lems in fields such as astronomy [71], satellite navigation [72],
magnitude of the jitter can be inferred. and precision metrology [73], [74] in which oscillator error
Fig. 11 shows measurement results for a 14 GHz clock is usually characterized in the time-domain with a quantity
signal via a Keysight DSAZ634A realtime oscilloscope. The called the Allan variance, σ y2 (τ ), which is described in this
clock signal was generated by a 28 Gb/s serial transmitter, section. The main utility of the Allan variance and its variants
transmitting a repetitive “01” sequence. The left plot in Fig. 11 is that they allow for simple characterization of very long-
is comprised of over 11 million segments of the measured term oscillator behavior (days to years). For example, they
clock waveform shifted and overlaid atop one another, in a plot are useful in analyzing the behavior of a system where
known as an eye diagram [69]. The right plot in Fig. 11 shows the frequency of a low-precision oscillator is periodically
the histogram of the clock signal’s zero crossings. It shows the re-calibrated with a high-precision oscillator, a situation which
total jitter, random jitter, and two additional terms: periodic frequently occurs in mobile devices [75]. The development of
jitter (PJ) and data-dependent jitter (DDJ). The complete cate- the time-domain approach to oscillator error was primarily
gorization of jitter used by this instrument is described in [70]. driven by the invention of the atomic clock, whereas the
A realtime oscilloscope’s unique ability to debug circuit phase error frequency-domain approach was motivated by the
problems in the time domain is particularly valuable in that development of Doppler radar [76], [77].
it makes it possible to compare, edge by edge, the absolute This section considers only the phase noise component
jitter on a clock signal against other signals in the system. For of phase error. Spurious tones and deterministic modulation
example, in a serial transmitter circuit, coupling may cause in the oscillator phase error have been extensively analyzed
transitions in the data being transmitted to disturb the edges within this framework [78], [79], but they require special
of its PLL-based oscillator signal [31]. By viewing the clock consideration which is beyond the scope of this tutorial.
and data signals simultaneously on a realtime oscilloscope,
it is possible to verify this effect, whereas if the clock signal
were viewed on a spectrum analyzer, a spur would be visible A. Frequency Fluctuations
with no indication of its phase. The instantaneous frequency, ω(t), of the oscillator sig-
In contrast to the Nyquist-rate sampling in a realtime nal given by (1) is defined as the derivative of the argu-
oscilloscope, a sampling oscilloscope sub-samples its input ment of the sine term, i.e., ω(t) = ω0 + φ (t) [80]. The
signal at a much lower rate, usually below 1 MHz [67]. On the frequency fluctuations function is defined as ω(t) − ω0 ,
other hand, its maximum input frequency is no longer limited i.e., the deviation of the instantaneous frequency from its
by the sampling rate, but by the bandwidth of the analog nominal value. The fractional frequency fluctuations function,
frontend and sampling circuitry. Furthermore, as the sampling y(t), is the frequency fluctuations function normalized by ω0 ,
oscilloscope’s ADC has more time to process each sample, i.e., y(t) = φ (t)/ω0 .
it can achieve higher voltage resolution. Currently, realtime The use of frequency rather than phase as the variable of
oscilloscopes have 8-10 bits of resolution, whereas sampling interest stems from early research characterizing oscillators
oscilloscopes typically have over 12 bits of resolution [67]. by counting its cycles [81]. A digital counter can be used to
Due to its sub-sampling behavior, a sampling oscilloscope approximately measure sequences of time averages of y(t) of
cannot be used to generate phase error power spectra, but the form
it can generate jitter histograms, and its ability to debug  λk +τ
time-domain issues is only slightly limited compared to a y(t) φ(λk + τ ) − φ(λk )
ȳk = dt = , (38)
realtime oscilloscope. For example, a serial transmitter can λk τ ω0 τ
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16 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

Fig. 12. Frequency-domain signal processing of the Allan variance. Inset


shows the equivalent bandpass filter transfer function.
Fig. 13. The σ -τ plot, annotated with the slopes of different regions
indicating the different noise type contributions.
where λk denotes the time of the kth measurement, and τ
is the duration of the average, also known as the counter straightforward solution is to take the variance of the first
gating interval, or stride [82]. It follows from (38) that the difference of ȳk . The Allan variance, or two-sample variance,
ȳk sequence is generated by sampling the result of a τ -width is thus defined as
moving average filter applied to y(t), which is a type of
lowpass filter. Hence, ȳk can be interpreted as samples of the 1  
continuous time sequence whose power spectrum is a lowpass- σ y2 (τ ) = E ( ȳ2 − ȳ1 )2 . (39)
2
filtered version of Sy ( f ).
Counters only measure the zero crossings of a clock, so the Hence, the value σ y2 (τ ) is equal to the variance of the
measurement of (38) incurs quantization noise. Laboratory difference between two adjacent τ -duration average frequency
frequency counters use various methods to improve the mea- measurements, normalized to the nominal frequency. This may
surement accuracy of ȳk , especially for short gating intervals seem contrived, but it has an intuitive interpretation in relation
relative to the clock period [83], [84]. However, for the types to timekeeping, which is explained in the next sub-section.
of problems where Allan variance is a useful metric, the values Taking the first difference in the time domain is equivalent
of τ of interest are typically many orders of magnitude larger to a highpass filter in the frequency domain, so the combined
than the clock period, so this quantization error can often be response of the first difference and the τ -width moving average
ignored. However, there are other non-idealities within the filter is equivalent to a bandpass filter applied to Sy ( f ) [90].
measurement instrument such as drift and noise in its internal The behavior of this filter is shown in Fig. 12, for three
time base. These cannot be ignored, and must be considered different values of τ . The bandwidth and center frequency of
as part of the uncertainty in the measurement [85]. this filter is proportional to 1/τ , so it has a constant logarithmic
bandwidth. As flicker noise has constant integrated power over
logarithmic bandwidths, σ y2 (τ ) is constant when the value
B. Allan Variance of τ places the filter’s center frequency in regions of Sy ( f )
A focus of early research on precision oscillators was char- dominated by flicker frequency noise.
acterizing flicker frequency noise, which manifests as the low- The square root of the Allan variance, σ y (τ ), is called the
frequency region of Sy ( f ) that decays at −10 dB/decade [86], Allan deviation. This is typically plotted on a log-log scale
shown in Fig. 12. Unlike other types of noise, such as versus τ , in what is called a σ -τ plot, shown in Fig. 13.
white frequency noise (flat in Sy ( f )) or white phase noise Like a phase noise plot, different regions of the σ -τ plot
(+20 dB/decade in Sy ( f )), measurement uncertainty due to are dominated by different types of noise. A typical σ -τ
flicker frequency noise cannot be removed by averaging, which plot shows, for increasing τ , a downward sloping region,
leads to an accuracy limitation for measurements that depend a flat region, and an upward sloping region. As indicated,
on averaging over time intervals. Its measurement also defies all but the upward-sloping region (random-walk frequency)
characterization by the variance, because the integral over can be attributed to the intrinsic noise processes encountered
positive frequencies including 0 of a lowpass-filtered Sy ( f ) in IC design. The random-walk frequency region tends to be
is unbounded, due to the divergence of the integral of 1/ f at dominated by external effects, such as random temperature
f = 0 [87]. fluctuations.
The divergence of the flicker noise model at low frequencies The value of τ required to measure the upward sloping
is shown to be accurate over extremely long observation inter- region depends on the type of oscillator. For example, preci-
vals, well beyond practical measurement durations [88], [89]. sion temperature-compensated crystal oscillators (TCXO) can
One method to bound the integral of Sy ( f ) is to use arguments show this region after τ ’s of minutes or hours, whereas the
similar to those in Section V-C, where a restricted jitter density Rubidium oscillators in GPS satellite clocks require a τ of
integration interval is used to bound the calculation of absolute several days [91]! It is important to note that, as τ (and hence
jitter. However, there is no unique interval of frequency noise measurement duration) becomes large, it becomes increasingly
integration for the characterization of oscillators that would be difficult to isolate the performance of the oscillator under test
applicable in all scenarios [86]. Therefore, a different metric from the measurement environment. In addition to temperature
is needed that is both generally applicable and practically fluctuations, issues such as physical vibration due to office foot
measurable. traffic, power surges causing equipment failure, or failure of
The problem with computing the variance of ȳk occurs the oscillator itself can all be considered random events that
because the integral of Sy ( f ) diverges at f = 0, so the most tend to manifest during long-term measurements.
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GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 17

C. Interpretation and Comparison With Phase Noise needed to analyze the Rubidium oscillators in GPS satellites
Mobile devices such as cellular phones and GPS receivers that exhibit complex frequency drift behavior [91].
contain circuits called realtime clocks (RTC). An RTC contains The approach to selecting a type of variance is similar to
an internal oscillator tuned to a known nominal frequency. the choice of window type for power spectrum estimation. The
By counting the oscillator’s cycles, a sense of time is kept. different types emphasize (or obscure) different aspects of the
The frequency stability of the mobile device RTC oscillator is signal, and depending on the features of interest one may be
typically poor, so the RTC is periodically recalibrated using more appropriate than another. The references [90], [97], [98]
the base station time as described below. provide more details on many commonly-used types of
Every τ seconds, the base station transmits its time to the variance.
mobile device. The mobile device updates its internal time to
IX. C ONCLUSION
the received time, but also computes the error between the
RTC’s measurement of the τ -second interval and the actual Oscillators and the clock signals they generate are ubiqui-
interval as defined by the base station. The mobile device then tous in modern electronic systems. Due to their wide range of
uses this measured error to correct the RTC’s prediction of the applications, different disciplines have each developed their
subsequent τ -second interval. own metrics and methods by which to characterize oscillator
In this manner, the mobile device’s time error from the non-idealities, each uniquely suited to their particular appli-
base station time is reset to 0 every τ seconds, but its time cation. Wireless systems are predominantly concerned with
error grows as time elapses from the most recent reset up the oscillator’s phase error power spectrum. Digital clocked
to the next reset. In this scenario, the standard deviation circuits, and wireline communication systems are more fre-
of the mobile device’s time error immediately before each quently analyzed using time-domain jitter calculations. Metrol-
recalibration is closely approximated by τ σ y (τ ). While this ogy and physics applications frequently employ the Allan
idealized example ignores practical challenges faced by such variance. Although these metrics, and the instruments used
systems, e.g., temperature fluctuations between recalibrations, to measure them, appear very different, as explained in this
it illustrates how the Allen variance is a useful tool to tutorial they are all just different perspectives on oscillator
characterize the precision of time measurements based on the phase error.
performance of the underlying oscillator used to measure the
time interval. ACKNOWLEDGEMENTS
Using a σ -τ plot in the above example, if the chosen τ falls The authors wish to thank Walid Ali-Ahmad, Enrique
in the −1 sloped region, then τ σ y (τ ) is a constant with respect Alvarez-Fontecilla, Ajay Balankutty, Brian Buell, Matthew
to τ . If τ falls in the flat region, then τ σ y (τ ) grows linearly Felmlee, Raghavendra Haresamudram, Sassan Tabatabaei,
with τ , and if τ falls in the rising region, then τ σ y (τ ) grows Yiwu Tang and the anonymous reviewers for their many
at a much higher rate. From the σ -τ plot, it is also easy to excellent comments and suggestions which helped us improve
calculate the maximum allowable time between recalibrations this paper.
given a maximum time error standard deviation requirement.
In contrast, such information is not evident from a plot of R EFERENCES
either Sφ ( f ) or J ( f ). [1] N. Da Dalt and A. Sheikholeslami, Understanding Jitter and Phase
The time between the negative-slope region and the flat Noise a Circuits and Systems Perspective. Cambridge, U.K.: Cambridge
region in a σ -τ plot is of particular interest. This time, called Univ. Press, 2018.
[2] E. Rubiola, Phase Noise and Frequency Stability in Oscillators.
τ0 , corresponds to the time after which averaging a frequency Cambridge, U.K.: Cambridge Univ. Press, 2009.
measurement longer than τ0 seconds does not increase the [3] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical
measurement precision. Thus, the flicker noise floor of fre- oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194,
quency stability is a critical specification of precision oscil- Feb. 1998.
[4] A. Hajimiri, S. Limotyrakis, and T. H. Lee, “Jitter and phase noise in ring
lators for metrology applications. Recent publications have oscillators,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 790–804,
reported reaching a frequency stability of below 1.5 × 10−18 Jun. 1999.
with just 30 minutes of averaging [92]. For a point of scale, [5] T. H. Lee and A. Hajimiri, “Oscillator phase noise: A tutorial,” IEEE
this is equivalent to measuring the diameter of the earth to a J. Solid-State Circuits, vol. 35, no. 3, pp. 326–336, Mar. 2000.
[6] A. Demir, A. Mehrotra, and J. Roychowdhury, “Phase noise in oscil-
precision of less than the width of a hydrogen atom [93]! lators: A unifying theory and numerical methods for characterization,”
The Allen variance is a convenient metric not only because IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 47, no. 5,
it is simple to estimate through measurement, but also because pp. 655–674, May 2000.
its estimate converges for all the commonly encountered [7] K. A. Kouznetsov and R. G. Meyer, “Phase noise in LC oscillators,”
power-law noise types. There exist several other types of IEEE J. Solid-State Circuits, vol. 35, no. 8, pp. 1244–1248, Aug. 2000.
[8] A. Mazzanti and P. Andreani, “Class-C harmonic CMOS VCOs, with
variances that offer advantages over the Allen variance. For a general result on phase noise,” IEEE J. Solid-State Circuits, vol. 43,
example, the modified Allan variance (MVAR) introduces a no. 12, pp. 2716–2729, Dec. 2008.
τ -dependent scale factor to the Allan variance that gives the [9] D. Murphy, J. J. Rael, and A. A. Abidi, “Phase noise in LC oscillators:
white phase and flicker phase noise regions different slopes A phasor-based analysis of a general result and of loaded Q,” IEEE
Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 6, pp. 1187–1203,
on the σ -τ plot [94]. The total variance (TVAR) is another Jun. 2010.
Allan variance like metric that has better convergence of the [10] IEEE Standard Definitions of Physical Quantities for Fundamental
estimator sequences for long τ in the presence of effects Frequency and Time Metrology—Random Instabilities, IEEE Standard
such as linear frequency drift [95]. Another metric is the 1139-2008, Feb. 2009.
Hadamard variance which has a sharp frequency selectivity [11] R. S. Carson, Radio Communications Concepts: Analog. New York, NY,
USA: Wiley, 1990.
and can estimate very high order frequency noise, namely [12] J. A. Weldon et al., “A 1.75-GHz highly integrated narrow-band CMOS
flicker walk frequency (−50 dB/dec phase noise) and flicker transmitter with harmonic-rejection mixers,” IEEE J. Solid-State Cir-
run frequency (−60 dB/dec phase noise) noise [96]. This was cuits, vol. 26, no. 12, pp. 2003–2015, Dec. 2001.
This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

18 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

[13] R. A. Fessenden, “Method of signalling,” U.S. Patent 1 050 728, [38] N. M. Nguyen and R. G. Meyer, “Start-up and frequency stability in
Jan. 14, 1913. high-frequency oscillators,” IEEE J. Solid-State Circuits, vol. 27, no. 5,
[14] E. W. Herold, “The operation of frequency converters and mixers for pp. 810–820, May 1992.
superheterodyne reception,” Proc. Inst. Radio Eng., vol. 20, no. 2, [39] T. J. Aprille and T. N. Trick, “Steady-state analysis of nonlinear circuits
pp. 84–103, Feb. 1942. with periodic inputs,” Proc. IEEE, vol. 60, no. 1, pp. 108–114, Jan. 1972.
[15] P. Sivonen, J. Tervaluoto, N. Mikkola, and A. Parssinen, “A 1.2-V RF [40] K. S. Kundert and A. Sangiovanni-Vincentelli, “Simulation of nonlinear
front-end with on-chip VCO for PCS 1900 direct conversion receiver circuits in the frequency domain,” IEEE Trans. Comput.-Aided Design
in 0.13-μm CMOS,” IEEE J. Solid-State Circuits, vol. 41, no. 2, Integr. Circuits Syst., vol. CAD-5, no. 4, pp. 521–535, Oct. 1986.
pp. 384–394, Feb. 2006. [41] M. Nakhla and J. Vlach, “A piecewise harmonic balance technique for
[16] H. Darabi, Radio Frequency Integrated Circuits and Systems. determination of periodic response of nonlinear systems,” IEEE Trans.
Cambridge, U.K.: Cambridge Univ. Press, 2015. Circuits Syst., vol. CAS-23, no. 2, pp. 85–91, Feb. 1976.
[17] “Spectrum analysis basics,” Keysight Technol., Santa Rosa, CA, USA, [42] K. S. Kundert, “Introduction to RF simulation and its application,” IEEE
Appl. Note 150, 2016. [Online]. Available: http://literature.cdn.keysight. J. Solid-State Circuits, vol. 34, no. 9, pp. 1298–1319, Sep. 1999.
com/litweb/pdf/5952-0292.pdf [43] M. Okumura, H. Tanimoto, T. Itakura, and T. Sugawara, “Numerical
[18] K. J. Wang, A. Swaminathan, and I. Galton, “Spurious tone suppres- noise analysis for nonlinear circuits with a periodic large signal exci-
sion techniques applied to a wide-bandwidth 2.4 GHz fractional-N tation including cyclostationary noise sources,” IEEE Trans. Circuits
PLL,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2787–2797, Syst. I. Fundam. Theory Appl., vol. 40, no. 9, pp. 581–590, Sep. 1993.
Dec. 2008. [44] J. Roychowdhury, D. Long, and P. Feldmann, “Cyclostationary noise
[19] M. Zanuso et al., “A wideband 3.6 GHz digital fractional-N PLL analysis of large RF circuits with multitone excitations,” IEEE J. Solid-
with phase interpolation divider and digital spur cancellation,” IEEE State Circuits, vol. 33, no. 3, pp. 324–336, Mar. 1998.
J. Solid-State Circuits, vol. 46, no. 3, pp. 627–638, Mar. 2011. [45] K. Mayaram, D. C. Lee, S. Moinian, D. A. Rich, and J. Roychowdhury,
[20] X. Gao, E. A. M. Klumperink, G. Socci, M. Bohsali, and B. Nauta, “Computer-aided circuit analysis tools for RFIC simulation: Algorithms,
“Spur reduction techniques for phase-locked loops exploiting a sub- features, and limitations,” IEEE Trans. Circuits Syst. II. Analog Digit.
sampling phase detector,” IEEE J. Solid-State Circuits, vol. 45, no. 9, Signal Process., vol. 47, no. 4, pp. 274–286, Apr. 2000.
pp. 1809–1821, Sep. 2010. [46] B. Wan and X. Wang, “Overview of commercially-available analog/RF
[21] C.-W. Yao et al., “A 14-nm 0.14-psrms fractional-N digital PLL with simulation engines and design environment,” in Proc. 12th IEEE Int.
a 0.2-ps resolution ADC-assisted coarse/fine-conversion chopping TDC Conf. Solid-State Integr. Circuit Technol., Oct. 2014, pp. 1–4.
and TDC nonlinearity calibration,” IEEE J. Solid-State Circuits, vol. 52, [47] Spectre Circuit Simulator and Accelerated Parallel Simulator RF Analy-
no. 12, pp. 3446–3457, Dec. 2017. sis User Guide, Ver. 16.1, Cadence Des. Syst., San Jose, CA, USA, 2017.
[22] P. Kartaschoff, “Frequency and time,” in Monographs in Physical [48] K. Kundert, “Modeling and simulation of jitter in phase-locked loops,”
Measurement. New York, NY, USA: Academic, 1978. in Analog Circuit Design: RF Analog-to-Digital Converters; Sensor
[23] Y. Frans et al., “A 56-Gb/s PAM4 wireline transceiver using a 32-way and Actuator Interfaces; Low-Noise Oscillators, PLLs and Synthesizers.
time-interleaved SAR ADC in 16-nm FinFET,” IEEE J. Solid-State New York, NY, USA: Springer, 1997.
Circuits, vol. 52, no. 4, pp. 1101–1110, Apr. 2017. [49] R. Achar and M. S. Nakhla, “Simulation of high-speed interconnects,”
[24] Ultrascale+ FPGA Selection Guide, Xilinx Corp., San Jose, CA, Proc. IEEE, vol. 89, no. 5, pp. 693–728, May 2001.
USA, 2017. [Online]. Available: https://www.xilinx.com/support/ [50] E.-P. Li, E.-X. Liu, L.-W. Li, and M.-S. Leong, “A coupled efficient and
documentation/selection-guides/ultrascale-plus-fpga-product-selection- systematic full-wave time-domain macromodeling and circuit simulation
guide.pdf method for signal integrity analysis of high-speed interconnects,” IEEE
[25] P. Kinget, “Integrated GHz voltage controlled oscillators,” in Analog Trans. Adv. Packag., vol. 27, no. 1, pp. 213–223, Feb. 2004.
Circuit Design. Boston, MA, USA: Springer, 1999, pp. 353–381. [51] S. Kapur and D. E. Long, “EMX user’s manual, ver. 4.6,” Integrand
[26] D. Ham and A. Hajimiri, “Concepts and methods in optimization of Softw., Berkeley Heights, NJ, USA, Tech. Rep., 2014.
integrated LC VCOs,” IEEE J. Solid-State Circuits, vol. 36, no. 6, [52] F. O’Mahony, C. P. Yue, M. A. Horowitz, and S. S. Wong, “Mahony,
pp. 896–909, Jun. 2001. “A 10-GHz global clock distribution using coupled standing-wave oscil-
[27] J. A. McNeill, “Jitter in ring oscillators,” IEEE J. Solid-State Circuits, lators,” IEEE J. Solid-State Circuits, vol. 38, no. 11, pp. 1813–1820,
vol. 32, no. 6, pp. 870–879, Jun. 1997. Nov. 2003.
[28] P. F. J. Geraedts, E. van Tuijl, E. A. M. Klumperink, G. J. M. Wienk, [53] S. C. Chan et al., “A resonant global clock distribution for the cell
and B. Nauta, “A 90 μW 12 MHz relaxation oscillator with a −162 dB broadband engine processor,” IEEE J. Solid-State Circuits, vol. 44, no. 1,
FOM,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. pp. 64–72, Jan. 2009.
Papers, Feb. 2008, pp. 348–618. [54] Z. Bai, X. Zhou, R. D. Mason, and G. Allan, “Low-phase noise clock
[29] Evolved Universal Terrestrial Radio Access (E-UTRA); User Equipment distribution network using rotary traveling-wave oscillators and built-in
(UE) Radio Transmission and Reception, document TR 36.101, 3GPP, self-test phase tuning technique,” IEEE Trans. Circuits Syst., II, Exp.
Jun. 2018. [Online]. Available: http://www.3gpp.org Briefs, vol. 62, no. 1, pp. 41–45, Jan. 2015.
[30] D. B. Leeson, “A simple model of feedback oscillator noise spectrum,” [55] M. H. Perrott, M. D. Trott, and C. G. Sodini, “A modeling approach for
Proc. IEEE, vol. 54, no. 2, pp. 329–330, Feb. 1966. fractional-N frequency synthesizers allowing straightforward noise
[31] B. Casper and F. O’Mahony, “Clocking analysis, implementation and analysis,” IEEE J. Solid-State Circuits, vol. 37, no. 8, pp. 1028–1038,
measurement techniques for high-speed data links—A tutorial,” IEEE Aug. 2002.
Trans. Circuits Syst. I, Reg. Papers, vol. 56, no. 1, pp. 17–39, Jan. 2009. [56] J. Zhuang, Q. Du, and T. Kwasniewski, “Event-driven modeling and
[32] GR-253-CORE, Telcordia Technol., Piscataway, NJ, USA, Sep. 2000, simulation of an digital PLL,” in Proc. IEEE Int. Behav. Modeling
no. 3. Simulation Workshop, Sep. 2006, pp. 67–72.
[33] R. J. Van de Plassche, CMOS Integrated Analog-to-Digital and Digital- [57] I. L. Syllaios, R. B. Staszewski, and P. T. Balsara, “Time-domain
to-Analog Converters, vol. 742. New York, NY, USA: Springer, 2013. modeling of an RF all-digital PLL,” IEEE Trans. Circuits Syst., II, Exp.
[34] W. Kester, “Converting oscillator phase noise to jitter, tutorial MT-008,” Briefs, vol. 55, no. 6, pp. 601–605, Jun. 2008.
Analog Devices, Norwood, MA, USA, Oct. 2008. [Online]. Available: [58] R. B. Staszewski, C. Fernando, and P. T. Balsara, “Event-driven simu-
http://www.analog.com/media/en/training-seminars/tutorials/MT-008. lation and modeling of phase noise of an RF oscillator,” IEEE Trans.
pdf Circuits Syst. I, Reg. Papers, vol. 52, no. 4, pp. 723–733, Apr. 2005.
[35] Q. Wang, H. Shibata, A. Liscidini, and A. C. Carusone, “A digital [59] C.-C. Kuo, M.-J. Lee, C.-N. Liu, and C.-J. Huang, “Fast statistical
filtering ADC with programmable blocker cancellation for wireless analysis of process variation effects using accurate PLL behavioral
receivers,” IEEE J. Solid-State Circuits, vol. 53, no. 3, pp. 681–691, models,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 56, no. 6,
Mar. 2018. pp. 1160–1172, Jun. 2009.
[36] J. Wu et al., “A 2.7 mW/channel 48–1000 MHz direct sampling full-band [60] K. Kundert and O. Zinke, The Designer’s Guide to Verilog-AMS.
cable receiver,” IEEE J. Solid-State Circuits, vol. 51, no. 4, pp. 845–859, New York, NY, USA: Springer, 2006.
Apr. 2016. [61] T. Decker and R. Temple, “Choosing a phase noise measurement
[37] R. Stephens, “Jitter analysis: The dual-dirac model, RJ/DJ, and technique,” in Proc. RF Microw. Meas. Symp. Exhib., 1999, pp. 1–64.
Q-scale,” Agilent Technol., Santa Clara, CA, USA, Appl. Note, 2004. [62] “Spectrum and signal analyzer measurements and noise,” Keysight
[Online]. Available: https://www.keysight.com/upload/cmc_upload/All/ Technol., Santa Rosa, CA, USA, Appl. Note 1303, 2017. [Online].
dualdirac1.pdf Available: https://literature.cdn.keysight.com/litweb/pdf/5966-4008E.pdf
This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

GALTON AND WELTIN-WU: UNDERSTANDING PHASE ERROR AND JITTER 19

[63] J. Wolf, “Phase noise measurements with spectrum analyzers of [86] D. W. Allan, “Statistics of atomic frequency standards,” Proc. IEEE,
the FSE family,” Rohde & Schwarz, Munich, Germany, Appl. Note vol. 54, no. 2, pp. 221–230, Feb. 1966.
1EPAN 16E, 1995. [Online]. Available: https://cdn.rohde-schwarz.com/ [87] J. A. Barnes, “Atomic timekeeping and the statistics of precision signal
pws/dl_downloads/dl_application/application_notes/1epan16/1epan16e. generators,” Proc. IEEE, vol. 54, no. 2, pp. 207–220, Feb. 1966.
pdf [88] W. H. Press, “Flicker noises in astronomy and elsewhere,” Comments
[64] G. Feldhaus and A. Roth, “A 1 MHz to 50 GHz direct down-conversion Astrophys., vol. 7, no. 4, pp. 103–119, 1978.
phase noise analyzer with cross-correlation,” in Proc. Eur. Freq. Time [89] E. Milotti. (2002). “1/f noise: A pedagogical review.” [Online]. Avail-
Forum, Apr. 2016, pp. 1–4. able: https://arxiv.org/abs/physics/0204033
[65] “E5052B signal source analyzer—Advanced phase noise and tran- [90] D. W. Allan, M. A. Weiss, and J. L. Jespersen, “A frequency-domain
sient measurement techniques,” Keysight Technol., Santa Rosa, view of time-domain characterization of clocks and time and fre-
CA, USA, Appl. Note 5989-7273EN, 2017. [Online]. Available: quency distribution systems,” in Proc. 45th Annu. Symp. Freq. Control,
http://literature.cdn.keysight.com/litweb/pdf/5989-7273EN.pdf May 1991, pp. 667–678.
[66] W. F. Walls, “Cross-correlation phase noise measurements,” in Proc. [91] S. T. Hutsell et al., “Operational use of the Hadamard variance in GPS,”
46th IEEE Freq. Control Symp., May 1992, pp. 257–261. Naval Observatory Alternative Master Clock, Schreiver Air Force Base,
[67] B. Fetz and G. LeCheminant, “Measuring Mult-Gb/s signals…‘what Colorado Springs, CO, USA, Tech. Rep., 1996.
type of oscilloscope should i use?”’ Agilent Technologies, Santa [92] M. Schioppo et al., “Ultrastable optical clock with two cold-atom
Clara, CA, USA, Appl. Note, 2006. [Online]. Available: https:// ensembles,” Nature Photon., vol. 11, no. 1, pp. 48–52, 2017.
www.keysight.com/upload/cmc_upload/All/Which_scope_to_use06.pdf [93] N. Hinkley et al., “An atomic clock with 10⣓18 instability,” Science,
[68] Infiniium Z-Series Oscilloscopes, Data Sheet, Keysight Technol., vol. 341, no. 6151, pp. 1215–1218, 2013.
Santa Rosa, CA, USA, 2017. [Online]. Available: https://literature.cdn. [94] D. W. Allan and J. A. Barnes, “A modified ‘allan variance’ with
keysight.com/litweb/pdf/5991-3868EN.pdf increased oscillator characterization ability,” in Proc. 35th Annu. Freq.
[69] G. Breed, “Analyzing signals using the eye diagram,” High Freq. Control Symp., May 1981, pp. 470–475.
Electron., vol. 4, no. 11, pp. 50–53, 2005. [95] D. A. Howe, “The total deviation approach to long-term characteriza-
[70] Clock Jitter Analysis With Femto-Second Resolution, Tutorial, Keysight tion of frequency stability,” IEEE Trans. Ultrason., Ferroelectr., Freq.
Technol., Santa Rosa, CA, USA, 2008. [Online]. Available: https://www. Control, vol. 47, no. 5, pp. 1102–1110, Sep. 2000.
keysight.com/upload/cmc_upload/All/Clock_Jitter_Analysis_2008.pdf [96] R. A. Baugh, “Frequency modulation analysis with the Hadamard
[71] R. A. Hulse and J. H. Taylor, “Discovery of a pulsar in a binary system,” variance,” in Proc. IEEE 25th Annu. Symp. Freq. Control, Apr. 1971,
Astrophys. J., vol. 195, pp. 51–53, Jan. 1975. pp. 222–225.
[72] X. Li et al., “Accuracy and reliability of multi-GNSS real-time pre- [97] W. Riley, “Handbook of frequency stability analysis,” NIST,
cise positioning: GPS, GLONASS, BeiDou, and Galileo,” J. Geodesy, Gaithersburg, MD, USA, Tech. Rep. 1065, 2008.
vol. 89, no. 6, pp. 607–635, 2015. [98] J. Rutman, “Characterization of phase and frequency instabilities in
[73] P. Kartaschoff and J. A. Barnes, “Standard time and frequency genera- precision frequency sources: Fifteen years of progress,” Proc. IEEE,
tion,” Proc. IEEE, vol. 60, no. 5, pp. 493–501, May 1972. vol. 66, no. 9, pp. 1048–1075, Sep. 1978.
[74] S. P. Benz and C. A. Hamilton, “Application of the Josephson effect
to voltage metrology,” Proc. IEEE, vol. 92, no. 10, pp. 1617–1629,
Oct. 2004.
[75] S. A. Gronemeyer, “Calibrated real time clock for acquisition of GPS
signals during low power operation,” U.S. Patent 6 662 107, Dec. 9, 2003. Ian Galton (F’11) received the Sc.B. degree from
[76] M. A. Lombardi, T. P. Heavner, and S. R. Jefferts, “NIST primary Brown University in 1984, and the M.S. and Ph.D.
frequency standards and the realization of the SI second,” NCSLI Meas., degrees from the California Institute of Technology
vol. 2, no. 4, pp. 74–89, 2007. in 1989 and 1992, respectively, all in electrical engi-
[77] Proceeding of the IEEE-NASA Symposium on the Definition and Mea- neering. Since 1996, he has been a Professor of elec-
surement of Short-Term Frequency Stability, Goddard Space Flight trical engineering with the University of California,
Center, Greenbelt, MD, USA, 1964. San Diego, where he teaches and conducts research
[78] C. A. Greenhall, “Spectral ambiguity of Allan variance,” IEEE Trans. in the field of mixed-signal integrated circuits and
Instrum. Meas., vol. 47, no. 3, pp. 623–627, Jun. 1998. systems for communications. His research involves
[79] K. L. Senior, J. R. Ray, and R. L. Beard, “Characterization of periodic the invention, analysis, and integrated circuit imple-
variations in the GPS satellite clocks,” GPS Solutions, vol. 12, no. 3, mentation of critical communication system blocks
pp. 211–225, 2008. such as data converters and phase-locked loops.
[80] L. S. Cutler and C. L. Searle, “Some aspects of the theory and
measurement of frequency fluctuations in frequency standards,” Proc.
IEEE, vol. 54, no. 2, pp. 136–154, Feb. 1966.
[81] W. A. Marrison, “The crystal clock,” Proc. Nat. Acad. Sci. USA, vol. 16,
no. 7, pp. 496–507, 1930.
[82] J. A. Barnes et al., “Characterization of frequency stability,” IEEE Trans. Colin Weltin-Wu (M’15) received the B.S. degree
Instrum. Meas., vol. IM-20, no. 2, pp. 105–120, May 1971. in math and the M.E. degree in electrical engi-
[83] J. Kalisz, “Review of methods for time interval measurements with neering from the Massachusetts Institute of Tech-
picosecond resolution,” Metrologia, vol. 41, no. 1, pp. 17–32, 2004. nology and the Ph.D. degree from Columbia
[84] S. T. Dawkins, J. J. McFerran, and A. N. Luiten, “Considerations on University. He spent 15 months, starting in 2014,
the measurement of the stability of oscillators with frequency counters,” collaborating with I. Galton at the University of
IEEE Trans. Ultrason., Ferroelectr., Freq. Control, vol. 54, no. 5, California at San Diego. He is currently involved
pp. 918–925, May 2007. in high-performance phase-locked loops at Analog
[85] J. E. Gray and D. W. Allan, “A method for estimating the frequency Devices, Inc.
stability of an individual oscillator,” in Proc. 28th Annu. Symp. Freq.
Control, May 1974, pp. 243–246.

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