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5.allegro Constraint Manager

Allegro constraint manager

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0% found this document useful (0 votes)
74 views

5.allegro Constraint Manager

Allegro constraint manager

Uploaded by

bf
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 32

1101/2023

Constraint Manager of Allegro

Engineer Zargham Haider Kazmi


[email protected]
National Institute of Electronics Islamabad, Pakistan
Constraint Manager includes five types of constraints:
1. Electrical Constraints: Performance characteristics
2. Physical Constraints: Line width, via selection, and layer restrictions
3. Spacing Constraints: Clearances between lines, pads, vias, and copper areas
(shapes)
4. Same Net Spacing Constraints: Clearances between lines, pads, vias, and
copper areas (shapes) on the same net
5. Design Constraints: Package to package checks, soldermask & pastemask
checks and negative plane island checks

• Physical and Spacing include two categories of constraints:


– Default Rules: Used to specify rules to be applied to nets that have no
special routing requirements
– Special Rules: Nets that require unique constraint
Setup > Constraints > Constraint Manager or click on this logo
Physical

• Top displays element


informationDisplay > Constraint
– DescriptionSingle select
– X/Y location
– Net name

• Bottom displays constraint


rules
– Constraint set name
– Constraint set rules
Spacing

• Top displays element Display > Constraint information Drag Select


– Description
– X/Y location
– Net name

• Bottom displays
constraint rules
– Constraint set
name
– Constraint set
rules
Electrical Constraints
• Total Etch Length Constraint
• Differential Pair Constraints
– Uncoupled Length
Additional Electrical Constraints Allegro PCB Designer

• Wiring Constraints
‒ Net Scheduling
‒ Parallelism
‒ Layer Sets Rules
• Via Constraints
− Max Via Count
− Matched Vias
• Impedance
• Min/Max Propagation Delays
• Differential Pair - Static Phase Tolerance
• Relative Propagation Delay
Naming Rules for Signals within Differential Pairs Examples:

SignalName_P SignalNameP
SignalName_N SignalNameN

SignalName_H SignalNamaH
SignalName_L SignalNameL

SignalName_+ SignalName+
SignalName_- SignalName-
Auto Setup in OrCAD Capture

Tools > Create Differential Pair > Auto Setup


Auto Generate in PCB Editor

Logic > Assign Differential Pair > Auto Generate…


Defining in Constraint Manager Manually
Create > Differential Pair…
Primary Line Width

• The trace width that should be used to route the differential pair nets
the majority of the time
• The width you prefer your differential pairs to be routed

Minimum line width


Primary Gap

• The Spacing, edge to edge, that should be used to route the


differential pair nets the majority of the time
• The rule you prefer your differential pairs to follow
• This only applies to the two differential pair nets. Other net spacing
to the differential pair nets is controlled by the Spacing
Rule set Line to Line clearance
Minimum trace to trace gap
Neck Width
Neck Gap

Neck Width and Neck Gap

• Rules to be applied when the traces must “squeeze” down to be


routed between pins/vias (for example, in BGA areas)
• Neck Gap is the new spacing, edge to edge, that should be routed to
route the differential pair
• Neck Width is the new trace width that should be used to route the
differential pairs
Separation Gap Tolerance
• Coupled Tolerance (+)/(-)
‒ Provides a coupling range based on the Primary Separation Gap
‒ Summing Primary Separation Gap and Coupled Tolerance (+) provides
the maximum coupled gap
‒ Subtracting Primary Separation Gap and Coupled Tolerance (-) provides
the minimum coupled gap
‒ Values above or below these become an uncoupling event
Primary Separation plus Primary Separation
(+) Tolerance minus (-) Tolerance

Primary Separation Gap


Minimum Line Space
• For the differential pair itself
• If set, this value must be less than your Primary Gap minus the
Coupled Tolerance Minus value
• Use this value to override the Spacing Constraint set line-toline value
Min Line Spacing

Max Uncoupled Length


• Maximum length of uncoupled trace summed throughout the entire
differential pair route
• See green etch below:
Gathered

Ungathered
Gather Control
• Choices are Include & Ignore
• Controls whether or not to include the etch length from pin to gather
point when calculating Max uncoupled length

This length is Include OR ALWAYSIgnore this total


includedlength

Gather points
Static Phase Tolerance
• Allowable difference in length between the differential pair nets
• When the Phase Tolerance Value is -1 (unspecified), phase checking
is disabled
Length of net A

Length of net B
Physical Constraints
• Differential Pair Constraints set in the Physical Domain
Electrical Constraints
• Differential Pair Constraints set in the Electrical Domain
Routing Options
Route > Connect Horizontal

Vertical

Diagonal Up

Diagonal Down
Working with Differential Pairs
• Pseudo-segments graphically show uncoupling errors in the board
– Once the length of uncoupled etch exceeds the set value, every segment that
is uncoupled is highlighted in this way

• Red and Green Meter guides the routing of Differential Pairs and
signals with Length Constraints
– Static Phase Tolerance
– Total Etch Length
Electrical Constraints Total
Etch Length
• May be assigned to a Net, Xnet, Bus or Differential Pair
• Both Min and Max are etch length values with optional units
• If no units are specified, drawing units are assumed
• Either value is optional – May specify only Min, or only Max
Total Etch Length - Delay Tune
• Use the Delay Tune function to add length
• May also be used to match the length of a group of nets
Topology & Stub Length

Note: Available only in Allegro PCB Designer and above.


Layer Sets & Exposed Length
Parallel

Note: Available only in Allegro PCB Designer and above.


Vias - Via Count & Match Vias
Impedance
Min/Max Propagation Delays
Relative Propagation Delay

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