International Journal of Power Electronics and Drive Systems (IJPEDS)

Vol. 12, No. 1, Mar 2021, pp. 183~198

ISSN: 2088-8694, DOI: 10.11591/ijpeds.v12.i1.pp183-198  183

Design of a continuously and linearly controlled VSI-based

STATCOM for load current balancing purposes

Faris Asaad Abdulmunem1, Abdulkareem Mokif Obais2

1Department of Electrical Engineering, University of Babylon, Babylon, Iraq
2Department of Biomedical Engineering, University of Babylon, Babylon, Iraq

Article Info ABSTRACT

Article history: In this paper, load current balancing are reviewed in both three-wire and 4-
wire systems taking into account linearity, harmonics injection, and control
Received Sep 24, 2020 schemes. A linearized static compensator (STATCOM) based on H-bridge
Revised Jan 19, 2021 voltage source inverter (VSI). The proposed STATCOM is controlled in
Accepted Feb 7, 2021 closed loop mode via equipping it with a new current controller. The DC
capacitor voltage of the STATCOM is kept constant without using external
energy injection or storage devices via shunting the DC capacitor with a
Keywords: suitable series filter. The simulation results of the current responses of the
220V, 50Hz STATCOM reveal continuous and linear performance during
Load compensation responding to reactive current demands from 123A inductive current to 227A
Power factor correction capacitive current. The transition time required for the proposed STATCOM
Power quality during treatment of a sudden change in reactive current demand from
Reactive power control maximum inductive current to maximum capacitive current is less than
STATCOMs 40ms. The steady state portions of the STATCOM current responses show
pure sinusoids, thus the proposed STATCOM can be promoted as harmonic
free static Var compensator. The closed loop continuous mode control and
the considerable linearity of the proposed STATCOM promot it as a bipolar
susceptance (capacitive and inductive) in applications of load current
balancing systems in both three and four wire power systems.
This is an open access article under the CC BY-SA license.

Corresponding Author:
Abdulkareem Mokif Obais
Departement of Biomedical Engineering
University of Babylon
Hilla, Babylon, Iraq
Email: [email protected]

1. INTRODUCTION
In 1981, an advanced static Var compensator in prototype form was introduced by [1]. The
compensator was built using force-commutated inverters. This prototype founded a basis for STATCOM
concept. The rapid increasing in the switching frequencies of the solid-state switching devices beside the
development in multilevel technologies makes it possible to apply pulse width modulation (PWM)
techniques in the STATCOMs designed for high power applications. The control scheme of a PWM-based
STATCOM was investigated by [2]. During the model implementation of the controller, the STATCOM was
modeled in the discrete time domain. An eight-level reinjection converter based STATCOM was proposed by
[3] to provide very low distortion levels compared to a similar configuration using clamping diodes, even
though the numbers of the main switching devices in both configurations were equal. STATCOMs are
traditionally realized by voltage source converters, but for certain applications such as using a STATCOM as
current injection device, current source converter based STATCOMs can introduce better performance [4].
The controlling strategies, harmonic analysis, operating points optimization, voltage unbalance mitigation,

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184  ISSN: 2088-8694

optimal modulation, modulation dynamic, real time analysis, transient response, and configuration layout of
different STATCOMs were investigated in [5]-[7]. In [8], the H-bridge DC capacitors were charged initially
in a proposed star-connected multilevel STATCOMs in order to guarantee the possibility of their
equalization. In [9], a shunt active filter based on one-cycle control for load compensation of a three-phase
four-wire system was investigated. In [10], a proposed controlling scheme for cascaded full bridge voltage
source inverter (VSI) based STATCOM concentrated on individual balancing of the capacitor voltages of the
full-bridge converters (H-bridge converters). The balancing process was carried out by comparing the
instantaneous voltage of the H-bridge capacitor voltage with a reference one. A DSTATCOM devised from a
low rating voltage source converter (VSC) and a zigzag transformer was introduced by [11] for improving
the power quality of a three-phase four-wire distribution system. Voltage control, current control, and
integrated control schemes were employed in a three-phase STATCOM for compensating unbalanced
voltages and currents [12]. A ∆-connected multilevel cascade converter based STATCOM was proposed by
[13]. In the proposed STATCOM, the series reactors were connected in series to mutually coupled reactors.
The mutually coupled reactors offered paths for circulating currents to flow.
In this research, a continuously and linearly controlled voltage source inverter (VSI) based full-
bridge STATCOM is designed and tested. This STATCOM is characterized by high linearity and is harmonic
free, thus it can considerably be exploited for load current balancing and energy saving purposes.

2. THE PROPOSED LINEARIZED H-BRIDGE VSI BASED STATCOM

A STATCOM in general is either a voltage source inverter (VSI) with its DC source replaced by a
DC capacitor or current source inverter (CSI) with its DC source replaced by a DC reactor. Both categories
of power converters exchange active power and reactive power with the AC source to some extents through
small reactors. These definitions are applicable for both single and three-phase STATCOMs. Since
STATCOMs can be employed in both active and reactive power applications, they are usually referred to as
static compensators. The single-phase VSI-based STATCOM is shown in Figure 1. The STATCOM solid-
state switching devices Z1, Z2, Z3, and Z4 are insulated-gate bipolar transistors (IGBTs) equipped with fast
free-wheeling diodes. vAC and VDC represent the instantaneous voltage of the AC source and the DC capacitor
voltage, respectively. The current iS represents the instantaneous STATCOM current. LST and RST are the self-
inductance and resistance of the STATCOM reactor. The voltage vi represents the STATCOM or the VSI
generated voltage. The STATCOM of Figure 1 is usually referred to as H-bridge STATCOM. Such
STATCOMs are triggered by using sinusoidal pulse width modulation (SPWM) techniques. If VDC is kept
constant and the STATCOM is triggered by the unipolar sinusoidal pulse width modulation (USPWM)
shown in Figure 2, then vi will be given by
𝑉𝐷𝐶
𝑣𝑖 = (𝑉𝑍1 − 𝑉𝑍3 ) (1)
5

Where, VZ1 and VZ3 are the USPWM triggering signals of Z1 and Z3, respectively. β is the
STATCOM angle and it represents the phase shift of the modulating signal vMOD with respect to vAC. vTRI is
the carrier signal, which is a triangular waveform of amplitude of VTRI and frequency of fC. Note that vMOD is a
sinusoidal signal of amplitude AMOD and frequency f which is the same frequency of the AC source (f=ω/2π).
The term (VZ1-VZ3) is positive when vMOD is positive and vice versa. The modulating signal vMOD can be
defined as (2).

𝑣𝑀𝑂𝐷 = 𝑉𝑀𝑂𝐷 𝑠𝑖𝑛(𝜔𝑡 + 𝛽) (2)

For a STATCOM of a modulation index m, the average of vi within vTRI duration time TC is
designated by Viav and is determined by (3)

1 𝑇𝐶 1 𝑡′ 𝑡′
𝑉𝑖𝑎𝑣 = ∫ 𝑣𝑖
𝑇𝐶 0
𝑑𝑡′ =
𝑇𝐶
(∫𝑡′ 2 𝑉𝐷𝐶 𝑑𝑡′ + ∫𝑡′ 4 𝑉𝐷𝐶 𝑑𝑡′) = 𝑚𝑉𝐷𝐶 𝑠𝑖𝑛(𝜔𝑡 + 𝛽) (3)
1 3

The STATCOM modulation index m is defined by (4)

𝐴𝑀𝑂𝐷
𝑚= (4)
𝐴𝑇𝑅𝐼

Int J Pow Elec & Dri Syst, Vol. 12, No. 1, March 2021 : 183 – 198
Int J Pow Elec & Dri Syst ISSN: 2088-8694  185

To make (3) applicable over the carrier signal stream, the time t is substituted by kTC and ω by 2π/T.
Where, T is the time duration of the modulating signal and k=1, 2, 3, and so on. Consequently, (3) can be
rewritten as (5):

2𝜋 2𝜋
𝑉𝑖𝑎𝑣 (𝑘) = 𝑚𝑉𝐷𝐶 𝑠𝑖𝑛 ( 𝑘𝑇𝐶 + 𝛽) = 𝑚𝑉𝐷𝐶 𝑠𝑖𝑛 ( 𝑘 + 𝛽) (5)
𝑇 𝑁

where, N is defined by (6)

𝑇
𝑁= (6)
𝑇𝐶
The variation of Viav as function of ωt exhibits sinusoidal envelope and is in phase with vMOD, thus it
can be considered as the instantaneous fundamental component of voltage v1 generated by the VSI, which can
be expressed by (7)

𝑣1 = 𝑚𝑉𝐷𝐶 𝑠𝑖𝑛(𝜔𝑡 + 𝛽) (7)

Assuming that the STATCOM reactor suppresses all current harmonics, the STATCOM rms
fundamental current IS can be given as (8)

𝑉𝐴.𝐶 −𝑉1 ∠𝛽
𝐼𝑆 = (8)
𝑅𝑆𝑇 +𝑗𝜔𝐿𝑆𝑇

where, VAC is the rms voltage of the AC source and V1 is the rms voltage of v1. V1 can be defined as (9)
𝑚𝑉𝐷𝐶
𝑉1 = (9)
√2

Assuming that RST is negligible compared to ωLST, (8) can be rewritten as (10)

(𝑉𝐴𝐶 −𝑉1 ∠𝛽)

𝐼𝑆 = (10)
𝑗𝜔𝐿𝑆𝑇

If the angle β is small and V1 is greater than VAC, IS will be to some extent pure capacitive, while it
will be pure inductive if V1 is less than VAC. In general, small negative values of β make V1 greater than VAC
and according to (10), IS will be capacitive, while small positive values of β make V1 smaller than VAC and
subsequently, IS will be inductive. The response of a certain STATCOM to β changing depends on many
factors such as inverter switching losses, switching devices ON and OFF times, the dead time TD between the
triggering pulses of the switching devices on the same limb, modulation index, and passive element values.
Some controlling techniques adopted phase-shifted sinusoidal PWM (SPWM) to control the current of the H-
bridge STATCOM [14]. The study proposed by [15] had adopted the phase-shifted multicarrier unipolar
PWM to control the STATCOM current. This type of control helps to decrease the effect of multi-switching
during STATCOM triggering. Many techniques subjected STATCOM current control to lookup tables
relating β values to the magnitude and phase values of the STATCOM current [8], [16]-[18]. Closed loop
techniques are widely used to control STATCOM current by comparing the STATCOM current with a
reference one. In these techniques, phase locked loops are usually employed to synchronize the STATCOM
with the grid [10], [19]-[20]. Proportional and proportional integral controllers are broadly employed for
STATCOM current control [13], [21]-[25].
The STATCOM shown in Figure 1 is modified here to meet the requirements of being continuously
and linearly controlled harmonic-free compensating susceptance. The modification is involved in two steps;
in the first step VDC is kept constant at a certain level for each compensating current without using external
energy injection or storage devices, while in the second step, the reactive compensating current is brought to
its steady state value within a shorter time compared with other controlling techniques [16], [17]-[25].
The first step of STATCOM modification is accomplished by using a series harmonic filter
connected in parallel with VDC as shown in Figure 3. The second step represents the most important
modification and is accomplished by devising a new controlling technique. In this technique, the STATCOM
angle β is controlled within a range of -5.730 to +5.730. In this range of β, the modified STATCOM current is
guaranteed to be pure reactive (either capacitive or inductive).

Design of a continuously and linearly controlled VSI-based STATCOM for … (Faris Asaad Abdulmunem)
186  ISSN: 2088-8694

Figure 1. The VSI-based H-bridge STATCOM

Figure 2. USPWM triggering signals generation of the VSI-based STATCOM

Int J Pow Elec & Dri Syst, Vol. 12, No. 1, March 2021 : 183 – 198
Int J Pow Elec & Dri Syst ISSN: 2088-8694  187

1
RCT Z1 Z3

3
Series reactors
CF
0 2
TX1
LST1 RST1 LST2 RST2
1 2 1 2 CDC LF

TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05

1
Current transformer cct RF

1
Z4 Z2

3
VAC CSH

Statcom new controller Statcom driving circuit

Figure 3. The layout of the proposed linearized STATCOM

a. The devised controlling technique

The schematic modeling of the devised controlling technique is shown in Figure 4. After detecting
the STATCOM instantaneous current iS by the current transformer and converting it to the voltage signal kSiS,
the latter signal is processed within the sample and hold circuits to get the analogue voltage kSISm. Where, ISm
is the amplitude of iS and kS is a constant depending on the current transformer primary to secondary turn
ratio and the resistor RCT. The analogue voltage kSISm is subtracted from kSIDm which is another analogue
signal proportional to the amplitude of the required reactive demand IDm. The result of subtraction is ∆kSISm
which is an analogue voltage proportional to the amount of deviation of the actual STATCOM current from
the required reactive current demand. Note that ISm is a polar quantity. Its value is positive during capacitive
reactive current demand and negative during inductive current demand. This means that detecting ISm means
detecting the magnitude and phase of the STATCOM current. The most important part of the above
controller is the STATCOM angle controller. It involves two identical NPN bipolar junction transistors Q1
and Q2 which are biased in the active regions near cutoff. Vγ is the cut in threshold voltage of these
transistors. According to the biasing status of Q1 and Q2, their base currents iB1 and iB2 can be expressed as
(11) and (12)

𝛥𝑉(𝛽)
𝑖𝐵1 = , Δ𝑉(𝛽) ≥ 0 (11)
𝑅𝐵1

−𝛥𝑉(𝛽)
𝑖𝐵2 = , Δ𝑉(𝛽) ≤ 0 (12)
𝑅𝐵2

Where, ∆V(β) is an analogue voltage signal proportional to the error of the STATCOM angle β. If
Q1 and Q2 are in their active regions, then their collector currents iC1 and iC2 can be determined as (13) and
(14):

ℎ𝐹𝐸 𝛥𝑉(𝛽)
𝑖𝐶1 = ℎ𝐹𝐸 𝑖𝐵1 = , Δ𝑉(𝛽) ≥ 0 (13)
𝑅𝐵1

−ℎ𝐹𝐸𝐸 𝛥𝑉(𝛽)
𝑖𝐶2 = ℎ𝐹𝐸 𝑖𝐵2 = , Δ𝑉(𝛽) ≤ 0 (14)
𝑅𝐵2

Where, hFE is the forward DC current gain of the common emitter configuration. The DC forward
current gain is used in this analysis, since the transistor's input voltages are slow varying signals. In case of
saturation, the currents iC1 and iC2 can be given by (15) and (16)

Design of a continuously and linearly controlled VSI-based STATCOM for … (Faris Asaad Abdulmunem)
188  ISSN: 2088-8694

𝑉𝐶𝐶 −𝑉(𝛽)
𝑖𝐶1 = , Δ𝑉(𝛽) ≥ 0 (15)
𝑅𝐶1

𝑉(𝛽)+𝑉𝐶𝐶
𝑖𝐶2 = , Δ𝑉(𝛽) ≤ 0 (16)
𝑅𝐶2

Sampling at (dv AC /dt )  0, vAC = 0 k S I Sm

GAIN = A
k 2 BS k S I Dm k S I
GAIN = 0.5 k
k S I Sm 2k S I Sm k S I Sm
kS I SmAV
Samplle/hold
Sampling pulses

(1) k

kS iS
generator

RAV1
100

− kS I Sm CAV1
100u
Samplle/hold 0
(2)
Averager (1)
k S I SmAV

Sampling at (dv AC /dt )  0, v AC = 0

Statcom current magnitude detector

V ( )
+VCC

iC 1 VAV ( )
RC1
iB1
Q1
VAV ( )
iC
V
RB1 V ( ) RAV2
100
Buffer
CAV2
RC2 C 100u
iB 2 0
GAIN = -1 iC 2 0 Averager (2)
Q2
k
RB2
V − VCC
-VCC

Statcom angle controller Statcom angle error estimator

VUSPWM+
vMOD
+ DELAY = TD 1
3
vZ 1
Comparator (1) 2

- DELAY
1 2
GAIN = m
vM vMOD
1 vZ 4
k3v A.C DELAY = 5m vS vTRI 2
3

k 1 2

DELAY MULTIPLIER2
Modulating index - DELAY = TD
GAIN = -1
controller Comparator (2) 4 vZ 3
6
5
k + DELAY

1 2
VUSPWM− vZ 2
− vMOD
1
3
2
1 2

Statcom modulating signal generater Statcom triggering circuit

Figure 4. The devised controlling scheme

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Int J Pow Elec & Dri Syst ISSN: 2088-8694  189

Where, V(β) is an analogue voltage signal proportional to the STATCOM angle. If V(β) is more
positive than VCC or more negative than –VCC, then (15) and (16) are no longer being applicable. The current
iC of the capacitor C is determined as (17):

𝑖𝐶1 + 𝑖𝐵1 , Δ𝑉(𝛽) ≥ 0

𝑖𝐶 = ( ) (17)
−𝑖𝐶2 , Δ𝑉(𝛽) ≤ 0

The voltage across the capacitor C, is V(β) which represents the analogue signal controlling a part in
this controller responsible for generating the modulating signal vMOD. The analogue signal V(β) can be
expressed as (18):
1
𝑉(𝛽) = ∫ 𝑖𝐶 𝑑𝑡 (18)
𝐶

The error signal ∆V(β) is determined by (19)

𝛥𝑉(𝛽) = 𝛥𝑉𝐴𝑉 (𝛽) + 𝑘𝑆 𝛥𝐼 (19)

where, ∆VAV(β) and ∆I are defined by (20) and (21)

𝛥𝑉𝐴𝑉 (𝛽) = 𝑉𝐴𝑉 (𝛽) − 𝑉(𝛽) (20)

𝛥𝐼 = 𝛥𝐼𝑆𝑚 + 𝛥𝐼𝑆𝑚𝐴𝑉 (21)

where, VAV(β) represents the instantaneous average value of V(β), and the current error components ∆ISm and
∆ISmAV are defined by (22) and (23)

𝛥𝐼𝑆𝑚 = 𝐼𝐷𝑚 − 𝐼𝑆𝑚 (22)

𝛥𝐼𝑆𝑚𝐴𝑉 = 𝐼𝑆𝑚𝐴𝑉 − 𝐼𝑆𝑚 (23)

Where, ISmAV is the instantaneous average value of ISm. As iC grows positive rapidly, V(β) builds up
rapidly too and it may make significant overshoots. The error signals defined by the terms kS∆ISmAV and
∆VAV(β) decrease the chances for V(β) to exhibit overshoots and make the STATCOM current tend faster
toward its desired value. Both terms vanish as V(β) attains its steady state value. The analogue voltage V(β)
determines the phase angle by which, the modulating signal vMOD will be shifted from the original AC voltage
applied across the STATCOM terminals. V(β) varies in the range of –VCC to +VCC. If ∆V(β) is positive, C will
charge through Q1 towards VCC, while C will discharge towards -VCC through Q2 if ∆V(β) becomes negative.
The STATCOM modulating signal generator is built of a time delayer of 5msec, analogue multiplier,
summer, and a voltage amplifier of forward gain of m which is related directly to the STATCOM modulation
index. The analogue voltage k3vAC is a low voltage sinusoidal signal proportional to the AC supply voltage.
For a 50-Hz AC power supply, the 5msec delay represents a phase delay of π/2. If the AC voltage vAC is
expressed as Vmsin(ωt), then the output of the analogue multiplier vM will be determined as (24):

𝜋
𝑣𝑀 = 𝑘3 𝑉𝑚 𝑠𝑖𝑛 (𝜔𝑡 − ) 𝑉(𝛽)𝐴𝑀 = −𝑉(𝛽)𝐴𝑀 𝑘3 𝑉𝑚 𝑐os(𝜔𝑡) (24)
2

where, Vm is the amplitude of vAC and AM is the gain of the analogue multiplier. The summing amplifier
output vS can be given by (25)

𝑣𝑆 = 𝑘3 𝑣𝐴.𝐶 + 𝑣𝑀 = 𝑘3 𝑉𝑚 𝑠𝑖𝑛(𝜔𝑡) − 𝑉(𝛽)𝐴𝑀 𝑘3 𝑉𝑚 𝑐os(𝜔𝑡)

2
= 𝑘3 𝑉𝑚 (√(𝐴𝑀 𝑉(𝛽)) + 1) 𝑠𝑖𝑛(𝜔𝑡 − 𝑡𝑎𝑛−1 (𝐴𝑀 𝑉(𝛽))) (25)

If |AMV(β))| is very much less than unity, (25) can be reduced to (26)

𝑣𝑆 ≅ 𝑘3 𝑉𝑚 𝑠𝑖𝑛(𝜔𝑡 − 𝐴𝑀 𝑉(𝛽)) = 𝑘3 𝑉𝑚 𝑠𝑖𝑛(𝜔𝑡 + 𝛽) (26)

where, β is defined by (27)

Design of a continuously and linearly controlled VSI-based STATCOM for … (Faris Asaad Abdulmunem)
190  ISSN: 2088-8694

𝛽 = −𝐴𝑀 𝑉(𝛽) (27)

By varying β in the range of (-0.1 to +0.1) radians, the voltage generated by the STATCOM varies
from minimum to maximum. This radian range corresponds to a degree range of -5.730 to +5.730. The
maximum capacitive current of the STATCOM corresponds to β of -5.730, while the maximum inductive
current corresponds to β of +5.730. By varying β from +5.730 to -5.730, the STATCOM current can be varied
from maximum inductive to maximum capacitive.

b. Design of the proposed linearized STATCOM

Figure 5 shows the PSpice implementation of the modified statcom. In this figure, the STATCOM
controller involves the generated electronic parts simulating the schematic design items shown Figure 4.

CM300DY -24H CM300DY -24H

G1 G3

1
RCT1
0.1 Z1 Z2
k1iS

3
CF
k1 1000uF k3
0 2
TX1
LST1 RST1 LST2 RST2 LF
1 2 1 2 CDC 2.5mH
2000uF
TN33_20_11_2P90 1.25mH 0.05 1.25mH 0.05

G4 1 G2
1 RF

1
0.0625
+V Z3 Z4
3

3
CSH1
VAC1 VOFF = 0 10uF k4 k2
VAMPL = 311V
FREQ = 50Hz CM300DY -24H CM300DY -24H
AC = 0

-V

Power Circuit

R1
5.1k
+15V
8

VTRI R2
+V 10k 3
V+

-V + +5V -5V +15V -15V k1IDm

U1A 1
V1 = -5V 0 OUT
V2 = 5V 2 R4 R5 R6 R7
TD = 0 R3 - 4 0.001 0.001 0.001
VTR1 V- 0.001
TR = 199.5us 306k R8 AD648A
TF = 199.5us 306k
PW = 1us -15V V1 V2 V3 V4 V5
k3VAC
PER = 400us 5V 5V 15V 15V 3V
0 R11 R12 R9 R10
5k 5k 5.1k 10k
0 0 0 0 0
0 0

Waveforms generating circuit

U2 U4
U3
k1iS K1IS k1IDm K2BS

K1ISM K1ISM DV(BETA) DV(BETA) V(BETA)

k3VAC K3V V (BETA)

CURRENT DETECTOR ANGLE ERROR DETECTOR STATCOM ANGLE CONTROLLER

R13 1500K

U7

G1 G1
U6 k1
U5 K1

VMOD VZ1 VZ1 G2 G2

V (BETA)
VZ2 VZ2 K2 k2
VMOD
VZ3 VZ3 G3 G3
K3VAC
VTRI VZ4 VZ4 K3 k3
MODULATING SIGNAL GENERATOR G4
STATCOM TRIGGERING CIRCUIT G4

K4 k4
VTRI
STATCOM DRIVING CCT

Statcom controller

Figure 5. The PSpice implementation of the modified STATCOM

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Int J Pow Elec & Dri Syst ISSN: 2088-8694  191

The current transformer used in the designed STATCOM, has a primary to secondary turn ratio of
0.2, therefore the constant kS is calculated to be 0.02Ω taking into account the 0.1Ω value of RCT (the resistor
shunting the current transformer). The voltage source V5 represents the analogue signal k1IDm. Negative and
positive values of V5 are corresponding to capacitive and inductive reactive current demands, respectively.
The AC voltage used is of amplitude of 311V (220V rms value) and frequency of 50Hz. The IGBT used is of
the type of CM300DY-24H which has maximum continuous voltage and current ratings of 1200V and 300A,
respectively. The carrier frequency is 2.5 KHz and m is about 0.98. The modified STATCOM is designed to
satisfy a peak reactive current demand of 250A (capacitive or inductive). The driving circuit of the
STATCOM is shown in Figure 6. It is composed of four identical sub-driving circuits; each one of them is
responsible for driving one IGBT of the STATCOM.

MPSA28

MPSA28
R15 R14 Q1 V3 R21 R20 Q4 V4
5k 1k 15V 5k 1k 15V

C1 Q2 G1 C2 Q6 G3
R17 R23
22nF 22nF
VZ1 R12 VZ3 R19
Q2N2222A

Q2N2222A
10 10
U4 0 U5 0
10 A4N26 10 A4N26
R13 R18
2 2
k1 k3

0 R16 Q3 0 R22 Q5
5.6k 5.6k
MPSA64 MPSA64

Z1 driving circuit Z3 driving circuit

MPSA28

MPSA28
R27 R26 Q7 V5 R33 R32 Q10 V6
5k 1k 15V 5k 1k 15V

C3 Q9 G4 C4 Q12 G2
R29 R35
22nF 22nF
VZ4 R25 VZ2 R31
Q2N2222A

Q2N2222A
10 10
U6 0 U7 0
10 A4N26 10 A4N26
R24 R30
2 2
k4 k2

0 R28 Q8 0 R34 Q11

5.6k 5.6k
MPSA64 MPSA64

Z4 driving circuit Z2 driving circuit

Figure 6. The PSpice implementation of the STATCOM driving circuit

3. RESULTS AND DISCUSSION

In this section, there are two groups of results; the first reflects the the performance of the adopted
current controller, while the second reveals the performance of the propsed STATCOM at different reactive
current demands.

3.1. Performance of the adopted current controller

The performance of the PSpice implemented STATCOM is reflected in the test results shown in
Figure 7 to Figure 9. These figures show that the linearized STATCOM current iS approaches its steady state
value within a time less than 100msec which is the time less than any time elapsed in other controlling
techniques [16], [17]-[25]. A +3V value of k1IDm corresponds to a capacitive reactive current demand of
150A (peak value), while -3V corresponds to inductive reactive current demand of 150A (peak value). Figure
7 shows that the STATCOM current is pure capacitive, while Figure 8 shows that its current is pure
inductive. Figure 9 shows that the STATCOM current tends to zero during zero reactive current demand. The
nature of the STATCOM current (capacitive or inductive) is revealed within the first cycle of vAC, although
the DC capacitor requires long charging time. Overall, the proposed STATCOM responds precisely to
reactive current demand within its range of operation without harmonics association, thus it can be promoted
as an adaptive bipolar (capacitive and inductive) static Var compensator (SVC) showing continuously and
linearly controlled harmonic-free compensating susceptance.

Design of a continuously and linearly controlled VSI-based STATCOM for … (Faris Asaad Abdulmunem)
192  ISSN: 2088-8694

6.0V
V ( ) k S I Dm

3.0V

0V
k S iS
-3.0V
V ( )
-6.0V
0s 40ms 80ms 120ms 160ms 200ms
600 V(K1I) V(U62:OUT) V(VANG) V(K2BS)
VDC
450 Time

300 v A.C iS
150
0
-150
-300

0s 40ms 80ms 120ms 160ms 200ms

I(LSE1) V(Z3:C,K2) V(+V,-V) Time
Time
Figure 7. Controller and STATCOM responses to capacitive current demand of 150A (peak value)

6.0V
k S iS V ( )
3.0V

0V

-3.0V
V ( ) k S I Dm
-6.0V
0s 40ms 80ms 120ms 160ms 200ms
V(K1I) V(K2BS) v AV(VCON) V(VANG) VDC
.C
300 Time
150

-150
iS
-300

0s 40ms 80ms 120ms 160ms 200ms

I(LSE1) V(Z3:C,K2) V(+V,-V) Time
Time
Figure 8. Controller and STATCOM responses to inductive current demand of 150A (peak value).

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Int J Pow Elec & Dri Syst ISSN: 2088-8694  193

5.0V
V ( )
2.5V

0V

k S I Dm V ( ) k S iS
-2.5V
0s 40ms 80ms 120ms 160ms 200ms
600 V(K1I) V(VCON) V(VANG) V(K2BS)
Time
VDC
300
v A.C
iS
0

-300

0s 40ms 80ms 120ms 160ms 200ms

I(LSE1) V(Z3:C,K2) V(+V,-V) Time
Time
Figure 9. Controller and STATCOM responses to zero reactive current demand

3.2. Performance results of 220-V, 50-Hz linearized STATCOM

The circuit diagram of 220-V, 50-Hz linearized STATCOM is shown in Figure 10. The harmonic
contents, control continuity and linearity of this STATCOM were investigated on PSpice. The AC voltage
used during PSpice tests was a zero phase sinusoidal voltage having frequency of 50Hz and amplitude of
311V (corresponding to an rms value of 220V). The parameters measured through PSpice tests were the
STATCOM current iS, the DC capacitor voltage VDC, and the AC phase voltage vP. The basic controlling
signal of this statcom is k1IDm. The transient and steady state responses of this statcom during zero reactive
current demand (corresponded to k1IDm=0) are shown in Figure 10.

600
VDC

iS
0

vP
-600
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 10. Transient and steady state responses of the proposed STATCOM to zero reactive current demand

Figure 11 shows the transient and steady state responses of the 220-V, 50-Hz linearized STATCOM
to an inductive reactive current demand of 61.5A (peak value). This amount of reactive current demand
corresponded to k1IDm of a value of -1.23V. As specified above, the maximum capacitive reactive of this
STATCOM is 227A (peak value) and maximum inductive current rating is 123A (peak value). Figure 12
shows the transient and steady states operation of the 220-V, 50-Hz linearized STATCOM during its

Design of a continuously and linearly controlled VSI-based STATCOM for … (Faris Asaad Abdulmunem)
194  ISSN: 2088-8694

response to a maximum inductive current demand of 123A (peak value). This current corresponded to k1IDm
of -2.46V.

500
VDC

0
iS

vP
-500
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 11. Transient and steady state responses of the proposed STATCOM to an inductive current demand
of 61.5A (peak value)

500
VDC

iS
0

vP
-500
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 12. Transient and steady state responses of the proposed STATCOM to an inductive current demand
of 123A (peak value)

The transient and steady states operation results of this Transient and steady state responses of the
proposed STATCOM to during capacitive mode of operation are shown in Figure 13 to Figure 16. These
figures reflect the Transient and steady state responses of the proposed STATCOM performance during
different capacitive reactive current demands starting from 25% up to 100% of the STATCOM capacitive
reactive current rating. The maximum capacitive susceptance of this statcom corresponds to a capacitive
reactive current demand of 227A, thus the value of this susceptance is calculated to be 227A/311V=0.723Ʊ.
This value of susceptance corresponds to k1IDm of 4.54V. Figure 13 states that the DC capacitor voltage
settled to its steady value within 100msec since the first plug in instant of the 220-V, 50-Hz STATCOM to
the AC source. The nature of the capacitive current appears after 20ms since the first plug in instant of the
220-V, 50-Hz STATCOM to the AC source.

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Int J Pow Elec & Dri Syst ISSN: 2088-8694  195

600
VDC

iS
0

vP
-600
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 13. Transient and steady state responses of the proposed STATCOM to a capacitive reactive current
demand of 56.75A (peak value)

600
VDC

iS
0

vP
-600
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 14. Transient and steady state responses of the proposed STATCOM to a capacitive reactive current
demand of 113.5A (peak value)

600
VDC

iS
0

vP
-600
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 15. Transient and steady state responses of the proposed STATCOM to a capacitive reactive current
demand of 170.25A (peak value)

Design of a continuously and linearly controlled VSI-based STATCOM for … (Faris Asaad Abdulmunem)
196  ISSN: 2088-8694

600

VDC
iS
0

vP
-600
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms 220ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time

Figure 16. Transient and steady state responses of the proposed STATCOM to a capacitive reactive current
demand of 227A (peak value)

In inductive and capacitive modes of operation, the STATCOM current exhibits peaks at the zero
crossing points of the AC source voltage. Consequently, it can be said that the proposed 220-V, 50-Hz
STATCOM is a pure reactive device. The response of this STATCOM to sudden change in reactive current
demand from maximum inductive to maximum capacitive is shown in Figure 17. The change in reactive
demands occurred at t=200ms and the transition period elapsed 40ms. The linearity of this STATCOM is
demonstrated by the graph shown in Figure 18. The graph is accomplished through exploiting the steady state
responses shown in Figure 10 to Figure 16. It is obvious that there are negligible current components in the
STATCOM current in steady state regions of the current responses. Overall, the proposed 220-V,
50-Hz STATCOM is verified as continuously and linearly controlled harmonic-free compensating
susceptance. The proposd current controller has short response time compared to controlling schemes
mentioned in [16], [17]-[25].

600
VDC

iS
0

vP
-600
0s 20ms 60ms 100ms 140ms 180ms 220ms 260ms 300ms 340ms
I(LST1) V(VP:PVS,VP:NVS) V(+VDC,-VDC)
Time
250A

iS

0A

-250A
0s 20ms 60ms 100ms 140ms 180ms 220ms 260ms 300ms 340ms
I(LST1)
Time

Transition time

Figure 17. STATCOM performance during sudden change in reactive current demand from maximum
inductive to maximum capacitive

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Int J Pow Elec & Dri Syst ISSN: 2088-8694  197

Figure 18. The proposed STATCOM current against reactive current demand

4. CONCLUSION
The proposed STATCOM has been demonstrated as a continuously and linearly controlled
susceptance in capacitive and inductive mode of operations, thus it can considerably be exploited in load
current balancing systems to achieve better power quality and energy saving. The promotion is achieved
through the modification of the traditional H-bridge VSI based STATCOM via devising new current
controller and keeping the STATCOM DC capacitor voltage constant at a certain level for each
compensating current without using external energy injection or storage devices. The response of this
STATCOM to sudden change in reactive current demand from maximum inductive to maximum capacitive
requires a transition period of 40ms.

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