UNIT-1 Boolean Algebra and Combinational Logic: Review of number systems , signed, unsigned, fixed point, floating point numbers, Binary Codes, Boolean algebra - basic postulates, theorems , Simplification of Boolean function using Karnaugh map and Quine-McCluskey method — Implementations of combinational logic functions using gates, Adders, Subtractors, Magnitude comparator, encoder and decoders, multiplexers, code converters, parity generator/checker, implementation of combinational circuits using multiplexers. UNIT -I! Sequential Circuits: General model of sequential circuits, Flip-flops, latches , level triggering, edge triggering, master slave configuration , concept of state diagram , state table, state reduction procedures , Design of synchronous sequential circuits , up/down and modulus counters , shift registers, Ring counter , Johnson counter , timing diagram , serial adder , sequence detector, Programmable Logic Array (PLA), Programmable Array Logic (PAL), Memory Unit, Random Access MemoryLogic Gates a» Logic Gat Actually the term logi igital circuits used to implement logic functions. Several kinds of nea ae en ama toate cemem het ciao Tica The lines connected to each symbols are the inputs and outputs. The inputs are on the left of each symbol and the output is on the right A circuit that performs a specific logic operation (AND, OR) is called a logie gate.ROOD SO ee ae SR ST Da eRe soe Ce Te ee Mee ea re areca eer ea Co tM ee mT iets rr + It’s logical expression is, X=A.BOR gate can have two or more inputs and performs what is known as logical addition, The output of OR gate is Low when all inputs are low, otherwise all outputs are high Truth Table Tere (rts Output _ | ¢ It’s logical expression is, X=A+BThe inverter (NOT circuit) performs the operation called inversion or complementation, The NOT operation changes one logic level to the opposite logical level. When the input is Low, the output Pea et eee ee ee ne Truth Table errs 1 0 * It’s logical expression is, A=A’> NAND Gate Rn se a eee eee een te SEMIN a Ty combination to perform the AND, OR, and inverter operations. ar SN oe aD Kero Nene NAND Gate is constructed by attaching NOT Gate at the output of AND NOT- AND Gate. many et ree at ae tes h, otherwise all outputs eee)» Truth Table and Expression of NAND Gate: asd eas It’s logical expression is, X= (AB)> NOR C Nee ea oN rae een en ene eee ree Ronee No eee en ee en no rae ee MO CR Nae aes NOR Gate is the combination of NOT gate at the output of OR gate, hence NOR gate is type of NOT-OR es The Output of NOR gate is high when all inputs are low otherwise the output is low.> Truth Table and Expression of NOR Gate: Uys) Output Tee C nme)The exelusive-OR gate has a graphical symbol similar to that of the OR gate, except for the additional curved line on the input side > If both inputs are Low or both are High then it produces the output Low or 0. otherwise it produce the High> Truth Table and Expression of Ex-OR Gate: ated Cris Peder eens one) Pra EsThe exelusive-NOR gate is the complement of the exclusive-OR gate, as indicated by small cirele on Cee neg rea aoa) Ree ee ea en ae ee eee ee a ee a eT ea erat> Truth Table and Expression of Ex-NOR Gate isis i Tesco eee ec X=AQBNAND gate as Universal gate a> NAND Gate as an AND Gate: meer Sa} RNs food ee its Crt>» NAND Gate as an OR Gate: Tiree NAND Gate os Ue Inputs> NAND Gate as an NOT Gate: Teeter Sansa) i t_[_ (eee? rig Output ]> NAND Gate: Logical symbol Truth Table inputs Output> NAND Gate as an NOR Gate: [eet eset is ra> NAND Gate as an Ex-OR Gate: fear oan} Truth Table Inputs rrNAND Gate as an Ex-NOR Gate: Logical symbol Z=(XY)+KY Truth Table Inputs CraNOR gate as Universal gate y aa> NOR Gate as an AND Gate: Logical symbol Rares Pr iis re> NOR Gate as an OR Gate: eae} NOR Gate aoa tue) fs Ora:> NOR Gate as an NOT Gate: estes it) > Cee) ees fed Output> NOR Gate as an NAND Gate: ee Sud Truth Table Inputs Crt> NOR Gate: Teorey rere its Cr> NOR Gate as an Ex-OR Gate: Z=X'Y+XY' fee ees Crt> NOR Gate as an Ex-NOR Gate: Tieton Z=(XY)'4XY Truth Table ns [outputUniversal GATE (NAND,NOR) They are called universal gates because .... © Cee Re MC lets ee ae a ae Ra eat ta ete aed PO een) Cred Creer) Cory XNOR using fry) Pte eee) See OLYUse for doorbell Use in smoke sensors Use in traffic lights Use in mobile or calculators Use in UPS chips Bageoo Beeeeen Seaeee 7 (>) [ay UN Tee weer “eee 7408 (AND) 7432 (OR) 7404 (NOT)Logic Gates IC Datasheet Pin Configuration 7400 Quad 2 input NAND gates 7402 Quad 2 input NOR gates 7404 Hex NOT gates (Inverters) 7408 Quad 2 input AND gates 7432 Quad 2 input OR gates 7486 Quad 2 input XOR gates 747266 Quad 2 input KNOR gates 74133 Single 13 input NAND gateFurther Application of Logic Gates > 1. HALF ADDER CIRCUIT USING NAND_, NOR GATENAND loge wor ecutstoday com0 1 AB Half Subtractor Logic Diagram snww.flintgroups.com4. EVEN AND ODD PARITY CHECKER 00000000 0 01011011 1 01010101 0 TETT U0 0 1 1 P; 1 0 1 1 0 10000000 01001001 0Boolean Theorems Basic Postulates and Theorems : Assume A.B, and C ate logical states that can have the values 0 (false) and 1 (true) ‘ssi means OR." means AND, and NOT[A] means NOT A. Postulates wy [ante [mary] 2) ASSOTay=1 Dl are=Boe i [Avi=1 AtG-B=a (a+ Oa) w-asD (20) A= B+ a}- + @-O=A-B+ CMA) prot k Adueina rm. KDI OTta. +B] = OTA SOFpBy OTA B]=SOTfa] + NOTpw)| de Mowanis theorem,Boolean Theorems Principle of duality The principle of duality states that every algebraic expression deducible from the postulates of Boolean algebra, remains valid if the operators identity elements are interchanged: > To form the dual of an expression, replace all + operators with . operators, all . operators with + operators, all ones with zeros, and all zeros with ones. > Form the dual of the expression & (AH=(A.0) at(bc)=(atd)ato) > Following the replacement rules: ¢ a(bt+e)=abtac > Take care not to alter the location of the parentheses if they are present.De Morgan's theorem + First Theorem: = The De-Morgan's first theorem states that, equals to the product of the complements" . (A+B)'=A'.B" The complement of a sum De Morgan's theorem Proof: Graphical symbol: Truth table:De Morgan's theorem Second Theorem: De Morgan's second theorem states that, "The complement of a product is equal to the sum of the complements.” ie. (AB)'=A+B" De Morgan's theorem Proof: Graphical symbols: . AB = 85 Truth table: inputs Conclusion ‘Comparing the values of (A.8)' and A'+8! from the truth teble both are equel, hence proved.Boolean Expression Evaluation of Boolean Expression Consider the following Boolean Expression: F(x,y,Z) = xZ+y F(x,y,z2) = xZ+y Ky 2 Z xz xZt+y 0 0 0 tio 0 > The truth table for the Boolean function: oo1/0 0 0 is shown at the right. o1o/;1 0 1 . 4 A o11/0 0 1 > To make evaluation of the Boolean function casier, io 0 Meee i the truth table contains extra (shaded) columns to hold 101/00 0 evaluations of subparts of the function. 110 a x 11ij}o0 o 1AtA 1 A+AB=A+B A+AB=A Example 1 — Let us minimize the boolean function given as follows using the method of algebraic manipulation— = ABC'D' + ABC’D + AB‘C'D + ABCD + ABCD + ABCD’ + AB‘CD’ Solution — The properties used here refer to the 3 most common laws mentioned above. F = aac’ (0+ 0) + ABCD + ACD (8 +8) + ACD (BR +8) ABC’ + AB'C'D + ACD + ACD’ Using Praperty— ABC’ + AB‘C'D + AC (D + DD ABC’ + AB'C'D + AC Using Property-1 =A (BC +c) + ABCD = A (8 +C) + ABCD Using Property-2 AB + AC + ABCD AB + AC + AC’D Using Property-2 AB + AC + AD Using Property-2Minimization Using K-Map | The methed of algebraic manipulation, as we witnessed above, ie pretty long, cumbersome, and tedious to follow for every exprossion. Instead, wo con use the K- Map method, which Is much faster Ib can be used to solve the Boolean FUNCTaNS UP. to tive variables. You can learn more about kK-Map by vieiting here. Example 2 — Let us consider the same expression that we have used in exarmnple-1 ane! then Minimize 1t UsING the K=Map method instead of the algonralc manipulation method Setution — 4 K-Map of 4 variables of the expression is given here: The figure given above highlights the prime implicants here in red, green, and blue The blue one extends to 4 squares, and it gives us — AC The red one extends to 4 squares, and it gives us — AD The green one extends to the whole third row, and it gives us — AB Thus, the minimized Boolean expression would be — AB + AC + ADPractice Problems on Minimization of Boolean Simplify the expression FT +F + TF Functions 1. simply the expression: P(P +R) + (PC +R) 2) aR + aR) »)(eo+R) e)(P+0R) d)Pc Answor~(b) (PQ +) CATE Exam 2.Find the simpli term A (w+ 4) (M+ we)? a) ua’ b)Ma wen d) wa’ GATE Exam “Answer ~ (a) Mn rst oer ony arr “Answer = (c) (1) GATE Exam 4. hat would be the simplification value of the following expression: AV(A +) + ave)? aA saev (+a) aaveR Answer (d) V+ GATE Exam5. Minimize the Boolean expression given below using the Boolean identities: FOL KL) = + KL) CuK’ +L) aatkee bys +k eye ra as (Ke +0 GATE Exam Answer — (1) J (K+ 1) FAQs 1 How many ways are there to simplify the Boolean func! There are two methods that help us in the reduction of a given Boolean Function. These are the algebraic manipulation method, which is longer, and the K-map methed, which is shorter. Q2 What do we mean by minimization of boolean functions? Minimization refers to the process in which we simplify the algebraic expressions of any given boolean function. This process is very important as it helps in the reduction of the overall cost and complexity of an associated circuit.