Paper Code : 23501 wI-101(T) B. Tech. (Second Semester) EXAMINATION, April-May, 2019 (New Syllabus) BASIC ELECTRONICS ENGINEERING Time : Three Hours | [ Maximum Marks : 70 Note: Attempt any sive questions. All questions cary equal marks. sy @)_ Explain the operation of P-N junction diode under forward and reverse biased conditions with the help of V-I characteristic curve. 4 (e) Explain with band energy diagram, how the minority charge carriers are responsible for the flow of current under the reverse biased. a X% (a) Calculate the efficiency of half wave rectifier. 7 3 (A-59) P. T. 0. ee AM.oT 23501 (©) Plot the output waveform and transfer clarateristis both forthe given circuit with sven iapot wavefom, Consider diode ideal. 7 3. (@ Consider an intrinsic silicon bar of cross-section area Sem’ and length 0.5 cm at room temperature 300°K. An everage field of 20 Viem is applied across the ends of the silicon bar, then calculate @ Electron and hole component of current density. 3 (i) Total curent in the ba. 2 (Gi) Resistivity ofthe bar Given : Electron mobility is 1400 cm’/V-s, hole mobility is 450 cm’/V-s, Intrinsic carrier concentration of Si at room temperature (G00°K) = 15x10cm?, Number of Si atonvin” = 4.99 « 10%, (©) Why ON to OFF time in case of PN junction diode is more than OFF to ON time when it operated as a switch ? For this if curent of 18 mA is across diode when it is in forward biased and at ¢ = 0 when it is in reverse biased, then caleulate the value of current () 7 2 (A-59) poow > ¥ Bl eof 4] Caleuate the peak invers® vols tape and bridge type retifier voltage is Vq inf o ° (&) A Zener diode having breakdown ae is voltand knee eurent is 5 mA 2s s : and given inimum value of Ri Calculate the min oe ‘maximum power rating of diode 50 voltage emains constant at 6 volts. wv’ Discuss all in details : (9 Why is area of collector region maximum as 2 5 @ compared to other region in BIT ? (i) Why is NPN transistor more ised as compared to PNP transistor 2 1 (iil) Barly effects, 2 (iv) Effects of temperature on reverse saturation current (Ip) and cutt-in-voltage Mm). 2 (459) P.T.0, ada (4) 255%, (b) Discuss the advantage of practical clamper 85% compared to ideal clamper wart. charging time constant for the given square wave and also plot the output waveform for pane given ideal clamper- I Vn Vin a =Ve Ie @ Draw and explain CE transistor configuration SF © with output *Peracteristics and circuit diagram and also. write the application of common collector configuration. 7 (b) Explain Zener and Avalanche breakdown and their use in voltage regulator. 7 In circuit. shown transistor has - Bac = 100, = 0.2 V. Find the wo (Vpp)sat = 0-8 V> CoE) sat a region of operation. 10V F ®) Explain the Hall effect. What properties of a semiconductor can be determined with the help of 7 : 260 Hall effect ? 23501 (A-59).Paper Code : 23521 EI-201(1) B. Tech. (Third Semester) EXAMINATION, 2017-18 (New Syllabus) ANALOG ELECTRONICS Time : Three Hours | [ Maximum Marks : 70 Note: Attempt any five-questions. All questions carry equal marks. 1. @)_ Determine the voltage Vcp and the current Tp the common-base configuration of fig. for B=60ecg iy asa ©) Determine RC and RE for a voltage divid network. havin 4 neronk ving & Grit of Tog $m and ‘cs0™ 8 V. Use Voc = 24 V and Re =3Rp Calculate 8 st Q-point and Vz and Vp @ (DY ete b-paramer. Daw te eprameter model of a transistor. © drew te cat of wo sage eastome coupes 2 @ og ampli. Explain is working withthe help of equivalent circuit. Explain the advantages of Dalngon amplifier with deriving related equations. Find te cue ofthis circuit when the tansitr with B= 80 and the emitter resistance (Rg) of 100 are used in the ciruit. ‘State and prove Mill's theorem and discus the cases for bias instability ina transistor. Daw the circuit of common dain amplifier st high ffequencies and derive expression for sottage gin, input and output amine Deserbe FET along with is types. Also exis [TPET working wih its charset, the effect of curent series negative gain and inpat resistance necessary expressions: ay Show feedback connection of of an amplifier. Derive the - Domenie ono ote ing ite epi esse - stores couied 23501 pas cof ealesios © 360Total No. of Questions : 8] [Total No. of Printed Pages : 3 Paper Code : 23521 EI-201(T) f B.Tech. (IIIrd Semester) Examination, 2019-20 (New Syllabus) ANALOG ELECTRONICS (Common for EE, EC, EI & CSIT Branch) Time : 3 Hours ] [ Maximum Marks : 70 Note :— Attempt any five questions. All questions cary equal marks. _ £ Calculate I,, Ic and Voge for common emitter circuit : Vec = 10V Re 22 kQ Rp = 220 kQ. 5 B = 200 Vpp=4V (b) Define h-parameter. Draw the h-parameter model g of a transistor. SE-289-A (1) Turn Over7 @ Drow and and exp the wrk Oe at mn disadvantages ? —— ©) APET bas 4 driven curent of dma. yp Joss = 8 MA and Vosiiy = -6V. Find the values of Vos and Vy > Brplain enhancement type MOSFET with N channel ‘creation, Derive equation for drain cutrent, 4. (@) Explain the origin of cross over distortion end eseribe a method to minimize it (©) A voltage series feedback ampliter has a voltage ‘gain with feedback as 83.33 and B = 001 Calculate the voliage gain of the amplifier Without feedback. <5. (@ How stability of a feedback system can be quantified ? Describe class A amplifier and evaluate its efficiency, 6. (@ Derive characteristic parameters of JFET and derive relationship between them. (© Given p = 120 and i, configuration 7, = «, Determine Z,, A, and A, if R, = 2k. SE-289-A (2) mA in CE Derive its efficiency oo) = fol hy=2kO, R= ig = 80. Caleuate he in dB? © Explain Daington equation. Why Darlington feasible ? SE-289-A ‘Siae end prove Miller's the the causes for Bae instability t= wan. Elan swo-stage tasformer coupled aplifie. ‘The eutent series feedback ampli ing parameters Ry 1 kD. R, AB Rie fier bas he mpliice with deriving rested (3) ‘connection of tree dered 0 be@o@eoqoqogeces — 889 OO OPH0O08 Department gf EI Engineering Mig Test IT Max. Marks = 10 Subject: Analog Electronties (32017) jpyamehs EE Date! 19/11/2019 Max, Time: 11, Qian smnplitior with open-loop Voltage gain of He us reverse transmission 6 * Seemed Stroman ml Shown in following circuit diagram, oe hoe 1 Re > lke — 2Re % ¥, © : | (b) Find current gain, input resistance, and voltage gain for 2(a), if he VR = 50 (1.5) SS5e@)_ Drew, simplified hybrid mod it given below: 2) ¥, ©) Determine 4/ ig Ne 1M, = 50. @ @ Draw circuit diagram of Emitter follower, a (b) Write any two important properties of Emitter follower, a1. 2 3. 1ET, MUP Rohilknandunive m Ro: of Electronics Mid Term Examination 2 Analog Electron Time: thrs ttempt all the questions. Mark: Draw i = DC load line for voltage divider bias ‘abilityof this circuitdue to deo- . a nalyse the common emitter BJT using Hy! Cal i = current gaind; andinput resistance Rr- w Darlington emitter follower. Explain why inpu than single stage emitter follower. OR n 7 ‘wo stage amplifier in CE-CC configuration i: 1018-19, EC Ui rity Oo P gineering inyr. msem- ics, EC-201 m:10 sare indicated for each. ing circuit of BUT. commenton the 3 brid parameter model and t impedance ishigher 4 is shown in figure below.With ind output the help of followit jing parameters i ae calculate input resistance a! ista a ze 4 6 ie = 2K, fre = 50, ae Iug = 2K, hye = ~51, x 10~*hoe = 25 WA/V 1 hoc = 25 nA/V4 sted Popes | Total No. of Questions : 8] frotat No. of Printed PAE Paper Code : 23521 EI-201(T) B.Tech. (Third Semester) Examination, 2018 (New Syllabus) ANALOG ELECTRONICS (Common for EE, El, EC & CSIT Branch) [ Maximum Marks = 70 Time : 3 Hours ] Note :— Attempt any five questions. All questions carry equal marks, 1. @ raw the circuit diagram of common-base amplifier, Show that the current gain for CB amplifier is given as o. OFC Draw the circuit of a tranistor in common emitter configuration. Sketch its input-output characteristics. 2, hat do you mean by biasing of a transistor ? Define quiescent point (Q-point) in a transistor and how to establish it. = 12 (1) Turn Overtermine the fol, lowing for the fined bias figuration shown in Fig. 1 O's aa ty Vee Ny and Ve Onc What are /-parameters of a linear circuit ? fp fow will you measure them ? Explain the Darlington pair and emitter follower ot configurations. oe $-512 (2) Paper vee~ - - \gfhonin we consort eis operation of channel enancerentipe MOSFET Deseie i V1 hunters. Drow the seematiceymbels for NMOS and PMOS. 2 comparison between JFET and 5. @ Give MOSFET, () Determine the following for the network shown in Fig. 2 @ Vos @ Gi) Vos +16V 2a D f~ g + imag Vos. 2Ve $-512 Tun Over6. What do you mean by feedback ? What do you understand by negative and positive feedback ? Explain voltage series, current series, current shunt and voltage shunt configurations. 7. (a) Draw and explain the circuit diagram of a class-A transformer coupled amplifier using an npn transistor. (b) What do you mean by cross-over distortion ? In which transistor it occurs ? How will you remove it ? 8. Write short notes on any two of the following : (a) Stabilization against variation in Ing: Vaz and Baers (b) Miller’s theorem (©) Power amplifiers (@) a, B and-y for a transistor. S-512 (4)‘Sem Exam, Network Analysis & Synthesis (EE-2017), (20-11-19, Wednesday) MM: Time:1Hr B.Tech, 2018 Batch, 2nd Year, 3rd Sem, 2nd Mid. @ a) Attempt all the questions. Q1. Find h-parameters of network of Fig (1). @ Q2. Find the Norton’s Equivalent of the network shown in Fig (2). Q3. Explain & prove condition of reciprocity for h- parameters and condition of symmetry for ABCD parameters Zz, Son ODT, Fig.FET, MJP Rohilkhand University,Bareilly ‘ EC-III Semester [2018 batch) Analog Electronics (1-201T] 2M, pater19/11/2019 SN] Question, er 1 | Draw the Val characteristics of JPET. Also defivate the Pinch Off Voltage 0! SET 2 | An amplifier has an open-loop gain 100, an input impedance of 1 KO, and ay ote impedance of 106 @. A feedback network with a feedback factor of os at L connected to the amplifier in a Voltage-Series feedback mode. The new input output impedances respectively are? een 3__] Explain Class A power amplifier with its important parameters.IET, MJP Rohilkhand University, Bareilly n Engineering asad of Electronics & Communicatio' | Mid Term Examination 2018-19, EC-IImyr. Ill" Sem. Mm: 10 Time: 1hrs a Lee —— Marks are indicated for each. ion of channel and current flow in N channel Enhancement type MOSFET. 3 2. What are the effect of voltage series feedback on input resistance , output resistance and gain of an amplifier. 3 3. Derive the expression for voltage gain and input admittance of common drain amplifier at high frequency. : ore 4. The circuit given below has following parameters R=4K, "=4K, =10K, =0. Find voltage gain with feedback Aw input d input resistance see” by 4 h.=1.1K, hy=50 and he=her looking into the base- € resistance (| mitter) R’r an voltage source Ry