Logic Circuit and Switching Design

Chapter 5

Combinational Logic Analysis

When logic gates are connected together to produce a specified output for
certain specified combination of input variables, with no storage involved, the
resulting circuit is in the category of combinational logic. In combinational logic,
the output level is at all times dependent on the combination of input levels.

Basic Combinational Logic Circuits

AND-OR Logic

In Sum-of-Products (SOP) form, basic combinational circuits can be directly

implemented with AND-OR combinations if the necessary complement terms are
available. In general, an AND-OR circuit can have any number of AND gates, each
with any number of inputs, as shown below:

For a 4-input AND-OR logic circuit, the output X is HIGH (1) if both inputs A and B
are HIGH (1) or both inputs C and D are HIGH (1).

Page 1
 Logic Circuit and Switching Design

AND-OR-Invert Logic

When the output of a SOP form is inverted, the circuit is called an AND-OR-Invert
circuit. The AOI configuration lends itself to product-of-sums (POS)
implementation. The output expression can be changed to a POS expression by
applying DeMorgan’s theorem twice, as shown below:

For a 4-input AND-OR-Invert logic circuit, the output X is LOW (0) if both inputs A
and B are HIGH (1) or both inputs C and D are HIGH (1).

Exclusive-OR Logic

The output of an Exclusive-OR gate is HIGH whenever its inputs A and B are
different, its logic diagram and symbol is illustrated below:

The XOR operation is written as:

X = AB’+ A’B or as X= A + B

Page 2
 Logic Circuit and Switching Design

Exclusive-NOR Logic

The output of an Exclusive-OR gate is HIGH whenever its inputs A and B are the
same, its logic diagram is illustrated below:

The XOR operation is written as:

X = A’B’+ AB or as X= A . B

Implementing Combinational Logic

From a Boolean Expression to a Logic Circuit

To implement the Boolean expression: X = AB + CDE
A 2-input AND gate is required to form the term AB, and a 3-input AND gate is
needed to form the term CDE. Then a 2-input OR gate is then required to combine
the two AND terms. The resulting logic circuit is shown below:

Page 3
 Logic Circuit and Switching Design

To implement the Boolean expression: X = AB (CD’ + EF)

The required gates are:
 one inverter to form D’
 two 2-input AND gates to form CD’ and EF
 one 2-input OR gate to form CD’+ EF
 one 3-input AND gate to form X
The resulting circuit is as follows:

Notice that, in part (b), the same circuit is implemented for the SOP expression.
The second circuit has fewer gates as well as less propagation delay.

From a Truth Table to a Logic Circuit

If you begin with a truth table instead of an expression, you can write the SOP
expression from the truth table and then implement the circuit, as follows:
A B C X PRODUCT TERM

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1 A’BC

1 0 0 1 AB’C’

1 0 1 0

1 1 0 0

1 1 1 0

Page 4
 Logic Circuit and Switching Design

The Boolean SOP expression obtained from the truth table by ORing the product
terms for which X=1 is: X = A’BC + AB’C’

The logic gates required to implement this expression are as follows:

Universal Gates

NAND gates are sometimes called universal gates because they can be used to
produce the other basic Boolean functions.

Page 5
 Logic Circuit and Switching Design

NOR gates are also universal gates and can form all of the basic gates.

Combinational Logic Using Universal Gates

NAND Logic

As you have learned, a NAND gate can function as either a NAND or a negative-
OR because, by DeMorgan’s theorem:

(AB)’ = A’ + B’

NAND negative-OR

Page 6
 Logic Circuit and Switching Design

Consider the NAND logic in the following circuit:

The output expression is developed in the following steps:

X = ( (AB)’(CD)’ )’
= ( (A’ + B’) (C’ + D’) )’
= (A’ + B’)’ + (C’ + D’)’
= A’’ B’’ + C’’ D’’
= AB + CD

Notice that , the output expression AB + CD, is in the form of two AND terms
ORed together. This shows that gates G2 and G3 acts as AND gates and that gate
G1 acts as OR gate, as illustrated below:

Page 7
 Logic Circuit and Switching Design

The dual-symbol diagram (NAND and inverted-OR), shown in part (b), makes it
easier to determine “read” the output expression directly from the logic diagram,
because each gate symbol indicates the relationship of its input variables as they
are appear in the output expression.

Example: Redraw the logic diagram and develop the output expression, for the
given circuit, using the dual symbols.

Solution:

Use the negative-OR symbol, in place of NAND gates, starting from the output
gate, and repeat for each other level of NAND gates, as follows:

Page 8
 Logic Circuit and Switching Design

NOR Logic

A NOR gate can function as either a NOR or a negative-AND because, by

DeMorgan’s theorem:

(A+B)’ = A’ B’

NOR negative-AND

Consider the NOR logic in the following circuit:

The output expression is developed in the following steps:

X = ( (A+B)’+ (C+D)’ )’
= (A + B)’’ (C + D)’’
= (A + B) (C + D)

Notice that , the output expression (A + B) (C + D), is in the form of two OR terms
ANDed together. This shows that gates G2 and G3 acts as OR gates and that gate
G1 acts as AND gate, as illustrated below:

Page 9
 Logic Circuit and Switching Design

The dual-symbol diagram (NOR and inverted-AND, shown in part (b), makes it
easier to determine “read” the output expression directly from the logic diagram,
because each gate symbol indicates the relationship of its input variables as they
are appear in the output expression.

Example: Redraw the logic diagram and develop the output expression, for the
given circuit, using the dual symbols.

Solution:

Use the negative-AND symbol, in place of NOR gates, starting from the output
gate, and repeat for each other level of NOR gates, as follows:

Page 10
 Logic Circuit and Switching Design

Pulsed Waveforms

For combinational circuits with pulsed inputs, the output can be predicted by
developing intermediate outputs and combining the result. For example, the
circuit shown below can be analyzed at the outputs of the AND gates:

Determining the intermediate outputs of gates G2 and G3, the resulting “final”
output can be derived, as follows:

When the primary inputs A and B are the same (HIGH or LOW), the output X is
HIGH. Thus the circuit is equivalent to an XNOR gate.

Page 11
 Logic Circuit and Switching Design

Alternatively, you can determine the output waveform directly by developing the
SOP expression as in the following example.

Example: Determine the output waveform X for the given circuit by developing
the output SOP expression.

Solution: The output SOP expression X = A’C + B’C + C’D indicates that the output
X is HIGH when: A is LOW and C is HIGH, or B is LOW and C is HIGH, or C is LOW
and D is HIGH, as shown below:

Page 12