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Lab 2

DLD LAP2

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0% found this document useful (0 votes)
12 views

Lab 2

DLD LAP2

Uploaded by

hungl5846
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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INTERNATIONAL UNIVERSITY

SCHOOL OF ELECTRICAL ENGINEERING

Digital Logic Design Laboratory

Lab 2

MSI Combinational Logic

Full name: …………………………………………….


Student number: ………………………………….
Class: ……………………………………………….......
Date: …………………………………………………....

Digital Logic Design Laboratory 1-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

I. Objectives

In this laboratory, students will study:


- Understand the operation of combinational logic circuit.
- The operation of some combinational ICs such as: full adder, parity generator
checker, comparator.
II. Procedure

1. Design the circuit that can detect BCD number:


The circuit that detects BCD number includes 4 inputs (A, B, C, D) and 1 output Y.
The output Y is HIGH when the BCD numbers in the inputs.

- Build the truth table and the expression

A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0

Digital Logic Design Laboratory 2-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Implement the circuit via simulation software and paste the result in here

The inputs A, B, C, D wire up to switches and concurrently connect to BCD to 7


segment (in SimulIDE named as 7 Seg BCD shown as below)

Figure 1. BCD 7-Seg


Implement the circuit via simulation software and paste the result in here

Digital Logic Design Laboratory 3-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Make comment on the results


Cool

2. Design the Comparator from logic gates and IC


a. Build a one-bit comparator from logic gates
Construct one-bit comparator (2 inputs, 3 outputs) which are shown in the truth table
below:

Input Output
A B A=B A<B A>B
0 0 1 0 0
0 1 0 1 0
1 0 0 0 1
1 1 1 0 0

Write down the expressions for 3 outputs:


A=B  AB + A B
A<B  A B
A>B  A B
Implement the circuit via simulation software and paste the result in here

Digital Logic Design Laboratory 4-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Make comment on the results


Cool

b. Build a 4-BIT comparator - IC 74HC85


The 4-Bit comparator IC 74HC85 is shown as below

Figure 2. 4bit Comparators - IC 74HC85


- A and B are connected to data switches and Outputs are connect to LEDs
- Fill in the truth table of IC 74HC85.

Digital Logic Design Laboratory 5-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Comparing Input Cascading Input Output


A3,B3 A2,B2 A1,B1 A0,B0 A > B A<B A=B A>B A<B A=B
A3>B3 X X X X X X 1 0 0
A3<B3 X X X X X X 0 1 0
A3 =B3 A2>B2 X X X X X 1 0 0
A3 =B3 A2<B2 X X X X X 0 1 0
A3 =B3 A2=B2 A1>B1 X X X X 1 0 0
A3 =B3 A2=B2 A1<B1 X X X X 0 1 0
A3 =B3 A2=B2 A1=B1 A0>B0 X X X 1 0 0
A3 =B3 A2=B2 A1=B1 A0<B0 X X X 0 1 0
A3 =B3 A2=B2 A1=B1 A0=B0 1 0 0 1 0 0
A3 =B3 A2=B2 A1=B1 A0=B0 0 1 0 1 1 0
A3 =B3 A2=B2 A1=B1 A0=B0 X X 1 0 0 1
A3 =B3 A2=B2 A1=B1 A0=B0 0 0 0 1 1 0
A3 =B3 A2=B2 A1=B1 A0=B0 1 1 0 1 0 0

Implement the circuit via simulation software and paste the result in here

Make comment on results

c. Design eight-bit comparator using IC 74HC85

Data of X and Y are driven using switches.

Digital Logic Design Laboratory 6-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Implement the circuit via simulation software and paste the result in here

Based on your circuit, fulfill the following table:

Result
X Y
LED1 LED2 LED3
0101 0101 0101 0111 1 0 1
1111 0101 0101 0111
1111 0101 1111 0100
1001 0110 0101 1000
1111 0100 1101 1101
0110 1100 0110 1100
Make comment on results and give a brief explanation of the cascading connection

Digital Logic Design Laboratory 7-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

3. Design the Parity Generator and Parity Checker


a. Build a 3-bit parity generator and parity checker only using XOR gate
Fulfill the truth table
A B C Even Output Odd Output

Write the expressions

Using K-map to simplify the expressions

Implement the circuit via simulation software and paste the result in here

Digital Logic Design Laboratory 8-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Implement the circuit using IC 74HC86 (quad 2-input XOR gate) via simulation
software and paste the result in here

Make comment on results

b. Build a 4-bit parity generator and parity checker only using XOR gate
Fulfill the truth table
A B C D Even Output Odd Output

Write the expressions

Using K-map to simplify the expressions

Digital Logic Design Laboratory 9-10


INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Implement the circuit via simulation software and paste the result in here

Implement the circuit using IC 74HC86 (quad 2-input XOR gate) via simulation
software and paste the result in here

Make comment on results

Digital Logic Design Laboratory 10-10

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