Lab 2
Lab 2
Lab 2
I. Objectives
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
Implement the circuit via simulation software and paste the result in here
Input Output
A B A=B A<B A>B
0 0 1 0 0
0 1 0 1 0
1 0 0 0 1
1 1 1 0 0
Implement the circuit via simulation software and paste the result in here
Implement the circuit via simulation software and paste the result in here
Result
X Y
LED1 LED2 LED3
0101 0101 0101 0111 1 0 1
1111 0101 0101 0111
1111 0101 1111 0100
1001 0110 0101 1000
1111 0100 1101 1101
0110 1100 0110 1100
Make comment on results and give a brief explanation of the cascading connection
Implement the circuit via simulation software and paste the result in here
Implement the circuit using IC 74HC86 (quad 2-input XOR gate) via simulation
software and paste the result in here
b. Build a 4-bit parity generator and parity checker only using XOR gate
Fulfill the truth table
A B C D Even Output Odd Output
Implement the circuit via simulation software and paste the result in here
Implement the circuit using IC 74HC86 (quad 2-input XOR gate) via simulation
software and paste the result in here