Functional Components of a Computer

Computer: A computer is a combination of hardware and software resources which

integrate together and provides various functionalities to the user. Hardware are the
physical components of a computer like the processor, memory devices, monitor,
keyboard etc. while software is the set of programs or instructions that are required
by the hardware resources to function properly.

There are a few basic components that aids the working-cycle of a computer i.e. the
Input- Process- Output Cycle and these are called as the functional components of a
computer. It needs certain input, processes that input and produces the desired
output. The input unit takes the input, the central processing unit does the
processing of data and the output unit produces the output. The memory unit holds
the data and instructions during the processing.

Digital Computer: A digital computer can be defined as a programmable machine

which reads the binary data passed as instructions, processes this binary data, and
displays a calculated digital output. Therefore, Digital computers are those that work
on the digital data.

Details of Functional Components of a Digital Computer

● Input Unit :The input unit consists of input devices that are attached to the
computer. These devices take input and convert it into binary language that the
computer understands. Some of the common input devices are keyboard, mouse,
joystick, scanner etc.

● Central Processing Unit (CPU) : Once the information is entered into the
computer by the input device, the processor processes it. The CPU is called the
brain of the computer because it is the control center of the computer. It first
fetches instructions from memory and then interprets them so as to know what is
to be done. If required, data is fetched from memory or input device. Thereafter
CPU executes or performs the required computation and then either stores the
output or displays on the output device. The CPU has three main components
which are responsible for different functions – Arithmetic Logic Unit (ALU),
Control Unit (CU) and Memory registers
● Arithmetic and Logic Unit (ALU) : The ALU, as its name suggests performs
mathematical calculations and takes logical decisions. Arithmetic calculations
include addition, subtraction, multiplication and division. Logical decisions involve
comparison of two data items to see which one is larger or smaller or equal.

● Control Unit : The Control unit coordinates and controls the data flow in and out
of CPU and also controls all the operations of ALU, memory registers and also
input/output units. It is also responsible for carrying out all the instructions stored
in the program. It decodes the fetched instruction, interprets it and sends control
signals to input/output devices until the required operation is done properly by
ALU and memory.

● Memory Registers : A register is a temporary unit of memory in the CPU. These

are used to store the data which is directly used by the processor. Registers can
be of different sizes(16 bit, 32 bit, 64 bit and so on) and each register inside the
CPU has a specific function like storing data, storing an instruction, storing
address of a location in memory etc. The user registers can be used by an
assembly language programmer for storing operands, intermediate results etc.
Accumulator (ACC) is the main register in the ALU and contains one of the
operands of an operation to be performed in the ALU.

● Memory : Memory attached to the CPU is used for storage of data and
instructions and is called internal memory The internal memory is divided into
many storage locations, each of which can store data or instructions. Each
memory location is of the same size and has an address. With the help of the
address, the computer can read any memory location easily without having to
search the entire memory. when a program is executed, it’s data is copied to the
internal memory and is stored in the memory till the end of the execution. The
internal memory is also called the Primary memory or Main memory. This
memory is also called as RAM, i.e. Random Access Memory. The time of access
of data is independent of its location in memory, therefore this memory is also
called Random Access memory (RAM). Read this for different types of RAMs

● Output Unit : The output unit consists of output devices that are attached with
the computer. It converts the binary data coming from CPU to human
understandable form. The common output devices are monitor, printer, plotter
etc.

Interconnection between Functional Components

A computer consists of input unit that takes input, a CPU that processes the input
and an output unit that produces output. All these devices communicate with each
other through a common bus. A bus is a transmission path, made of a set of
conducting wires over which data or information in the form of electric signals, is
passed from one component to another in a computer. The bus can be of three types
– Address bus, Data bus and Control Bus.
Following figure shows the connection of various functional components:
The address bus carries the address location of the data or instruction. The data bus
carries data from one component to another and the control bus carries the control
signals. The system bus is the common communication path that carries signals
to/from CPU, main memory and input/output devices. The input/output devices
communicate with the system bus through the controller circuit which helps in
managing various input/output devices attached to the computer.

BUS Arbitration
Introduction :
In a computer system, multiple devices, such as the CPU, memory, and I/O
controllers, are connected to a common communication pathway, known as
a bus. In order to transfer data between these devices, they need to have
access to the bus. Bus arbitration is the process of resolving conflicts that
arise when multiple devices attempt to access the bus at the same time.
When multiple devices try to use the bus simultaneously, it can lead to data
corruption and system instability. To prevent this, a bus arbitration
mechanism is used to ensure that only one device has access to the bus at
any given time.
There are several types of bus arbitration methods, including centralized,
decentralized, and distributed arbitration. In centralized arbitration, a single
device, known as the bus controller, is responsible for managing access to
the bus. In decentralized arbitration, each device has its own priority level,
and the device with the highest priority is given access to the bus. In
distributed arbitration, devices compete for access to the bus by sending a
request signal and waiting for a grant signal.

Bus Arbitration refers to the process by which the current bus master
accesses and then leaves the control of the bus and passes it to another
bus requesting processor unit. The controller that has access to a bus at an
instance is known as a Bus master.
A conflict may arise if the number of DMA controllers or other controllers or
processors try to access the common bus at the same time, but access can
be given to only one of those. Only one processor or controller can be Bus
master at the same point in time. To resolve these conflicts, the Bus
Arbitration procedure is implemented to coordinate the activities of all
devices requesting memory transfers. The selection of the bus master must
take into account the needs of various devices by establishing a priority
system for gaining access to the bus. The Bus Arbiter decides who would
become the current bus master.

Applications of bus arbitration in computer organization:

Shared Memory Systems: In shared memory systems, multiple devices
need to access the memory to read or write data. Bus arbitration allows
multiple devices to access the memory without interfering with each other.
Multi-Processor Systems: In multi-processor systems, multiple
processors need to communicate with each other to share data and
coordinate processing. Bus arbitration allows multiple processors to share
access to the bus to communicate with each other and with shared
memory.
Input/Output Devices: Input/Output devices such as keyboards, mice, and
printers need to communicate with the processor to exchange data. Bus
arbitration allows multiple input/output devices to share access to the bus
to communicate with the processor and memory.
Real-time Systems: In real-time systems, data needs to be transferred
between devices and memory within a specific time frame to ensure timely
processing. Bus arbitration can help to ensure that data transfer occurs
within a specific time frame by managing access to the bus.
Embedded Systems: In embedded systems, multiple devices such as
sensors, actuators, and controllers need to communicate with the
processor to control and monitor the system. Bus arbitration allows multiple
devices to share access to the bus to communicate with the processor and
memory.

There are two approaches to bus arbitration:

1. Centralized bus arbitration –
A single bus arbiter performs the required arbitration.

2. Distributed bus arbitration –

All devices participating in the selection of the next bus master.

Methods of Centralized BUS Arbitration:

There are three bus arbitration methods:

(i) Daisy Chaining method: It is a simple and cheaper method where all
the bus masters use the same line for making bus requests. The bus grant
signal serially propagates through each master until it encounters the first
one that is requesting access to the bus. This master blocks the
propagation of the bus grant signal, therefore any other requesting module
will not receive the grant signal and hence cannot access the bus.
During any bus cycle, the bus master may be any device – the processor or
any DMA controller unit, connected to the bus.

Advantages:
● Simplicity and Scalability.
● The user can add more devices anywhere along the chain, up to a
certain maximum value.
Disadvantages:
● The value of priority assigned to a device depends on the position of the
master bus.
● Propagation delay arises in this method.
● If one device fails then the entire system will stop working.

(ii) Polling or Rotating Priority method: In this, the controller is used to

generate the address for the master(unique priority), the number of address
lines required depends on the number of masters connected in the system.
The controller generates a sequence of master addresses. When the
requesting master recognizes its address, it activates the busy line and
begins to use the bus.

Advantages –
● This method does not favor any particular device and processor.
● The method is also quite simple.
● If one device fails then the entire system will not stop working.
Disadvantages –
● Adding bus masters is difficult as increases the number of address lines
of the circuit.
(iii) Fixed priority or Independent Request method –
In this, each master has a separate pair of bus request and bus grant lines
and each pair has a priority assigned to it.
The built-in priority decoder within the controller selects the highest priority
request and asserts the corresponding bus grant signal.

Advantages –
● This method generates a fast response.
Disadvantages –
● Hardware cost is high as a large no. of control lines is required.