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BT Level: RD TH

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17 views1 page

BT Level: RD TH

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chinmayeeninawe2004
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© © All Rights Reserved
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P R Patil College of Engineering And Management

Amravati
Department of Computer Science & Engineering
Session 2024-25
Question Bank
Subject: Computer Architecture and Organization Subject Code: 5KS03
Year/Sem: 3 / 5
rd th
Syllabus: Unit 3

BT
Question Questions Level
No.
Unit 3
Q1 Explain single bus organization of the data path inside a processor. 1
Q2 Draw the single bus organization of the data path of the CPU and show 1
the control sequence for the execution of ADD (R3),R1 for the
organization.
Q3 2
Draw and explain the register transfer mechanism for single bus
organization.
Q4 2
Describe hardwired control unit with neat labeled diagram
Q5 1
Explain micro programmed control unit with neat diagram.
Q6 1
Define is data path? Explain it with neat labeled diagram?
Q7 1
Explain multiple bus organization (three) of data path.
Q8 4
Differentiate in between hard wired control and micro programmed
control.

Q9 2
Draw and explain the block diagram of a complete processor.
Q10 1
Write a short notes on prefetching micro instructions in details.
Q11 2
Discuss the execution of complete instruction

Prof. Shubhangi A. Gulhane

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