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5 - System Control and Reset

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29 views

5 - System Control and Reset

Uploaded by

mohamedraw919
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lesson 5:

AVR System Control and


Reset

1
Outlines
• Resetting the AVR
• AVR Reset Sources
• AVR Reset Characteristics
• Power-on Reset
• External Reset
• Brown-out Reset
• Watchdog Reset
• MCUCSR Register
• Watchdog Timer
2
Resetting the AVR
• During Reset, all I/O Registers are set to their initial values, and
the program starts execution from the Reset Vector. The
instruction placed at the Reset Vector must be a JMP – absolute
jump – instruction to the reset handling routine.

• If the program never enables an interrupt source, the Interrupt


Vectors are not used, and regular program code can be placed at
these locations.

• The I/O ports of the AVR are immediately reset to their initial state
when a reset source goes active.
• After all reset sources have gone inactive, a delay counter is
invoked, stretching the Internal Reset. This allows the power to
reach a stable level before normal operation starts.
• The time-out period of the delay counter is defined by the user
through the CKSEL Fuses.
Reset Sources
The ATmega128 has five sources of reset:
• Power-on Reset: The MCU is reset when the supply voltage
is below the Power-on Reset threshold (VPOT).
• External Reset: The MCU is reset when a low level is
present on the RESET pin for longer than the minimum pulse
length.
• Watchdog Reset: The MCU is reset when the Watchdog
Timer period expires and the Watchdog is enabled.
• Brown-out Reset: The MCU is reset when the supply voltage
VCC is below the Brown-out Reset threshold (VBOT) and the
Brown-out Detector is enabled.
• JTAG AVR Reset: The MCU is reset as long as there is a
logic one in the Reset Register.
Reset Sources
Reset Characteristics
Power-on Reset
• A Power-on Reset (POR) pulse is generated by an
On-chip detection circuit.
• The POR is activated whenever VCC is below the
detection level.
• The POR circuit can be used to trigger the Start-up
Reset, as well as to detect a failure in supply voltage.
• A Power-on Reset (POR) circuit ensures that the
device is reset from Power-on.
• Reaching the Power-on Reset threshold voltage
invokes the delay counter, which determines how long
the device is kept in RESET after VCC rise.
• The RESET signal is activated again, without any
delay, when VCC decreases below the detection level.
Power-on Reset

MCU Start-up,
RESET Tied to
VCC.

MCU Start-up,
RESET
Extended
Externally
External Reset
• An External Reset is generated by a low level on the RESET pin.
Reset pulses longer than the minimum pulse width will generate a
reset, even if the clock is not running. Shorter pulses are not
guaranteed to generate a reset. When the applied signal reaches
the Reset Threshold Voltage – VRST – on its positive edge, the
delay counter starts the MCU after the Time-out period tTOUT has
expired.
External Reset During Operation
Brown-out Detection
• ATmega128 has an On-chip Brown-out Detection (BOD) circuit for
monitoring the VCC level during operation by comparing it to a fixed
trigger level. The trigger level for the BOD can be selected by the fuse
BODLEVEL to be 2.7V (BODLEVEL unprogrammed), or 4.0V
(BODLEVEL programmed). The trigger level has a hysteresis to ensure
spike free Brown-out Detection. The hysteresis on the detection level
should be interpreted as VBOT+ = VBOT + VHYST/2 and VBOT- =
VBOT - VHYST/2.

• The BOD circuit can be enabled/disabled by the fuse BODEN. When the
BOD is enabled (BODEN programmed), and VCC decreases to a value
below the trigger level the Brown-out Reset is immediately activated.
When VCC increases above the trigger level the delay counter starts the
MCU after the Time-out period tTOUT has expired.
Brown-out Detection

Brown-out Reset During Operation


Watchdog Reset
When the Watchdog times out, it will generate a short
reset pulse of one CK cycle duration. On the falling edge of
this pulse, the delay timer starts counting the Time-out
period tTOUT.
MCU Control and Status Register –
MCUCSR
The MCU Control and Status Register provides information
on which reset source caused a MCU Reset.

Bit 4 – JTRF: JTAG Reset Flag


Bit 3 – WDRF: Watchdog Reset Flag
Bit 2 – BORF: Brown-out Reset Flag
Bit 1 – EXTRF: External Reset Flag
Bit 0 – PORF: Power-on Reset Flag
Internal Voltage Reference
• ATmega128 features an internal bandgap
reference. This reference is used for
Brown-out Detection, and it can be used
as an input to the Analog Comparator or
the ADC. The 2.56V reference to the ADC
is generated from the internal bandgap
reference.
Watchdog Timer
• The Watchdog Timer is clocked from a separate
On-chip Oscillator which runs at 1 MHz.
Watchdog Timer
• By controlling the Watchdog Timer prescaler, the
Watchdog Reset interval can be adjusted.

• The WDR – Watchdog Reset – instruction resets the


Watchdog Timer. The Watchdog Timer is also reset
when it is disabled and when a Chip Reset occurs.

• Eight different clock cycle periods can be selected to


determine the reset period. If the reset period
expires without another Watchdog Reset, the MCU
resets and executes from the Reset Vector.
Assignment
• Describe and discuss the function of WDTCR
register in ATmega128 MCU? Explain in details
the function of each bit in the register.

17

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