LabSheet 1
LabSheet 1
A. Objectives
B. Equipment
1. Simulator at https://circuitverse.org/simulator
C. Teori Singkat
A logic gate is an elementary building block of a digital circuit. Most logic gates
have two inputs and one output. At any given moment, every terminal is in one of the
two binary conditions low (0) or high (1), represented by different voltage levels. The
logic state of a terminal can, and generally does, change often, as the circuit processes
data. In most logic gates, the low state is approximately zero volts (0 V), while the high
state is approximately five volts positive (+5 V). There are seven basic logic gates:
AND, OR, XOR, NOT, NAND, NOR, and XNOR.
The AND gate is so named because, if 0 is called "false" and 1 is called "true,"
the gate acts in the same way as the logical "and" operator. The following illustration
and table show the circuit symbol and logic combinations for an AND gate. (In the
symbol, the input terminals are at left and the output terminal is at right.) The output is
"true" when both inputs are "true." Otherwise, the output is "false."
The OR gate gets its name from the fact that it behaves after the fashion of the
logical inclusive "or." The output is "true" if either or both of the inputs are "true." If
both inputs are "false," then the output is "false."
Engineering Faculty of UNP Padang Sheet : Labsheet 1
Department : Electronics Engineering Course : Digital System
Time : 2 x 50 Menit Topic : Kontrol Output
Code : TIK1.61.1311 Title : Combinational Logic Gates
The NAND gate operates as an AND gate followed by a NOT gate. It acts in the
manner of the logical operation "and" followed by negation. The output is "false" if both
inputs are "true." Otherwise, the output is "true."
D. Procedures
2. Analyze the circuit and record in the following table the state of the logic display for
each combination of the switches.
5. Analyze the circuit and record in the following table the state of the logic display for
each combination of the switches.
Engineering Faculty of UNP Padang Sheet : Labsheet 1
Department : Electronics Engineering Course : Digital System
Time : 2 x 50 Menit Topic : Kontrol Output
Code : TIK1.61.1311 Title : Combinational Logic Gates
7. By using the Boolean Equation below, draw the circuit and connect the circuit.
Engineering Faculty of UNP Padang Sheet : Labsheet 1
Department : Electronics Engineering Course : Digital System
Time : 2 x 50 Menit Topic : Kontrol Output
Code : TIK1.61.1311 Title : Combinational Logic Gates
8. Analyze the circuit and record in the following table the state of the logic display for
each combination of the switches.
Engineering Faculty of UNP Padang Sheet : Labsheet 1
Department : Electronics Engineering Course : Digital System
Time : 2 x 50 Menit Topic : Kontrol Output
Code : TIK1.61.1311 Title : Combinational Logic Gates
E. Questions