< DIPIPM >

SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

OUTLINE MAIN FUNCTION AND RATINGS

 RC-IGBT inverter bridge for three phase DC-to-AC power
conversion
 Built-in bootstrap diodes with current limiting resistor
 Open emitter type

APPLICATION
 AC 100~240V (DC voltage:400V or below) three phase
low power motor inverter drive

TERMINAL LINE UP
Terminal Part number Suffix
Normal terminal SLIMDIP-S 550
Short terminal SLIMDIP-S 555
Normal terminal type
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS
● For P-side : Drive circuit, High voltage high-speed level shifting, Control supply under-voltage protection (UV)
● For N-side : Drive circuit, Control supply under-voltage protection (UV), Short circuit protection (SC),
Over temperature protection (OT)
● Fault signaling : Corresponding to SC fault (N-side IGBT), UV fault (N-side supply) and OT fault
● Temperature monitoring : Outputting LVIC temperature by analog signal
● Input interface : Schmitt-triggered 3V, 5V input compatible, high active logic.
● UL Recognized : UL1557 File E323585

INTERNAL CIRCUIT

VUFS(2) RC-IGBT1 P(27)

Bootstrap Diode VUFB(3)

RC-IGBT
with current limiting VVFS(4)
resistor VVFB(5) U(26)

RC-IGBT2
VWFS(6)
VWFB(7)
HVIC

UP(8) V(25)

VP(9) RC-IGBT3

WP(10)

VP1(11)
W(24)
RC-IGBT4
VNC(12)

UN(13)
NU(23)
VN(14)
RC-IGBT5

WN(15)

VN1(16)
NV(22)
LVIC
FO(17) RC-IGBT6

CIN(18)

VNC(19) NW(21)

VOT(20)

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)

INVERTER PART
Symbol Parameter Condition Ratings Unit
VCC Supply voltage Applied between P-NU,NV,NW 450 V
VCC(surge) Supply voltage (surge) Applied between P-NU,NV,NW 500 V
VCES Collector-emitter voltage 600 V
±IC Each IGBT collector current TC= 25°C (Note 1) 5 A
±ICP Each IGBT collector current (peak) TC= 25°C, less than 1ms 10 A
Tj Junction temperature -30~+150 °C
Note1: Pulse width and period are limited due to junction temperature.

CONTROL (PROTECTION) PART

Symbol Parameter Condition Ratings Unit
VD Control supply voltage Applied between VP1-VNC, VN1-VNC 20 V
VDB Control supply voltage Applied between VUFB-VUFS, VVFB-VVFS,VWFB-VWFS 20 V
VIN Input voltage Applied between UP, VP, WP, UN, VN, WN-VNC -0.5~VD+0.5 V
VFO Fault output supply voltage Applied between FO-VNC -0.5~VD+0.5 V
IFO Fault output current Sink current at FO terminal 1 mA
VSC Current sensing input voltage Applied between CIN-VNC -0.5~VD+0.5 V

TOTAL SYSTEM
Symbol Parameter Condition Ratings Unit
Self protection supply voltage limit VD = 13.5~16.5V, Inverter Part
VCC(PROT) 400 V
(Short circuit protection capability) Tj = 125°C, non-repetitive, less than 2μs
TC Module case operation temperature Measurement point of Tc is described in Fig.1 (Note2) -30~+115 °C
Tstg Storage temperature -40~+125 °C
60Hz, Sinusoidal, AC 1min, between connected all pins
Viso Isolation voltage 2000 Vrms
and heat sink plate

Note2 TC MEASUREMENT POINT

Fig. 1

Control terminals

Heat sink
RC-IGBT 9.6mm
chip position

Power terminals
Tc point

THERMAL RESISTANCE
Limits
Symbol Parameter Condition Unit
Min. Typ. Max.
Junction to case thermal
Rth(j-c)Q Inverter RC-IGBT part (per 1/6 module) - - 5.4 K/W
resistance (Note 3)
Note 3: Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100μm~+200μm on the contacting surface of
DIPIPM and heat sink. The contacting thermal resistance between DIPIPM case and heat sink Rth(c-f) is determined by the thickness and the thermal
conductivity of the applied grease. For reference, Rth(c-f) is about 0.4K/W (per 1/6 module, grease thickness: 20μm, thermal conductivity: 1.0W/m•K).

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)

INVERTER PART
Limits
Symbol Parameter Condition Unit
Min. Typ. Max.
Collector-emitter saturation IC= 5A, Tj= 25°C - 1.85 2.25
VCE(sat) VD=VDB = 15V, VIN= 5V V
voltage IC= 5A, Tj= 125°C - 2.05 2.45
VEC FWDi forward voltage VIN= 0V, -IC= 5A - 1.55 1.95 V
ton 0.65 1.05 1.45 μs
tC(on) VCC= 300V, VD= VDB= 15V - 0.30 0.55 μs
toff Switching times IC= 5A, Tj= 125°C, VIN= 0↔5V - 1.15 1.60 μs
tC(off) Inductive Load (upper-lower arm) - 0.15 0.40 μs
trr - 0.20 - Μs
Collector-emitter cut-off Tj= 25°C - - 1
ICES VCE=VCES mA
current Tj= 125°C - - 10
CONTROL (PROTECTION) PART
Limits
Symbol Parameter Condition Unit
Min. Typ. Max.
VD=15V, VIN=0V - - 3.10
ID Total of VP1-VNC, VN1-VNC VD=15V, VIN=3.3V - - 4.20
Circuit current VD=15V, VIN=5V - - 3.10 mA
Each part of VUFB-VUFS, VD=VDB=15V, VIN=0V - - 0.10
IDB
VVFB-VVFS, VWFB-VWFS VD=VDB=15V, VIN=5V - - 0.10
VSC(ref) Short circuit trip level VD = 15V (Note 4) 0.455 0.480 0.505 V
UVDBt P-side Control supply Trip level 7.0 10.0 12.0 V
UVDBr under-voltage protection(UV) Reset level 7.0 10.0 12.0 V
Tj ≤125°C
UVDt N-side Control supply Trip level 10.3 - 12.5 V
UVDr under-voltage protection(UV) Reset level 10.8 - 13.0 V
LVIC Temperature=95C 2.76 2.89 3.03 V
VOT Temperature Output Pull down R=5.1kΩ (Note 5)
LVIC Temperature=25C 0.86 1.16 1.39 V
OTt Over temperature protection VD = 15V Trip level 115 130 145 °C
OTrh (Note6) Detect LVIC temperature Hysteresis of trip-reset - 10 - °C
VFOH VSC = 0V, FO terminal pulled up to 5V by 10kΩ 4.9 - - V
Fault output voltage
VFOL VSC = 1V, IFO = 1mA - - 0.95 V
tFO Fault output pulse width (Note 7) 20 - - μs
IIN Input current VIN = 5V 0.70 1.00 1.50 mA
Vth(on) ON threshold voltage - 1.70 2.35
Vth(off) OFF threshold voltage 0.70 1.30 -
Applied between UP, VP, WP, UN, VN, WN-VNC V
ON/OFF threshold
Vth(hys) 0.25 0.40 -
hysteresis voltage
VF Bootstrap Di forward voltage IF=10mA including voltage drop by limiting resistor (Note 8) 1.1 1.7 2.3 V
R Built-in limiting resistance Included in bootstrap Di 80 100 120 Ω
Note 4 : SC protection works only for N-side IGBT. Please select the external shunt resistance such that the SC trip-level is less than 1.7 times of the current rating.
5 : Temperature of LVIC vs. VOT output characteristics is described in Fig.3.
6 : When the LVIC temperature exceeds OT trip temperature level(OTt), OT protection works and Fo outputs. In that case if the heat sink dropped off or fixed
loosely, don't reuse that DIPIPM. (There is a possibility that junction temperature of power chips exceeded maximum Tj(150C).
7 : Fault signal Fo outputs when SC, UV or OT protection works. Fo pulse width is different for each protection modes. At SC failure, Fo pulse width is a fixed
width (=minimum 20μs), but at UV or OT failure, Fo outputs continuously until recovering from UV or OT state. (But minimum Fo pulse width is 20μs.)
8 : The characteristics of bootstrap Di is described in Fig.2.

Fig. 2 Characteristics of Bootstrap Di VF-IF curve (@Ta=25C) Including Voltage Drop by Limiting Resistor (Right chart is enlarged chart.)

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Fig. 3 Temperature of LVIC vs. VOT Output Characteristics

4.0 max

3.8 typ

3.6 min

3.4

3.2
3.03
3.0
VOT Output [V]

2.89
2.8 2.76

2.6

2.4

2.2

2.0

1.8

1.6
60 70 80 90 95 100 110 120 130
LVIC Temperature [℃]

Fig. 4 Pattern Wiring Around the Analog Voltage Output Circuit [VOT terminal]

Inside LVIC
of DIPIPM

Temperature VOT
signal MCU
Ref
VNC
5.1kΩ

(1) VOT outputs the analog signal that is amplified signal of temperature detecting element on LVIC by inverting amplifier.
(2) It is recommended to insert 5kΩ (5.1kΩ is recommended) pull down resistor for getting linear output characteristics at low temperature below room
temperature. When the pull down resistor is inserted between VOT and VNC(control GND), the extra circuit current, which is calculated approximately by VOT
output voltage divided by pull down resistance, flows as LVIC circuit current continuously. In the case of using VOT for detecting high temperature over room
temperature only, it is unnecessary to insert the pull down resistor.
(3) In the case of using VOT with low voltage controller like 3.3V MCU, VOT output might exceed control supply voltage 3.3V when temperature rises excessively.
If system uses low voltage controller, it is recommended to insert a clamp Di between control supply of the controller and VOT output for preventing over
voltage destruction.
(4) In the case of not using VOT, leave VOT output NC (No Connection).

Refer the application note for SLIMDIP series about the usage of VOT.

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

MECHANICAL CHARACTERISTICS AND RATINGS

Limits
Parameter Condition Unit
Min. Typ. Max.
Mounting torque Mounting screw : M3 (Note 9) Recommended 0.69N·m 0.59 0.69 0.78 N·m
Control terminal: Load 5N
Terminal pulling strength JEITA-ED-4701 10 - - s
Power terminal: Load 10N
Control terminal: Load 2.5N
Terminal bending strength Power terminal: Load 5N JEITA-ED-4701 2 - - times
90deg. bend
Weight - 5.5 - g
Heat radiation part flatness (Note 10) -30 - 80 μm
Note 9: Plain washers (ISO 7089~7094) are recommended.
Note 10: Measurement positions of heat radiation part flatness are as below

0.5mm

－＋
Measurement position

14.9mm

Heat sink side

＋
－
Heat sink side

RECOMMENDED OPERATION CONDITIONS

Limits
Symbol Parameter Condition Unit
Min. Typ. Max.
VCC Supply voltage Applied between P-NU, NV, NW 0 300 400 V
VD Control supply voltage Applied between VP1-VNC, VN1-VNC 13.5 15.0 16.5 V
VDB Control supply voltage Applied between VUFB-VUFS, VVFB-VVFS,VWFB-VWFS 13.0 15.0 18.5 V
∆VD, ∆VDB Control supply variation -1 - +1 V/μs
tdead Arm shoot-through blocking time For each input signal, TC100C 1.0 - - μs
fPWM PWM input frequency Tc100C, Tj125C - - 20 kHz
VCC = 300V, VD=VDB=15V, P.F = 0.8, fPWM= 5kHz - - 2.5
IO Allowable r.m.s. current Sinusoidal PWM Arms
TC ≤ 100°C, Tj ≤ 125°C (Note11) fPWM= 15kHz - - 2.0
PWIN(on) 0.7 - -
Minimum input pulse width (Note 12) μs
PWIN(off) 0.7 - -
VNC VNC variation Between VNC-NU, NV, NW (including surge) -5.0 - +5.0 V
Tj Junction temperature -20 - +125 °C
Note 11: Allowable r.m.s. current depends on the actual application conditions.
12: DIPIPM might not make response if the input signal pulse width is less than PWIN(on), PWIN(off).

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Fig. 5 Timing Charts of the DIPIPM Protective Functions

[A] Short-Circuit Protection (N-side only with the external shunt resistor and RC filter)
a1. Normal operation: IGBT ON and outputs current.
a2. Short circuit current detection (SC trigger)
(It is recommended to set RC time constant 1.5~2.0μs so that IGBT shut down within 2.0μs when SC.)
a3. All N-side IGBT's gates are hard interrupted.
a4. All N-side IGBTs turn OFF.
a5. FO outputs for tFo=minimum 20μs.
a6. Input = “L”: IGBT OFF
a7. Fo finishes output, but IGBTs don't turn on until inputting next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)
a8. Normal operation: IGBT ON and outputs current.

Lower-side control
input a6

SET RESET
Protection circuit state
a3
Internal IGBT gate
a4
SC trip current level
a8
Output current Ic a1 a7
a2
SC reference voltage
Sense voltage of
the shunt resistor
Delay by RC filtering
Error output Fo a5

[B] Under-Voltage Protection (N-side, UVD)

b1. Control supply voltage V D exceeds under voltage reset level (UVDr), but IGBT turns ON by next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)
b2. Normal operation: IGBT ON and outputs current.
b3. VD level drops to under voltage trip level. (UVDt).
b4. All N-side IGBTs turn OFF in spite of control input condition.
b5. Fo outputs for tFo=minimum 20μs, but output is extended during VD keeps below UVDr.
b6. VD level reaches UVDr.
b7. Normal operation: IGBT ON and outputs current.

Control input

Protection circuit state RESET SET RESET

UVDr
Control supply voltage VD b1 b6
UVDt b3

b2 b4 b7

Output current Ic

Error output Fo b5

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SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

[C] Under-Voltage Protection (P-side, UVDB)

c1. Control supply voltage VDB rises. After the voltage reaches under voltage reset level UVDBr, IGBT turns on by next ON signal (LH).
c2. Normal operation: IGBT ON and outputs current.
c3. VDB level drops to under voltage trip level (UVDBt).
c4. IGBT of the corresponding phase only turns OFF in spite of control input signal level, but there is no FO signal output.
c5. VDB level reaches UVDBr.
c6. Normal operation: IGBT ON and outputs current.

Control input

RESET SET
RESET
Protection circuit state

UVDBr
c3
Control supply voltage VDB c1 UVDBt c5

c2 c4 c6

Output current Ic

Error output Fo Keep High-level (no fault output)

[D] Over Temperature Protection (N-side, Detecting LVIC temperature)

d1. Normal operation: IGBT ON and outputs current.
d2. LVIC temperature exceeds over temperature trip level (OTt).
d3. All N-side IGBTs turn OFF in spite of control input condition.
d4. Fo outputs for tFo=minimum 20μs, but output is extended during LVIC temperature keeps over OTt.
d5. LVIC temperature drops to over temperature reset level.
d6. Normal operation: IGBT turns on by next ON signal (LH).
(IGBT of each phase can return to normal state by inputting ON signal to each phase.)

Control input

Protection circuit state SET RESET

d2
OTt
d5
Temperature of LVIC
OTt - OTrh
d1 d3 d6

Output current Ic

d4
Error output Fo

Publication Date : January 2019

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 < DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Fig. 6 Example of Application Circuit

P(27)
C1 D1 C2 VUFS(2) RC-IGBT

+ VUFB(3)

C1 D1 C2 VVFS(4) U(26)

+ VVFB(5)
In the case of being affected
by noise, it is recommended to C1 D1 C2 VWFS(6)
insert RC filter. VWFB(7)
+ HVIC
UP(8) V(25)
M
VP(9)

WP(10)

VP1(11)
W(24)
C2
+
VNC(12)
MCU

C3
UN(13)

VN(14)
NU(23)
WN(15)

5V
VN1(16)
C2
Fo(17)
LVIC
NV(22)
15V VD
CIN(18)

+
C1 D1 R1 C4 VNC(19)
Long wiring might cause
NW(21)
VOT(20) short circuit failure
5.1kΩ Long wiring might cause SC level C
fluctuation and malfunction
D
Long GND wiring might generate B Shunt
noise to input signal and cause resistor
IGBT malfunction A N1
Control GND wiring Power GND wiring

(1) If control GND is connected with power GND by common broad pattern, it may cause malfunction by power GND fluctuation.
It is recommended to connect control GND and power GND at only a point N1 (near the terminal of shunt resistor).
(2) It is recommended to insert a Zener diode D1(24V/1W) between each pair of control supply terminals to prevent surge destruction.
(3) To prevent surge destruction, the wiring between the smoothing capacitor and the P, N1 terminals should be as short as possible.
Generally a 0.1-0.22μF snubber capacitor C3 between the P-N1 terminals is recommended.
(4) R1, C4 of RC filter for preventing protection circuit malfunction is recommended to select tight tolerance, temp-compensated type.
The time constant R1C4 should be set so that SC current is shut down within 2μs. (1.5μs~2μs is general value.) SC interrupting time might
vary with the wiring pattern, so the enough evaluation on the real system is necessary.
(5) To prevent malfunction, the wiring of A, B, C should be as short as possible.
(6) The point D at which the wiring to CIN filter is divided should be near the terminal of shunt resistor. NU, NV, NW terminals should be
connected at near NU, NV, NW terminals.
(7) All capacitors should be mounted as close to the terminals as possible. (C1: good temperature, frequency characteristic electrolytic type and
C2:0.01μ-2μF, good temperature, frequency and DC bias characteristic ceramic type are recommended.)
(8) Input drive is High-active type. There is a minimum 3.3kΩ pull-down resistor in the input circuit of IC. To prevent malfunction, the wiring of
each input should be as short as possible. When using RC coupling circuit, make sure the input signal level meet the turn-on and turn-off
threshold voltage.
(9) Thanks to built-in HVIC, direct coupling to MCU without any optocoupler or transformer isolation is possible.
(10) Fo output is open drain type. It should be pulled up to MCU or control power supply (e.g. 5V,15V) by a resistor that makes IFo up to 1mA. (IFO
is estimated roughly by the formula of control power supply voltage divided by pull-up resistance. In the case of pulled up to 5V, 10kΩ (5kΩ
or more) is recommended.)
(11) Two VNC terminals are connected inside DIPIPM, please connect either one to the 15V power supply GND outside and leave another one
open.
(12) If high frequency noise superimposed to the control supply line, IC malfunction might happen and cause DIPIPM erroneous operation. To
avoid such problem, line ripple voltage should meet dV/dt ≤+/-1V/μs, Vripple≤2Vp-p.

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Fig. 7 MCU I/O Interface Circuit

5V line

Note: The RC coupling (parts shown in the dotted line) at

each input depends on user’s PWM control strategy
10kΩ DIPIPM and the wiring impedance of the printed circuit board.
The DIPIPM signal input section integrates a
3.3kΩ(min) pull-down resistor. Therefore, when using
UP,VP,WP,UN,VN,WN
an external filtering resistor, please pay attention to
MCU the signal voltage drop at input terminal.
3.3kΩ(min)
Fo

VNC(Logic)

Fig. 8 Pattern Wiring Around the Shunt Resistor

NU, NV, NW should be connected

each other at near terminals.
DIPIPM DIPIPM
Wiring Inductance should be less than 10nH. Each wiring Inductance should be less than 10nH.
Inductance of a copper pattern with Inductance of a copper pattern with
length=17mm, width=3mm is about 10nH. length=17mm, width=3mm is about 10nH.

NU N1 NU N1
NV
NV
NW
VNC Shunt VNC NW
resistor GND wiring from VNC should GND wiring from VNC should
Shunt
be connected close to the resistors be connected close to the
terminal of shunt resistor. terminal of shunt resistor.

Low inductance shunt resistor like surface mounted (SMD) type is recommended.

Fig. 9 External SC Protection Circuit with Using Three Shunt Resistors

DIPIPM

Drive circuit
P

P-side
U
V External protection circuit
W
N-side Comparator
(Open collector output type)
Rf
C B
NW - 5V
Cf
NV Vref +
NU
Drive circuit
-
Protection circuit D OR output
Vref +
VNC CIN
-
Shunt
A resistors Vref +
N1

(1) It is necessary to set the time constant RfCf of external comparator input so that IGBT stop within 2μs when short circuit occurs.
SC interrupting time might vary with the wiring pattern, comparator speed and so on.
(2) The threshold voltage Vref should be set up the same rating of short circuit trip level (Vsc(ref) typ. 0.48V).
(3) Select the external shunt resistance so that SC trip-level is less than specified maximum value.
(4) To avoid malfunction, the wiring A, B, C should be as short as possible.
(5) The point D at which the wiring to comparator is divided should be near the terminal of shunt resistor.
(6) OR output high level should be over 0.505V (=maximum Vsc(ref)).
(7) GND of Comparator, Vref circuit and Cf should be not connected to noisy power GND but to control GND wiring.

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Fig. 10 Package Outlines [Dimension: mm]

[ SLIMDIP-S Suffix:550 : Normal Terminal Type ]

[ SLIMDIP-S Suffix:555 : Short Terminal Type ]

Note: Connect only one VNC terminal (No.12 or 19) to the system GND and leave another one open.

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< DIPIPM >
SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Revision Record

Rev. Date Page Revised contents

1 20/04/2016 - New
2 03/04/2017 10 Revise detail B part of package outline
1 Short terminal type is added to terminal line up.
3 05/04/2018 5 JEITA-ED-4701 was EIAJ-ED-4701
10 Add ‘Short terminal type’
4 22/01/2019 1 Outline’s note was ‘Long terminal type’.

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SLIMDIP-S
TRANSFER MOLDING TYPE
INSULATED TYPE

Keep safety first in your circuit designs!

Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more
reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors
may lead to personal injury, fire or property damage. Remember to give due consideration to safety when
making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.

Notes regarding these materials

•These materials are intended as a reference to assist our customers in the selection of the Mitsubishi
semiconductor product best suited to the customer’s application; they do not convey any license under any
intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.
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•All information contained in these materials, including product data, diagrams, charts, programs and
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Please also pay attention to information published by Mitsubishi Electric Corporation by various means,
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•When using any or all of the information contained in these materials, including product data, diagrams,
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•Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or
system that is used under circumstances in which human life is potentially at stake. Please contact
Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when
considering the use of a product contained herein for any specific purposes, such as apparatus or systems
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•The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or
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Any diversion or re-export contrary to the export control laws and regulations of Japan and/or the country of
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•Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor
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© 2019 MITSUBISHI ELECTRIC CORPORATION. ALL RIGHTS RESERVED.

SLIMDIP, DIPIPM and CSTBT are trademarks of MITSUBISHI ELECTRIC CORPORATION.

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