SCHOOL OF ELECTRICAL ENGINEERING

Laboratory Manual
Basic Electrical & Electronics Engineering - BEEE102P

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 SCHOOL OF ELECTRICAL ENGINEERING

Course Name : Basic Electrical and Electronics Engineering Practical

Course Code : BEEE102P

Register Number : _____________________________

Certified that this is a bonafide work done by _________________________

of _____________semester B. Tech ______________________________

Engineering submitted for the practical examination held on _________ at

Vellore Institute of Technology, Vellore - 14

Date: Faculty In – charge

Internal Examiner
 List of
Experiments
 Simulation Experiments
Sl.No Date Name of the Experiment Remark

1 Verification of Kirchhoff’s voltage law

2 Verification of maximum power transfer theorem using

parametric sweep method

3 Sinusoidal steady state response of RLC series circuit

4 Design of full adder digital circuit

5 Design of single-phase half-wave and full wave rectifier

Hardware Experiments

Sl.No Date Name of the Experiment Remark

1 Verification of Kirchhoff’s current law

2 Staircase wiring circuit layout of multi storage building

3 Design of half adder circuit using logic gates

4 Design of regulated power supply using Zener diode

5 Measurement of energy using single phase energy meter

 Hardware
Experiments
Ex. No.: 1 Date:26.09.22
Verification of Kirchhoff’s voltage law
(KVL)

Aim:
To study and verify the Kirchhoff’s voltage law for the given network.

Apparatus/Tool required:

Sl. No. Components Name Range Quantity

1 330Ω, 270Ω, 390Ω,
Resister 220Ω, 180Ω
Each 1 No.
2 Ammeter 0-50mA (DC) 1 No.
3 Voltmeter 0-30V (DC) 1 No.
4 RPS 0-32 V (DC) 1 No.
5 Connecting Wires - Few
6 Bread Board - 1 No.

Circuit Diagram:
330 270 390

10V
12V
220 180

Theory:

Kirchhoff’s Voltage Law (KVL):

It states that in a closed circuit, the algebraic sum of all source voltages must be equal to the
algebraic sum of all the voltage drops. Voltage drop is encountered when current flows in an
element (resistance or load) from the higher-potential terminal toward the lower potential
terminal. Voltage rise is encountered when current flows in an element (voltage source) from
lower potential terminal (or negative terminal of voltage source) toward the higher potential
terminal (or positive terminal of voltage source).
Practical Circuit

Photograph of practical circuit done in the lab

Manual Calculations:
Procedure:
1. Connect the circuit as shown in the circuit diagram
2. Adjust the voltage sources and set to the required values as shown in the circuit diagram
3. Note down the ammeter and voltmeter reading
4. Find out the branch voltage and currents and compare it with the calculated values

Result:
Manual Calculations Practical output
Ex. No.: 2 Date:

Staircase wiring circuit layout for multi storage building

Aim:
To control the status of a given lamp from 2 different locations by using two – way switches.
Apparatus/Tool required:

S. No. Name of the apparatus Range / Type Quantity

1 Incandescent Lamp 230 V, 25 W 1 No.

2 Lamp holder 230 V, Level 1 No.
3 Switch Box 4” x 4” 2 Nos.
4 2-way switch 230 V, 5 A 2 Nos.
5 P. V. C. casing capping ¼” As required
6 Wooden Board 4’ x 3.5‘ 1 No.
7 Wires 1 sq. mm” As required

Tools Required
Screw driver, Wire stripper, Hacksaw, combination plier, drilling machine, electrician knife.

Theory
In this wiring, a single lamp is controlled from two places. For this purpose two numbers of two
way switches are used. This wiring which makes use of 2 switches to operate bulb at the
beginning of the stair lights and the bulb gives off by pushing the button in the end. One of the
terminals of the bulb is connected to the main line whose power line is connected to middle slot
of two-way switch. Remaining first of these slots is connected in parallel as in crossed node.

Fuse Rating Calculations

Power drawn by the circuit = 60 watts Voltage of the circuit = 230 volts

P = V I Cos 

P = V x I x 1 (Assuming Cos  = 1 for resistive load)

Current in the circuit (I) = (power (P) / Voltage (V)
= 60 W / 230 V = 0.260 AMP.

Fuse rating of the circuit= rounding off the current to the nearest 5 = 5A (Normally fuses are
available in the ratings of 5A, 10A and etc.)
Circuit Diagram

230V, 60W
Lamp

S1, S2 : 2-way switches.

Observation

Condition Expected conditions Observed conditions

No S1 S2 Lamp S1 S2 Lamp

1 1 1 ON

2 1 2 OFF

3 2 1 OFF

4 2 2 ON
Photograph of the practical circuit done in the lab
Procedure

1. Collect the materials required for this experiment.

2. Draw the layout of the given circuit diagram in the circuit board.

3. Fix the necessary materials, by using drilling machine in the layout board.

4. One end of the lamp holder is connected to neutral point and another point is connected
at the center of the two-way switch (S2)

5. The center of the switch (S1) is connected to the phase line.

6. The connection of the other two ends of two-way switch is connected as follows. The
point 1 of switch S1 is connected to point 1 of switch S2 and point 2 of S1 is connected
to point 2 of S2.

7. The given lamp is fixed on the lamp holders.

8. Test the Circuit for all possible combination of switch positions.

Precautions

1. Energize the circuit with the presence of Lab instructor / Faculty.

2. No part of a live circuit should be touched by the bare hand.

3. Keep the body, or any part of it, out of the circuit.

4. Keep the work area and workbench clear of items not used in the experiment.

5. When disassembling a circuit, first remove the source of power.

Result
Ex. No.: 3 Date:

Design of half adder circuit using logic gates

Aim:
To design and verify a half adder using logic gates

Apparatus/Tool required

Range /
S. No. Name of the apparatus Quantity
Type
1 IC 7486 - 1 No.
2 IC 7408 - 1 No.
3 LED - 2 Nos.
4 RPS 0 – 15 V 1 No.
5 Resistor 330 Ω 2 Nos.
6 Breadboard - 1 No.
7 Wires - Few

Theory

Half adder circuit is two-bit adder. It is also known as modulo – 2 adder. The expression for
logic sum S of half adder is

The logic expression for carry C is

C=A B .
Circuit Diagram:
U1A
1 330 LED
7486 3
2

A
U2A
1 330 LED
7408 3

B 2

Photograph of the practical circuit done in the lab

Truth Table

A B S=AB C=A.B

0 0

0 1

1 0

1 1

Procedure:

1. Connect the circuit as shown in figure

2. Apply voltages to inputs A and B as represented in the truth table and verify the
truth table

Result:
Ex. No.: 4 Date:

Design of regulated power supply using Zener diode

Aim:
To verify the performance of Zener diode

Apparatus/Tool required

Range /
S. No. Name of the apparatus Quantity
Type
1 Zener diode - 1 No.
2 RPS 0 – 30 V 1 No.
3 Voltmeter 0 – 30 V 2 No.
4 Resistor 330 Ω 1 No.
5 Resistor 1 kΩ 1 No.
6 Breadboard - 1 No.
7 Wires - Few

Theory

Zener diodes are generally used in the reverse bias mode. This voltage across the diode (Zener
Voltage, Vz) remains nearly constant even with large changes in current through the diode
caused by variations in the supply voltage or load. This ability to control itself can be used to
great effect to regulate or stabilize a voltage source against supply or load variations. The Zener
diode maintains a constant output voltage until the diode current falls below the minimum Iz
value in the reverse breakdown region, which means the supply voltage, V S, must be much
greater than Vz for a successful breakdown operation. When no load resistance, RL, is connected
to the circuit, no load current (IL = 0), is drawn and all the circuit current passes through the
Zener diode which dissipates its maximum power. So, a suitable current limiting resistor, (R S) is
always used in series to limit the Zener current to less than its maximum rating under this "no-
load" condition.

As shown in the circuit diagram, a more stable reference voltage can be produced by connecting
a simple Zener regulator circuit across the output of the rectifier. The breakdown condition of
the Zener can be confirmed by calculating the Thevenin voltage, VTH, facing the diode is given
as:
This is the voltage that exists when the Zener is disconnected from the circuit. Thus, VTH has to
be greater than the Zener voltage to facilitate breakdown. Now, under this breakdown condition,
irrespective of the load resistance value, the current through the current limiting resistor, IS, is
given by

The output voltage across the load resistor, VL, is ideally equal to the Zener voltage and the load
current, IL, can be calculated using Ohm’s law:

Thus the Zener current, IZ, is

Now that you have constructed a basic power supply, its quality depends on its load and line
regulation characteristics as defined below.
Load Regulation: It indicates how much the load voltage varies when the load current changes.
Quantitatively, it is defined as:

where VNL = load voltage with no load current (IL = 0) and VFL = load voltage with full load
current. The smaller the regulation, the better is the power supply.
Line Regulation: It indicates how much the load voltage varies when the input line voltage
changes. Quantitatively, it is defined as:

where VHL = load voltage with high input line voltage, and VLL = load voltage with low input line
voltage. As with load regulation, the smaller the regulation, the better is the power supply.
Circuit Diagram

330

0-15V 0-15V

Zener Diode
1k
V

Table (i) Line Regulation: Load Resistor = _________Ω

Input DC Voltage Output DC Voltage (VL)

Sl.No
(Vi) in Volts in Volts
1

Table (ii) Load Regulation: Input d.c. voltage = _________V

Load Resistance in Output DC Voltage (VL)

Sl.No
ohms in Volts
1

6
Photograph of the practical circuit done in the lab
Procedure:

Line Regulation:

1. Connect the circuit as shown in the diagram

2. Keep the load resistance constant at a particular value
3. Vary the input voltage and note down the variation in the output voltage

Load Regulation:

1. Connect the circuit as shown in the diagram

2. Keep the input voltage constant at a particular value
3. Vary the load resistance and note down the variation in the output voltage

Result:
Ex. No.: 5 Date:

Measurement of energy using single – phase energy meter

Aim:

To measure energy in a given circuit Using single phase Energy Meter and verify the same.

Apparatus/Tool required

S. No: Item Specification / Range Quantity

1. Ammeter ( 0 – 10 A ) MI 1

2. Voltmeter ( 0 – 300 V ) MI 1

3. Wattmeter 300 V , 10 A , UPF 1

4. Stop clock ----- 1

Theory:

The watt-hour meter is an instrument used for measuring energy. As energy is the product of
power and time; the watt-hour meter must take into consideration both of these factors.
Induction type of energy meters are universally used for measurement of energy in domestic and
industrial AC circuits. The term testing includes the checking of the actual registration of the
meter as well as the adjustments done to bring the errors of the meters within the prescribed
limits. The reading of energy meter is verified to check the calibration of the meter. Here a
standard wattmeter is used for comparing the values
 Circuit diagram:

WATTMETER
300V, 10A, UPF ENERGY METER
300V, 10A
CC
P A M L C1 P1

230 V / 0 – 270 V ,6A

AUTO TRANSFORMER PC
(0-10A) MI C PC V
CC
C2 P2
L
V O
230V, 1
,6A

(0-300V) MI A
50HZ P
AC SUPPLY D

Tabular Column

Volt Ammeter Watt No of Time Recorde True % Error

S. No meter reading meter Blinks taken d energy energy
reading I Amps reading T Sec’s kWh kWh
V Volts W Watts
1 10

2 15

3 20

4 25

5 30

6 35

Model Graphs
Percentage
error

Measured
energy
Formulae Used:
Wattmeter reading * time
True energy = KwH
60*60*1000

No. of Blinks
Recorded Energy = KwH
Energy meter constant

Recorded Energy – True Energy

% Error = * 100
True Energy
Model Calculation:
Photograph of the practical circuit done in the lab
Precautions:
Before closing DPST switch,
1. Auto transformer should be in minimum voltage position.
2. All the loads should be in ‘OFF’ position.

Procedure :
1. Make the connections as shown in figure
2. After closing the DPST switch adjust the auto-transformer to the specified
voltage of the energy meter.
3. Switch ‘ON’ some specific load. Take Ammeter, Voltmeter and wattmeter
readings. Also note down the time taken by energy meter to complete
specified number of blinks using stop clock.. This is repeated for different
load condition.
4. True energy is calculated by multiplying the wattmeter reading and the time.
5. Recorded energy is obtained using energy meter constant and no. of Blinks.
6. Results are tabulated (Refer Table) and a graph between percentage error and
True energy is drawn.

Result :
 Software
Experiments
Ex. No.: 1 Date:
Verification of Kirchhoff’s current law
(KCL)

Aim:
To study and verify the Kirchhoff’s laws for the given Network.

Software /Tool required:

ORCAD / Capture CIS --> Analog Library – R

Source Library – Vdc
Ground (GND) – 0 (zero)

Simulation Settings: Analysis Type – Bias point

Circuit Diagram:

Theory:

Kirchhoff’s Current Law (KCL)

KCL states that at any node (junction) in a circuit the algebraic sum of currents entering and
leaving a node at any instant of time must be equal to zero. Here currents entering (+ve sign)
and currents leaving (-ve sign) the node must be assigned opposite algebraic signs.
Photograph of practical circuit done in the lab

Manual Calculations:
Procedure:
1) Open orCAD Tool and create new project.
2) Draw the circuits (mesh and nodal) using the tools: R analog, VDC source, IDC source,
connecting wire and a ground potential.
3) Enter the values in R, V and I.
4) Go to PSpice and create a new simulation profile.
5) In the simulation settings dialogue box, chose analysis type as Bias Point, enter APPLY
and OK.
6) Now click Run PSpice.
7) Enable bias voltage display and Enable bias current display.
8) Compare the values to the manually calculated values and write the result.

Result:

Manual Calculations Practical output

Ex. No.: 2 Date:
Verification of maximum power transfer theorem

Aim:
To study and verify Maximum Power Transfer Theorem.

Software /Tool required:

ORCAD / Capture CIS --> Analog Library – R

Source Library – Vdc , Idc etc.
Ground (GND) – 0 (zero)

Simulation Settings: Analysis Type – Bias point , DC Sweep

Circuit Diagram:

Theory

Maximum power is developed in a load when the load resistance equals the Thevenin resistance
of the source to which it is connected

All linearly constructed sources can be reduced to their Thevenin equivalent. In DC circuits, the
load can be represented by a resistance RL. The source develops a voltage V L across the load
and enables current IL to flow into it. The power delivered to the load resistance (RL) depends
on the value of RL. Maximum current IL occurs when RL = 0 (shorted terminals). The
maximum voltage VL occurs when RL = ∞ (open circuited terminals). Yet load power PL = 0 for
both cases.

PL is maximum when RL equals the Thevenin equivalent resistance of the source, i.e. when RL =
RTH
Manual Calculation
To find VTH

To find RTH

To find Power across RL

Photograph of practical circuit done in the lab
To find VTH

To find RTH

To find Power across RL

Procedure:
1) Open OrCAD Tool and create new project.
2) Draw the circuits (Vth and Rth ) using the tools: R analog, VDC source, IDC source,
connecting wire and a ground potential.
3) Enter the values in R and V.
4) Go to PSpice and create a new simulation profile.
5) In the simulation settings dialogue box, chose analysis type as Bias Point, enter APPLY and
OK.
6) Now click Run PSpice.
7) Enable bias voltage display and Enable bias current display.
8) Now draw the Thevenin’s equivalent circuit using the tools: R analog, VDC source, ground
potential and connecting wire.
9) After drawing the circuit, go to Part and chose PARAM/SPECIAL.
10) Place it beside the circuit and double click on PARAMETER.
11) In the schematic tab, click on pivot and then click on new property.
12) Now enter name as Rvar and value as 1. Enter APPLY and OK.
13) Go to PSpice and create a new simulation profile.
14) In the simulation settings dialogue box, chose analysis type as DC Sweep, chose sweep
variable as global parameter, enter parameter name as Rvar. Under sweep type, enter start
value =1, end value = 20 and increment = 0.2. Enter APPLY and OK.
15) Chose power dissipation marker and put it on Rvar.
16) Now click Run PSpice.
17) A different window will open up with a graph containing peak value, Rth(x coordinate) and
Pmax (y coordinate).
18) Compare the values to the manually calculated values and write the result.
Graph obtained using PSPICE

Result:
Calculated Value Simulated Value
Ex. No.: 3 Date:
Sinusoidal steady state response of RLC circuit

Aim:
To find the resonance frequency of a RLC circuit using OrCAD tool
Software /Tool required:
ORCAD / Capture CIS --> Analog Library – R, L & C
Source Library – Vac , Ground (GND) – 0 (zero)
Simulation Settings : Analysis Type – AC Sweep
Circuit Diagram:

Theory:

For an RLC circuit,

When XL=XC; Z is minimum.
I= is maximum
The frequency found when XL=XC is called resonance frequency.

Formulae:

Model Graph
Photograph of practical circuit and Graph obtained in Lab
Procedure:-

1) Open orCAD Tool and create new project.

2) Draw the circuits using the tools: R analog, L analog, C analog, VAC/source, connecting wire
and a ground potential.
3) Enter the values in R, L, V and C.
4) Go to PSpice and create a new simulation profile.
5) In the simulation settings dialogue box, chose analysis type as AC Sweep. Under AC sweep
type, enter start frequency=0.1, end frequency=100000 and points/decade=100. Now enter
APPLY and OK.
6) Take the current marker and place at the point between wire and the inductor.
7) Now click Run PSpice
8) A different window with a bell-shaped curve opens up with its peak giving us the resonance
frequency (x coordinate) and resonance current (y coordinate).
9) Compare the values to the manually calculated values and write the result.

Result:-
Ex. No.: 4 Date:
Design of full adder digital circuit

Aim:
To design and verify FULL ADDER digital circuit truth table

Software / Tools Required:

ORCAD / PSpice simulator – AND GATE: 7408
OR GATE: 7432
XOR GATE: 7486
Simulation Settings: Time domain (Transient)
Circuit diagram

Theory:
A full adder is a combinational circuit that forms the arithmetic sum of input; it consists of three
inputs (X,Y and Carry In) and two outputs(Sum and Carry Out). A full adder is useful to add
three bits at a time but a half adder cannot do so. In full adder sum output will be taken from X-
OR Gate, carry output will be taken from OR Gate.

SUM=
 =
=
Carry Out=

Photograph of practical circuit done in Lab

Timing Diagram obtained in Lab

Procedure:
1. Open orCAD and create a new project.
2. Draw the circuits using the parts given in apparatus required, digclock/source and the
connecting wires.
3. In digclock, Enter 1: offtime = ontime =1ms ; 2: offtime = ontime = 2ms ; 3: offtime =
ontime = 4ms
4. Create a new simulation profile in pspice. In simulation settings: chose analysis type as
time domain(transient) and set run to time = 8ms.
5. Click apply and ok.
6. Now take the voltage probe and put it at the input and output end of the circuit.
7. Click run. Note down the graph and the circuit in the manual.

Result:
Ex. No.: 5 Date:
Realization of single-phase rectifier circuit

Aim:
To Design Half wave and Full wave Rectifier Circuit in Pspice simulation.

Software /Tool required:

ORCAD / PSpice simulator -> Diode Library - D1N4002/4007,
Source Library – Vsin & Ground (GND) – 0(zero) Analog Library – R
Simulation Settings: Analysis Type - Time Domain
Run to time: 40ms (for 2 cycles)
Circuit Diagram:
Single phase Half – wave Rectifier

Single phase Full – wave Rectifier

Model Graph:

Photograph of practical circuit and Graph obtained in Lab

Single phase half wave rectifier

Single phase full wave rectifier
Procedure

1. Create the given circuit diagram in new project file using the general procedure.
2. Create New Simulation Profile and select Time Domain (Transient).
3. Give the run time for two cycles, (i.e. 0.04 seconds for 50Hz frequency for two cycles) and
press OK.
4. Select the voltage differential marker and connect across the input voltage source and load
resistor.
5. Run the simulation and observe the input and output signal variation.

Result: