NAND Flash Memory

&
DRAM
2024.10.10
Daehee Kim, SA LAB
MOSFET (NMOS) vs 2D NAND Flash Memory
 Operation – Program
Tox
20 V

ONO Channel

GND 1V FG

CG
Direct Tunneling vs FN Tunneling

Direct Tunneling FN Tunneling

Tox Tox

Channel Channel
FG

FG
 Operation – Erase

0V
CG
Tox

FN Tunneling
FG
GND 0V

Channel

ONO
20 V
 Operation – Read
Tox
5V
ONO
Channel

FG

GND 1V

CG
Real Cell
Two Strings
 Self Boosting

Program bias (VPGM)

Pass bias (VPass)
10 V 10 V 10 V 10 V 20 V 10 V 10 V 10 V
10 V 10 V

GND 1V

GND 0V
Self Boosting (~10V)
 Operation – Erase @ Two Strings

Program bias (VPGM)

0V 0V 0V 0V 0V 0V 0V 0V
0V 0V

GND 0V

20 V

GND 0V
Multi Level Cell (MLC)
# of cells

Erase cells Program cells

1 0
# of cells Vth

Erase cells Program cells

11 01 10 00
Vth
Triple Level Cell (TLC) & Quadruple Level Cell (QLC)
# of cells

Erase cells Program cells

TLC
111 011 101 110 001 010 100 000

# of cells Vth

Erase cells Program cells

QLC
1111
Vth
Interference

Ideal Real
# of cells # of cells

Erase cells Program cells Erase cells Program cells

11 01 10 00 11 01 10 00
Vth Vth
Error bits
Interference
Incremental Step Pulse Program (ISPP)

22 V

12 V
Incremental Step Pulse Program (ISPP)

Before After
# of cells # of cells

Erase cells Program cells Erase cells Program cells

11 01 10 00 11 01 10 00
Vth Vth
Error bits
2D → 3D NAND
3D NAND Flash Memory

2D 3D
3D NAND Flash Memory

Al2O3
SiO2
SiN
SiO2

Tox
CTN (FG)
Box

CG
Operation – Initial

2D 3D

ONO Box
Tox Tox

FG
CG FG Channel CG Channel
Operation – Program

Tox
2D 3D

Channel

Box

FG

Trap

CG
Operation – Erase

2D 3D
CG Tox

FG

Detrap

Channel
Box
Charge Trap

X eee X

e
e
High Aspect Ratio Contact (HARC) Etching
High Aspect Ratio Contact (HARC) Etching
Multiple Stacking
Word Line Contact
Word Line Contact
Stair Free
3D NAND
News
DRAM
DRAM Structure

1 Cell = 1 Tr + 1 Cap

SEM image
DRAM Structure

Transistor

MOSFET gate Buried MOSFET gate

e
DRAM Structure
Capacitor structure
Capacitor
TiN
ZHAHZ
TiN
ZHAHZ
TiN
Operation
Operation – Standby

※ Vcc
- 1.1 V @ DDR5
- 1.2 V @ DDR4
- 1.5 V @ DDR3
- 1.8 V @ DDR2
- 2.5 V @ DDR
Operation – Write

※ Vpp (Pump-up voltage) > Vcc

※ Vcc
- 1.1 V @ DDR5
- 1.2 V @ DDR4
- 1.5 V @ DDR3
- 1.8 V @ DDR2
- 2.5 V @ DDR
Operation – Read

※ Vpp (Pump-up voltage) > Vcc

※ Vcc
- 1.1 V @ DDR5
- 1.2 V @ DDR4
- 1.5 V @ DDR3
- 1.8 V @ DDR2
- 2.5 V @ DDR
Operation – Refresh
Why Refresh?

Junction leakage : S/D ···SNC

Off current : Thin Gox THK
Dielectric leakage : High-k
High-k

Dielectric constant ZrO2 HfO2

Bandgap vs Dielectric constant Monoclinic 18-25 20

Tetragonal 30-40 25
Cubic 30-47 29

Bandgap ZrO2 HfO2

Monoclinic 5.0-5.8 eV 5.3-6.0 eV
Tetragonal 5.5-6.0 eV 5.6-6.2 eV
Cubic 5.8-6.5 eV 6.0-6.4 eV

Work function ZrO2 HfO2

Monoclinic 2.5-4.0 eV 3.6-4.1 eV
Tetragonal 3.5-4.5 eV 4.0-4.6 eV
Cubic 4.0-5.0 eV 4.3-5.1 eV
※ TiN: 4.3-4.8 eV
Capacitor
Capacitor structure

TiN
ZHAHZ
TiN
ZHAHZ
TiN

TE-TiN
BE-TiN
TE-TiN
Capacitor

Low step coverage High step coverage

3D DRAM

Planar DRAM
3D DRAM

WL

WL

BL
3D NAND
Thank you
for your attention

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