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21EXPERIMENT

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21EXPERIMENT

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zdo83247
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EXPERIMENT -2

VERIFICATION OF LOGIC GATES

Aim:To verify the truth tables of AND, OR, NOT, NAND and NOR gates.
Equipments required:
S.NO: COMPONENT SPECIFICATION QUANTITY
1 AND GATE IC7408
2 OR GATE IC7432
3 NOT GATE IC7404
4 NANDGATE IC7400
5. NOR GATE IC 7402
NAND GATE
6. (3 INPUT) IC7410

Procedure for AND gate:


1. Insert the IC 7408 at appropriate position on component development system.
2. Connect pin 14 to 5V and pin 7 to ground.
3. Apply the logic inputs and take the output for different combinations of inputs.
4. Verify the truth table of AND gate.

A
B
Logic Symbol
Pin Diagram: Truth Table:

A B A.B

1
IC 40%
1 0

1 1 1

Procedure for OR gate:


1. Insert the IC 7432 at appropriate position on component development system.
2. Connect pin 14 to SV and pin 7 to ground.
3. Apply the logic inputs and take the output for different combinations of inputs.
4. Verify the truth table of OR gate.
B
Logie Symbol
Pin Diagram: Truth Table

Procedure for NOT gate:


1. Insert the IC 7404 at appropriate position on component development system.
2. Connect pin 14 to 5V and pin 7to ground.
3. Connectpin 2 to LED indicator.
4. Apply the logic inputs and take theoutput for differentcombinations of inputs.
5. Verify the truth table of NOT gate.

A
Logie Symbol

Pin Diagram: Truth Table:

A A

2 4

A
Procedure for NAND gate:
1. Insert the IC 7400 at appropriate position on component development system.
2. Connect pin 14 to 5V and pin 7to ground.
3. Aply the logic inputs and take the output for different combinations of inputs.
Verifythetruth table of NAND gate.
A

B D Logie Symbol
AB-Y

Truth Table:
Pin Diagram:
B (AB)'
A
1

ICA40O 1
1

23 456|

Procedure for NOR gate: development system.


7402 at appropriate position on component
1. Insert the IC 7 to ground.
and pin inputs.
2. Connect pin 14 to 5V output fordifferent combinations of
inputs and take the
3. Apply the logic of NOR gate.
4. Verify the truth table
A+B-4

Logic Symbol
Truth Table:
Pin Diagram:
A B (A+B)
0 1

0
H
TCHD2 1 0

1 1 0

NAND and NOR gates.


Result: Hence verified the truth table of AND, OR, NOT,

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