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11.1.1.2 PLL Introduction

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6 views

11.1.1.2 PLL Introduction

Uploaded by

akifantepli
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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∅

PLL ∅

11.1.1.2
PLL Introduction
What is PLL ? ∅
PLL ∅

• A phase-locked loop or PLL is a control system that generates an


output signal whose phase is related to the phase of an input signal.

• Keeping the input and output phase in lock means keeping the input and output
frequencies the same. (If phase difference varies with time, the frequencies of
two signals are not equal).

• Consequently, in addition to synchronizing signals, a phase-locked loop can track


an input frequency, or it can generate a frequency that is a multiple of the input
frequency.
PLL
Fin Fout

• How to make sure Fin=Fout ?


∅
PLL ∅

• If ∅ −∅ = constant : Then, frequencies are Equal.

Fin

Fout

∅ −∅

∅ −∅ = constant -> Fin= Fout ∅ −∅ ≠ constant -> Fin= Fout


Simple PLL
• In its simplest form, a PLL is a negative feedback loop consisting of a
VCO and a “phase detector” (PD).
Vctrl

Ideal Reference
PD VCO

• PD converts phase difference to voltage which changes the frequency


and phase of VCO and pushes it to follow the ideal reference.
Simple PLL problem
• If the control voltage has ripple it modulates the VCO and produces
side bands
• Assuming only the first harmonic of Vctrl
= cos[ + ( ) ]=

cos − cos + + cos −


2 2

( )

PD VCO
− +
Reminder: FM modulation
• Narrow band FM

( ) VCO = sin( + ( ))

• Input voltage changes the frequency

ℎ =

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