/135

Source:

SiC/GaN 3-Φ PFC Rectifier /

next-gen-
forum.com

PWM Inverter Systems

Johann W. Kolar & Jonas E. Huber
Swiss Federal Institute of Technology (ETH) Zurich
Power Electronic Systems Laboratory
www.pes.ee.ethz.ch
May 24, 2021
 /135

Outline
► Introduction
► 3-Φ PFC Rectifier Systems — Pt. I
► 3-Φ VSD Inverter Systems — Pt. II
► Conclusions M. Antivachis
J. Azurza
D. Bortis
D. Cittante
M. Guacci
M. Haider
F. Krismer
S. Miric
J. Miniböck
N. Nain
P. Niklaus
G. Rohner
F. Vollmaier
Acknowledgement D. Zhang
 /135

Power Electronic Systems @ ETH Zurich

Industry Relations Adv. Mechatronic Systems

R. Coccia Johann W. Kolar D. Bortis

AC-DC AC-AC DC-DC DC-AC Multi-Domain Measurement Advanced Magnetic

Converter Converter Converter Converter Modeling Technology Mechatronics Levitation

J. Huber F. Krismer D. Bortis F. Krismer D. Bortis D. Bortis

J. Schäfer
N. Nain M. Heller P. Czyz I. Bagaric
Y. Li M. Haider P. Bezerra J. Böhler S. Miric P. Niklaus R. Giuffrida R. Bonetti
D. Zhang D. Menzi G. Knabben G. Rohner M. Röthlisberger E. Hubmann

Secretariat Accounting Computer Systems Electronics Laboratory

Y. Schnyder P. Maurantonio M. Eisenstat P. Seitz

18 Ph.D. Students Leading Univ.

1 PostDoc in Europe
3 Research Fellows
 /135

Research Scope

Power Cross-Disciplinary
Electronics
Mechanical Eng., e.g.
Turbomachinery, Robotics
Microsystems
Medical Systems

Actuators /
El. Machines

• Explore the Limits / Create New Concepts / Push the Envelope

• Maximize Technology Utilization
• Enable New Applications
 /135

Introduction
Market Pull
Technology Push
 1 /135

Required Performance Improvements

Environmental Impact… [kgFe /kW]

[kgCu /kW]
[kgAl /kW]
[cm2Si /kW]

►
─ Power Density [kW/dm3]
─ Power per Unit Weight [kW/kg] ►
─ Relative Costs [kW/$]
─ Relative Losses [%]
─ Failure Rate [h-1]

● Mutual Coupling Performance Indices  Multi-Objective Optimization

 2 /135

Comparison to “Moore´s Law”

■ “Moore´s Law” Defines Consecutive Technology Nodes for Min. $$$ per Integr. Circuit (!)
■ Complexity for Min. Comp. $$$ Increases approx. by Factor of ≈2/18 months

Economy of Lower
Scale Yield

>2015: Smaller
Transistors but Not
any more Cheaper

►
Gordon Moore: The
Future of Integrated
Electronics, 1965
(Consideration of Three
Consecutive Technology
Nodes)

● Definition of “η*,ρ*,σ*,fP*–Node” Must Consider Conv. Type / Operating Range etc. (!)
 3 /135

S-Curve of Power Electronics

■ Power Electronics 1.0  Power Electronics 4.0
■ Identify “X-Concepts” / “Moon-Shot” Technologies
■ 10 x Improvement NOT Only 10% !
#1 SiC/GaN Semiconductors
#2 Multi-Cell/Level Concepts
#3 Functional Integration
#4 3D-Packaging/Integration
#5 MLCC & HF Mag. Materials
#6 Digitalization / IIoT 4.0

► Super-Junct. Techn. / WBG

► Digital Power
Modeling & Simulation 3.0

► Power MOSFETs & IGBTs

► Circuit Topologies
Microelectronics
► Modulation Concepts 2.0
Control Concepts
SCRs / Diodes
Solid-State Devices
1.0
■ 2025
1958 2015
 /135

Part I
3-Φ PFC Rectifier Systems
3rd Harmonic Injection
Boost-Type & Buck-Boost Type Topologies
Single-Stage Isolated Rectifiers
 4 /135

Application Areas
■ Electric Vehicle Battery Charging
■ Datacenter Power Supply
■ Renewable Energy Applications

Typ. 200…1000VDC EV Battery

Voltage Range

320…530Vrms MPP Tracking in 60…90% of

Line-to-Line Max. Open Circuit Voltage

● Isolated or Non-Isolated Output

● Wide AC Input / DC Output Voltage Range
● Unidirectional or Bidirectional Power Transfer
 5 /135

3-Φ Diode Bridge Rectifier

■ Conduction States Defined by Line-to-Line Mains Voltages
■ Intervals with Zero Current / LF Harmonics
■ No Output Voltage Control

 Active Mains Current Shaping / Simultaneous Current Flow in All Phases

 6 /135

Integrated Active Filter (IAF) PFC Rectifier

■ 3rd Harmonic Current Injection into Phase with Lowest Voltage
■ Phase Selector AC Switches Operated @ Mains Frequency

 PO= const. Required

 Sinusoidal Mains Current
● Non-Sinusoidal Mains Current  NO (!) DC Voltage Control
 7 /135

IAF Rectifier (1)

■ Low Complexity
■ Low Transistor Current Stress
■ Sinusoidal Mains Current @ Const. Power Load
■ No Output Voltage Control

● T+, T- Could be Replaced by Passive Network

 8 /135

IAF Rectifier (2)

■ Buck-Output Stage  PO= const. & Output Voltage Control
■ Sinusoidal Mains Current

►
● Buck-Stage Could be Replaced by Isolated DC/DC Conv. or Inverter
 9 /135

IAF Rectifier Demonstrator

■ Efficiency η > 99.1% @ 60% Rated Load
■ Mains Current THDI ≈ 2% @ Rated Load
■ Power Density ρ ≈ 4kW/dm3

PO= 8 kW
UN= 400VAC  UO= 400VDC
fS = 27kHz

►
● SiC Power MOSFETs & Diodes
● 2 Interleaved Buck Output Stages
 10 /135

Swiss Rectifier
■ Integration of Injector Switches & Buck Output Stage
■ Controlled Output Voltage
■ Sinusoidal Mains Current
■ iy Def. by KCL: E.g. ia- ic

● Low Complexity
 11 /135

Swiss Rectifier Demonstrator

■ Efficiency η = 99.26% @ 60% Rated Load
■ Mains Current THDI ≈ 0.5% @ Rated Load
■ Power Density ρ ≈ 4 kW/dm3

PO= 8 kW
UN= 400VAC  UO= 400VDC

►
fS = 27kHz

● SiC Power MOSFETs & Diodes

● Integr. CM & Coupled Output Inductors (ICMCI)
 12 /135

Monolithic GaN Bidirectional Switch (M-BDS)

■ Bipolar Voltage Blocking Capability
■ 2 Gates  Controllability of Both Current Directions
■ Factor of 4 Reduction of Chip Area Comp. to Discrete Realization of Same R(on)


Source:

● M-BDS Application for Phase Selector Switches of 3rd Harmonic Inj. PFC Rectifiers
 13 /135

600V GaN Monolithic Bidir. Switch

■ Project — Based on Infineon’s CoolGaN™ HEMT Technology
■ Dual-Gate Device / Controllability of Both Current Directions
■ Bipolar Voltage Blocking Capability | Normally-On or -Off

● Analysis of 4-Quardant Operation of R(on)= 140mΩ Sample @ ± 400V

 14 /135

Vienna Rectifier (1)

■ Active Control of Diode Bridge Conduction State / Input Voltages
■ Bridge Leg Topologies with Different Voltage Stresses / Cond. Losses
■ Phase & Bridge Symmetry !

 Analysis of Input Voltage Formation

 15 /135

Vienna Rectifier (2)

■ Diode Bridge Input Voltage Formation Dependent on Current Direction
■ Min. Output Voltage Defined by Mains Line-to-Line Voltage Amplitude
■ Boost-Type

ia > 0

ia < 0
 Sinusoidal Input Current Shaping
 16 /135

Vienna Rectifier (3)

■ Input Current Impressed by Difference of Mains & Diode Bridge Input Voltage
■ Φ = (-30°,+30°) Limit Due to Current Dependent Voltage Formation

 Time Behavior of PWM Voltages

 17 /135

Vienna Rectifier (4)

■ 3-Level Bridge Leg Characteristic / 9-Level Phase Voltage
■ Low Input Current Ripple / Low Inductance L
■ Switching Frequency CM Output Voltage

 Multi-Loop Control Structure

 18 /135

Vienna Rectifier (5)

■ Output Voltage Control / Inner Mains Current Control
■ Add. Control Loop for DC Midpoint Balancing
■ Redundant Sw. States Utilized for DC Midpoint Balancing

 Multi-Stage Differential-Mode & Common-Mode EMI Filter

 19 /135

Vienna Rectifier (6)

■ CM EMI Filtering Utilizing Internal Cap. Connection to Virtual Star Point
■ No Limit of CM Capacitance by Max. Leakage Current
■ CM Filter Stage(s) on DC-Side as Alternative

33% 33% 33%

● Number of Filter Stages Dependent on Sw. Frequency

 20 /135

Vienna Rectifier (7)

■ Highly-Compact Demonstrator System
■ CoolMOS & SiC Diodes
■ Coldplate Cooling

PO= 10 kW
UN= 400VAC±10%
fN = 50Hz or 360…800Hz
UO= 800VDC

η = 96.8%

ρ =10 kW/dm3

● THDi = 1.6% @ fN = 800Hz (fP= 250kHz)

 21 /135

Vienna Rectifier (8)

■ Highly-Compact Demonstrator System
■ CoolMOS & SiC Diodes
■ Coldplate Cooling

PO= 10 kW
UN= 400VAC±10%
fN = 50Hz or 360…800Hz
UO= 800VDC

η = 96.8% 10A/Div
ρ =10 kW/dm3 200V/Div
fP= 250kHz 0.5ms/Div

● THDi = 1.6% @ fN = 800Hz

● System Allows 2-Φ Operation
 22 /135

Vienna Rectifier (9)

■ Dependency of Power Density on Sw. Frequency fP
■ CoolMOS & SiC Diodes
■ Coldplate Cooling

PO = 10 kW
UN= 230VAC±10%
fN = 50Hz or 360…800Hz
UO= 800VDC

● Factor 10 in fP  Factor 2 in Power Density

● Systems with fP= 72/250/500/1000kHz
 23 /135

Application of GaN M-BDS (1)

■ Vienna Rectifier
■ 600V GaN M-BDSs @ Upn= 800V, R(on)=140mΩ
■ Continuous Current Mode, L=33uH, fsw=620kHz
■ 1200V SiC Diodes

● Max. Power Density of 25kW/dm3 (w/o Full EMI Filter) @ 98.4% Efficiency
 24 /135

Application of GaN M-BDS (2)

■ Δ-Switch Rectifier
■ 600V M-BDSs for 115V / 360…800Hz Aircraft Applications
■ Low Conduction Losses / No DC-Link Midpoint Required
ULL = 115 V@400Hz
Uo = 400 V
THDI= 2.3%

● Always Only 2 Switches are Operated

● Phase Current Controller Outputs Transformed into Δ-Quantities
 /135

Comparative Evaluation
3L-Topology vs. 2L-Topology
 25 /135

Comparative Evaluation (1)

■ Comparison to Standard 2-Level PWM Rectifier
■ 9 vs. 5 Volt. Levels & Factor 2…3 Lower Sw. Losses  Factor 4…6 (!) Lower L

■ Vienna Rectifier ■ Standard PWM Rectifier

 26 /135

Comparative Evaluation (2)

■ Comparison to Standard 2-Level PWM Rectifier
■ 9 vs. 5 Volt. Levels & Factor 2..3 Lower Sw. Losses  12 kW/dm3 vs. 8 kW/dm3 @ 22kW

■ Vienna Rectifier ■ Standard PWM Rectifier

 27 /135

Vienna Rectifier - Conceptual Limits

■ Boost-Type
■ No Isolation
■ Unidirectional (in Basic Form)

 Buck-Boost & Buck-Type Topologies / Isolated Systems

 /135

Buck+Boost-Type
Y-Rectifier
 28 /135

Buck+Boost PFC Y–Rectifier

■ Switching Stage of 2-Level PFC Rectifier  3 DC/DC Boost-Converters w/ Ref. to Neg. DC-Link Rail
■ Insert Front-End Buck-Stage / Phase  Buck+Boost Operation

! 

● Bidirectional & Wide Input / Output Voltage Range

 29 /135

Y–Rectifier
■ Rectifier Operation w/ Input Filter Inductor Used as Buck-Boost Inductor
■ Alternative Inverter Operation with Continuous Output Voltage (!)
■ All-GaN Demonstrator

● Bidirectional & Wide Input / Output Voltage Range

 30 /135

Y–Rectifier vs. 3-Φ Cuk-Type Rectifier

■ 3 Main Inductive Components ■ 6 Main Inductive Components
■ 12 Power Transistors Blocking Uin OR Uout ■ 6 Power Transistors Blocking Uin+Uout
■ Discontinuous Input & Output Current ■ Continuous Input & Output Current

Source: N. Kumar
S. Mazumder
A. Gupta
2018
● Bidirectional & Wide Input / Output Voltage Range
 31 /135

3-Φ I-DC-Link Buck-Boost Rectifier

■ Combination of Y-Rectifier Boost-Stages
■ Main Power Circuit w/ Single Inductor
■ Input-Side AC-Switches

● Low Complexity Realization w/ Monolithic Bidirectional Switches

 /135

Isolated 3-Φ PFC Rectifier Systems

Synergetic Control
Matrix-Type Isolated Topology

Source: Porsche
Mission-E Project
 32 /135

Selected EV-Charger Topology

■ Isolated Controlled Output Voltage
■ Buck-Boost Functionality & Sinusoidal Input Current
■ Applicability of 600V GaN Semiconductor Technology
■ High Power Density / Low Costs

Source: SIEMENS

 Conventional / Independent OR “Synergetic Control” of Input & Output Stage

 33 /135

Conventional Control
■ Decoupled Control of AC/DC & DC/DC-Stage
■ Constant DC-Link Voltage (Equally Splitted)
■ Cont. Sw. of All AC/DC Phases  3/3 PWM

 Control Capability & Control DOFs NOT Fully Utilized (!)

 34 /135

3-Φ Unfolder Rectifier Stage

■ 100Hz/120Hz Sw. of AC/DC-Stage Switches
■ Only Conduction Losses of AC/DC-Stage
■ All Current & Voltage Control by DC/DC-Stage
■ 600V Semiconductors CANNOT Be Used (!)

 Remark: Inductors Could be Omitted (!)  No Boost Capability

 35 /135

“Synergetic” Control
■ Only Phase with Lowest Current Switched
■ Control of 2 Phase Currents by DC/DC-Stage
■ Low Stresses on Power Switches
■ 600V GaN Semiconductors Can be Used (!)

 Boost Capability Maintained (Transition to 3/3-PWM)

 36 /135

Conventional vs. “Synergetic” Control

■ 1/3-Modulation  Significant Red. of Losses of the Power Switches Comp. to 3/3-PWM
■ Conduction Losses ≈ -80%
■ Switching Losses ≈ -70%

 Operating Point Dependent Selection of 1/3-PWM OR 3/3-PWM for Min. Overall Losses
 /135

“Synergetic” Cascaded
Control Structure
 37 /135

“Synergetic” Control Structure

■ Cascaded Control of Output & Input Current (Direct & Through DC-Link Voltage)
■ Active Equal DC-Link Voltage Splitting

►
 Same Control Structure for 3/3-PWM (Full-Boost Mode) Using Diff. Ref. Values
 38 /135

AC/DC-Stage Transition to Full-Boost Operation

■ Different Operating Regimes  Synergetic Partial-Boost Full-Boost

 Intermediate 2/3-Operation for Limiting DC-Link Center Point Current (Low DC-Cap.)
 /135

Isolated Single-Stage
Matrix-Type Rectifier
Vienna-Rectifier II, III
 39 /135

Isolated Matrix-Type PFC Rectifier (1)

■ Based on Dual Active Bridge (DAB) Concept
■ Opt. Modulation (t1…t4) for Min. Transformer RMS Curr. & ZVS or ZCS
■ Allows Buck-Boost Operation

● Equivalent Circuit ● Transformer Voltages / Currents

 40 /135

Isolated Matrix-Type PFC Rectifier (2)

■ Efficiency η = 98.9% @ 60% Rated Load (ZVS)
■ Mains Current THDI ≈ 4% @ Rated Load
■ Power Density ρ ≈ 4kW/dm3

►
PO= 8 kW
UN= 400VAC  UO= 400VDC
fS = 36kHz

10A/div
200V/div

● 900V / 10mΩ SiC Power MOSFETs

● Opt. Modulation Based on 3D Look-Up Table
 41 /135

Application of M-BDS
■ Matrix-Type Bidirectional DAB-Based Topology
■ Unidir. Vienna Rectifier II (Boost-Type)
■ Unidir. Vienna Rectifier III (Buck-Type)

● Integration  Lower Complexity BUT Limited Controllability

 /135

Part II
3-Φ Variable Speed Drive Inverter Systems
Full-Sinewave Filtering
Multi-Level Inverter Concepts
Buck-Boost Inverter
Current DC-Link Inverter
 42 /135

Variable Speed Drive (VSD) Systems

■ Industry Automation / Robotics
■ Material Machining / Processing – Drilling, Milling, etc.
■ Compressors / Pumps / Fans
■ Transportation
■ etc., etc. …. Everywhere !
Source:

● 60…70 % of All Electric Energy Used in Industry Consumed by VSDs

 43 /135

Variable Speed Drive Inverter Concepts

■ DC-Link Based OR Matrix-Type AC/AC Converters
■ Battery OR Fuel-Cell Supply OR Common DC-Bus Concepts

Source:

Source:

● 45% of World’s Electricity Used to Power Motors in Buildings & Industrial Applications
 44 /135

State-of-the-Art Drive System

■ Standard 2-Level Inverter — Large Motor Inductance / Low Sw. Frequency
■ Shielded Motor Cables / Limited Cable Length / Insulated Bearings / Acoustic Noise

Source:

● Line-to-Line Voltage | CM Leakage Current | Motor Surge Voltage | Bearing Current

 45 /135

Surge Voltage Reflections

■ Long Motor Cable lc ≥ ½ tr v
■ Short Rise Time of Inverter Output Voltage
■ Impedance Mismatch of Cable & Motor  Reflect. @ Motor Terminals / High Insul. Stress

SiC Source: Bakran / ECPE 2019


 dv/dt- OR Full-Sinewave Filtering / Termination & Matching Networks etc.
 46 /135

Motor Bearing Currents

■ Switching Frequency CM Inverter Output Voltage  Motor Shaft Voltage
■ Electrical Discharge in the Bearing (“EDM”)

Source: www.est-aegis.com
Source:
Switchcraft

Source:
BOSCH

 Cond. Grease / Ceram. Bearings / Shaft Grndg Brushes / dv/dt- OR Full-Sinewave Filters
 47 /135

VSD Inverter - Future Requirements

■ “Non-Expert” Installation / “Sinus-Inverter” OR Motor-Integrated Inverter
■ Low Losses & Low HF Motor Losses
■ Low Volume & Weight
■ Wide Output Voltage Range
■ High Output Frequencies (High Speed Motors)
Source:

● Main “Enablers”  SiC/GaN Power Semiconductors & Adv. Inverter Topologies

 /135

SiC vs. Si
 48 /135

Si vs. SiC
■ Si-IGBT / Diode  Const. On-State Voltage, Turn-Off Tail Current & Diode Reverse Recovery Current
■ SiC-MOSFET  Loss Reduction @ Part Load BUT Higher Rth

6x Si-IGBT 6x SiC-MOSFET
6x Si-Diode

Source:
ATZ elektronik

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Infineon Source: Cree

● Space Saving of >30% on Module Level (!)

 49 /135

Low RDS(on) High-Voltage Devices

■ Higher Critical E-Field of SiC  Thinner Drift Layer
■ Higher Maximum Junction Temperature Tj,max

For 1kV:




● Massive Reduction of Relative On-Resistance  High Blocking Voltage Unipolar Devices

 50 /135

Si vs. SiC Conduction Behavior (1)

■ Si-IGBT  Const. On-State Voltage Drop / Rel. Low Switching Speed,
■ SiC-MOSFETs  Resistive On-State Behavior / Factor 10 Higher Sw. Speed

Source: Fuji Electric

Forward Reverse

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Infineon Source: Cree

● SiC MOSFETS Facilitate Higher Part Load Efficiency

 51 /135

Si vs. SiC Conduction Behavior (2)

■ Si-IGBT  Const. On-State Voltage Drop / Rel. Low Switching Speed,
■ SiC-MOSFETs  Resistive On-State Behavior / Factor 10 Higher Sw. Speed

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Infineon Source: Cree

● Efficiency Characteristic Considering Only Conduction Losses

 52 /135

Si vs. SiC Switching Behavior

■ Si-IGBT  Const. On-State Voltage Drop / Rel. Low Switching Speed,
■ SiC-MOSFETs  Resistive On-State Behavior / Factor 10 Higher Sw. Speed

Source: Fuji Electric

1200V 100A 1200V 100A

Die Size: 98.8mm2 + 39.4mm2 Die Size: 25.6mm2
Source: Infineon Source: Cree

● Extremely High di/dt & dv/dt  Challenges in Packaging / EMI / Motor Insulation / Bearing Currents
 /135

Challenges
 53 /135

Circuit Parasitics

■ Extremely High di/dt
■ Commutation Loop Inductance LS 
■ Allowed Ls Directly Related to Switching Time ts   

Parallel
Connection


● Advanced Packaging & Parallel Interleaving for Partitioning of Large Currents (Z-Matching)
 54 /135

Si vs. SiC EMI Emissions

■ Higher dv/dt  Factor 10
■ Higher Switching Frequencies  Factor 10
■ EMI Envelope Shifted to Higher Frequencies

fS= 10kHz & 5 kV/us for (Si IGBT)

fS= 100kHz & 50 kV/us for (SiC MOSFET) Si
SiC
VDC = 800V
DC/DC @ D= 50%

● Higher Influence of Filter Component Parasitics & Couplings  Advanced Design

 /135

Inverter Output Filters

dv/dt-Filters
Full-Sinewave Filters
 /135

dv/dt-Control
 55 /135

Passive | Hybrid | Active dv/dt-Limitation

■ Passive – Damped LC-Filter fC > fS
■ Hybrid – Undamped LC-Filter & Multi-Step Sw. Transition
■ Active – Gate-Drive Based Shaping of Sw. Transients
fsw = 16kHz
tR= tF= 130ns
fC = 2.4 MHz
!

● Connection to DC-Minus & CM Inductor  Limit CM Curr. Spikes / EMI / Bearing Currents
 56 /135

Comparison of dv/dt-Filtering Techniques (1)

■ Passive Concept ■ Hybrid Concept (3fS) ■ Active Concept
1. LCR-Filter 1. LC-Filter 1. Miller Capacitor
2. Clamped LC-Filter 2. Multi-Step Switching 2. Gate Curr. Control

■ Output Voltage Waveforms — VDC = 800V, Pout = 10kW, 6kV/us 1200V SiC / 16mΩ
CM = 120pF

L = 3.8uH L = 4.1uH
C = 2.7nF C = 1.3nF
R = 19Ω
 57 /135

Comparison of dv/dt-Filtering Techniques (2)

● Comparative Evaluation of
Passive & Active Concept

■ Losses / Power Density – VDC = 800V, Pout = 10kW, fsw = 16kHz, 1200V SiC-MOSFETs (16mΩ)
 58 /135

Multi-Bridge-Leg dv/dt-Control
■ Staggered Sw. Parallel Bridge-Legs  Non-Resonant Multi-Step Transistion
Source: J. Ertl et al.
PCIM Europe 2017

■ 2-Step Switching / Resonant Transition (cf. Active dv/dt-Filter)

Source: J. Ertl et al.

PCIM Europe 2018

● Adv. for High Power / Output Curr. Syst. Employing Parallel Bridge-Legs & Local Comm. Cap.
 /135

Inverter Systems w/
Sinusoidal Output Voltages
 59 /135

Output Voltage Filtering

■ Measures Ensuring EMI Compliance / Longevity of Motor Insulation & Bearings
■ Motor Reactor | dv/dt Filters | DM-Sinus Filters | Full-Sinus Filters | Multi-Level Inverters

Source:

Source:


● Small Filter Size 
High Sw. Frequ.  SiC|GaN
 /135

Inverter CM & DM Output

Voltage Components
 60 /135

Equivalent Circuit (1)

■ Active DM Voltage Component

■ Inactive CM Zero Sequence Voltage
■ Low-Frequ. & Sw.-Frequ. Components
 61 /135

Equivalent Circuit (2)

 62 /135

Equivalent Circuit (3)

■ Active Sw.-Frequ. DM Voltage
■ Inactive Sw.-Frequ. CM Voltage

n
 63 /135

Differential- / Common-Mode Filtering

■ DM & CM Equivalent Circuit

■ Filter Inductor Types

● DM Inductor / CM Inductor / Phase Inductors

 64 /135

Full-Sinewave Filter & ZVS Operation

■ Sinusoidal Output Voltage
■ ZVS of Inverter Bridge-Legs
■ High Sw. Frequency & TCM  Low Filter Inductor Volume

● Only 33% Increase of Transistor Conduction Losses Compared to CCM (!)

● Very Wide Switching Frequency Variation
 65 /135

Frequency-Bounded TCM  B-TCM

■ Very Wide Switching Frequency Variation of TCM  B-TCM

● TCM  B-TCM — 10% Further Increase of Transistor Conduction Losses

 66 /135

Frequency-Bounded B-TCM  S-TCM

■ Sinusoidal Switching Boundaries  S-TCM
■ Adaption for Low Output Power Considering fsw,max= 140kHz

● TCM  S-TCM ≈ 10% Further Increase of Transistor Conduction Losses

 67 /135

Residual ZVS Losses

■ Overlap of uDS & Channel Current ich @ High Isw > Ik
■ Temporary Turn-on Due to uGS,i > uth
650V SiC, UDC = 400V

● “Kink” Current IK Dependent on Inner & Outer Gate Resistance & ug,n
 68 /135

Influence of Motor Cable Capacitance

■ Cable Capacitance of Several 100pF/m (!)
■ Large Charging / Discharging Current Peaks @ Sw. Transitions
■ Increase of Turn-On / Decrease of Turn-Off Losses
■ Analysis for IGBTs shows 30% Overall Increase of Sw. Losses (50m Cable)
LCable=10m

Source: A. Lindemann et al.

PCIM 2016.

 Output Inductor for Decoupling OR Full-Sinewave Output Filter Source: AN17-002

 69 /135

Full-Sinewave 2-Stage Output Filter & CCM (1)

■ Sinewave Output & IEC/EN 55011 Class-A
■ Low-Loss Active Damping of 1st Filter Stage — Neg. Cap. Current Feedback
■ 2kW / 400V DC-Link 3-Φ 650V GaN Inverter (IM=5A), fout,max = 500Hz
■ Sw. Frequency fS= 100kHz
H. Ertl et al.
(2018)

fC,1=7kHz

fC,2=20kHz

 Evaluation of Optimized Inductors — Soft Sat. Toroidal Iron Powder Cores

 L1=200uH (OD57S) / C1=2.5uF / L2=25uH (OD20S) / C2=2.5uF / Ld=33uH / Rd=5.6Ω
 70 /135

Full-Sinewave 2-Stage Output Filter & CCM (2)

■ Exp. Verification — 650V E-Mode GaN Systems Transistors (50mΩ)
■ Sw. Frequency fS= 100kHz, Efficiency ≈98%
■ 200mm x 250mm

iC Measurement


● Stationary Motor Phase Curr. /Voltage @ 2.5Nm & fout=250Hz

● Speed Increase from Standstill to n = 3000rpm in 60ms
 71 /135

Full-Sinewave 2-Stage Output Filter & CCM (3)

■ Modification of Output Filter Structure
■ Elimination of Direct Cap. Coupling Between Output and Noisy (!) DC+ (Due to RDC)
■ For Opt. iC -Feedback C1 Realized Using ≈Linear Kemet KC-Link

symmetric

modified

! Symmetric Filter
Modified Filter

● Modified Filter  Compliance to EMI Standard EN55011 Class-A

 72 /135

GaN vs. IGBT Inverter Efficiency Comparison

■ Si Easypack 1200V/35A vs. GaN 650V/30A (50mΩ)
■ 5…20kHz Standard PWM IGBT Motor Inverter (B&R Industrial Automation)
■ Efficiency Measurement Considering Load Machine AC Output & Inverter DC Input

● Efficiency Improvement of 2-4% in Whole Operating Range

● Low Sw. Losses of GaN Inverter & Low Output Filter Losses & Low Motor Iron Losses
 73 /135

3-Φ 650V GaN Inverter System (1) Source:

■ Transphorm 650V Normally-On GaN HEMT/30V Si-MOSFET Cascode 6-in-1 Power Module
■ Sinewave LC Output Filter — Corner Frequency fC= 34kHz (fS= 100kHz)
■ No Freewheeling Diodes

600V/14A

 Very Low Filter Volume Compared to Si-IGBT Drive Systems (fC= 0.8kHz @ fS ≈ 3kHz)
 74 /135

3-Φ 650V GaN Inverter System (2) Source:

■ Comparison of GaN Inverter with LC-Filter to Si-IGBT System (No Filter, fS=15kHz)
■ Measurement of Inverter Stage & Overall Drive Losses @ 60Hz

98% 

80% 

 2% Higher Efficiency of GaN System Despite LC-Filter (Saving in Motor Losses) !

 /135

Multi-Level / Multi-Cell
Converters & Modularity
 75 /135

3-Level T-Type Inverter (1)

■ Higher Number of Output Voltage Levels / Lower CM Voltage Steps
■ Neutral Point Clamped | Flying Capacitor | T-Type Bridge-Leg Topologies

Line-to-Line Voltage

2-Level Bridge-Leg 3-Level Bridge-Leg

● Complicated Bridge-Leg Structure

● On-State-Losses of Series-Connected Switches
 76 /135

3-Level T-Type Inverter (2)

■ Utilization of 600V Monolithic Bidirectional GaN Switches
■ 2-Gate Structure Provides Full Controllability

Source:

● Factor 4 (!) Reduction of Chip Area vs. Discrete Realization @ Same R(on)
 77 /135

3-Level T-Type Inverter (3)

■ Utilization of 600V Monolithic Bidirectional GaN Switches
■ 2-Gate Structure Provides Full Controllability

! Source:

● Factor 4 (!) Reduction of Chip Area vs. Discrete Realization @ Same R(on)
 78 /135

Flying Cap. (FC) 3-Level Converter

■ 3-Level Flying Cap. (FC) Converter  No Connection to DC-Midpoint
■ Involves All Switches in Voltage Generation  Eff. Doubles Device Sw. Frequency

● FC Voltage Balancing Possible also for DC Output

 79 /135

Scaling of Flying Cap. Multi-Level Concepts

■ Series Interleaving  Reduced Ripple
■ fsw,eff = Nꞏfsw @ fsw-Determined (!) Switching Losses
■ Lower Overall On-Resistance @ Given Blocking Voltage
■ Application of LV Technology to HV

fsw

Nꞏfsw    



 ! !
fsw Nꞏfsw
● Scalability / Manufacturability / Standardization / Redundancy
 80 /135

SiC/GaN Figure-of-Merit
■ Figure-of-Merit (FOM) Quantifies Conduction & Switching Properties
■ FOM Identifies Max. Achievable Efficiency @ Given Sw. Frequ.

1
FOM 
Rds,on Qoss

● Advantage of LV over HV Power Semiconductors

● Advantage of Multi-Level over 2-Level Converter Topologies
 81 /135

X-FOM of ML-Bridge-Legs
■ Quantifies Bridge-Leg Performance of N-Level FC Converters
■ Identifies Max. Achievable Efficiency & Loss Opt. Chip Area @ Given Sw. Frequ.

N= # of Levels -1

     
 

● Compared to 2-Level Benchmark  Psemi,min,ML ≈ 1/N1.2 Psemi,min,2L

@ Same Filter Ind. Volt-Seconds Achip,ML ≈ N1.2Achip,2L
 82 /135

7-Level Flying Cap. 200V GaN Inverter (1)

■ DC-Link Voltage 800V
■ Rated Power 2.2 kW / Phase
■ 99% Efficiency  Natural Convection Cooling (!)

260 W/in3

● High Effective Sw. Frequency (6 x 30kHz = 180kHz)  Small Filter Inductor LO

 83 /135

7-Level Flying Cap. 200V GaN Inverter (2)

■ DC-Link Voltage 800V
■ Rated Power 2.2 kW / Phase
■ 99% Efficiency  Natural Convection Cooling (!)

260 W/in3

● High Effective Sw. Frequency (6 x 30kHz = 180kHz)  Small Filter Inductor LO

 84 /135

3-Φ Hybrid Multi-Level Inverter Demonstrator

■ Realization of a 99%++ Efficient 10kW 3-Φ 400Vrms,ll Inverter System
■ 7-Level Hybrid Active NPC Topology / LV Si-Technology

99.35%
2.6kW/kg
56 W/in3

● 200V Si  200V GaN Technology Results in 99.5% Efficiency

 /135

Quasi-2L/3L
Flying Capacitor Inverter
 85 /135

Quasi-2L & Quasi-3L Inverters (1)

■ Operation of N-Level Topology in 2-Level or 3-Level Mode
■ Intermediate Voltage Levels Only Used During Sw. Transients
■ Applicability to All Types of Multi-Level Converters

- Schweizer (2017)

Q2L Q3L

● Reduced Average dv/dt  Lower EMI / Lower Reflection Overvoltages

● Clear Partitioning of Overall Blocking Voltage & Small Flying Capacitors
● Low Voltage/Low RDS(on)/Low $ MOSFETs  High Efficiency / No Heatsinks / SMD Packages
 86 /135

Quasi-2L & Quasi-3L Inverters (2)

■ Operation of 5L Bridge-Leg Topology in Quasi-3L Mode
■ Intermediate Voltage Levels Only Used During Sw. Transients
■ Applicability to All Types of Multi-Level Converters
3.3kW @ 230Vrms /50Hz
- Schweizer (2017) Equiv. fS= 48kHz
3.5kW/dm3
Eff. ≈ 99%

EMI Filter

● Reduced Average dv/dt  Lower EMI / Lower Reflection Overvoltages

● Clear Partitioning of Overall Blocking Voltage & Small Flying Capacitors
● Low Voltage/Low RDS(on)/Low $ MOSFETs  High Efficiency / No Heatsinks / SMD Packages
 87 /135

Quasi-2L & Quasi-3L Inverters (3) - Schweizer (2017)

■ Operation of 5L Bridge-Leg Topology in Quasi-3L Mode

■ Intermediate Voltage Levels Only Used During Sw. Transients
■ Applicability to All Types of Multi-Level Converters

Operation @ 3.2kW

— Conv. Output Voltage — Output Current

— Sw. Stage Output Voltage — Conv. Side Current
— Flying Cap. (FC) Voltage
— Q-FC Voltage (Uncntrl.)

● Reduced Average dv/dt  Lower EMI / Lower Reflection Overvoltages

● Clear Partitioning of Overall Blocking Voltage & Small Flying Capacitors
● Low Voltage/Low RDS(on)/Low $ MOSFETs  High Efficiency / No Heatsinks / SMD Packages
 /135

Ultra-Compact
Power Module with
Integrated Filter
650V GaN E-HEMT Technology
fS,eff= 4.8MHz
fout = 100kHz
 88 /135

Integrated Filter GaN Half-Bridge Module

■ Minimization of Filter Volume by Series & Parallel Interleaving & Extreme Sw. Frequency
■ Handling of DC Output Requires Flying Capacitor Approach for Series Interleaving

fS,eff= (M-1) ∙ fS

M=5

fS,eff= N ∙ fS

N=4

 Target: Best Combination of Multiple Levels (M) & Parallel Branches (N)
 89 /135

4.8MHz GaN Half-Bridge Phase Module

■ Combination of Series & Parallel Interleaving
— 600V GaN Power Semiconductors, fsw= 800kHz
— Volume of ≈180cm3 (incl. Control etc.)
— H2O Cooling Through Baseplate
820 W/in3

● Operation @ fout=100kHz / fS,eff= 4.8MHz, 10kW, Udc=800V

 90 /135

High-BW High-CMRR Current Measurement

■ Extension of Commercial Hall Sensor DC … fHall≈ 500kHz  DC … 10MHz
■ Low-Pass & High-Pass Filter Network Combining HF-Sensor & LF Hall-Sensor

● Hall Sensor Bandwidth fHall = 1.4MHz

● Sense Wdg. Integrator Corner Frequency fint=350 Hz
● Low/High-Pass Filter Cross-Over Network ffilter = 15 kHz
 /135

Motor-Integrated
Inverter Systems
 91 /135

Stacked-Multi-Cell (SMC) Inverter

■ Fault-Tolerant VSD
■ Low-Voltage Inverter Modules
■ Very-High Efficiency / Power Density
■ Automated Manufacturing

■ Rated Power 45kW / fout = 2kHz

■ DC-Link Voltage 1 kV

● Smart Motor / Plug & Play | Connected / Intelligent VSD 4.0

 92 /135

Motor-Integrated SMC-Inverter
■ Rated Power 9kW @ 3700rpm
■ DC-Link Voltage 650V…720V
■ 3-Φ Power Cells 5+1
■ Outer Diameter 220mm

— Axial Stator Mount

— 200V GaN e-FETs
— Low-Capacitance DC-Links
— 45mm x 58mm / Cell

● Main Challenge — Thermal Coupling/Decoupling of Motor & Inverter

 93 /135

Double-Bridge (DB)-Inverter Advantages

■ Unfolder  Factor 2 Lower DC-Link Voltage
■ Lower Transistor Voltage Stress / Lower Switching Losses
■ Conventional Inverter Bridge-Leg Processes 2x Instantaneous Peak Power

1
2U

● Access to All Wdg. Terminals — No Problem for Inverter/Motor Integration

 94 /135

Compressor-Integrated DB-GaN-Inverter
■ E-Mobility 5…15kW Fuel Cell Pressurized Air Supply
■ 1kW Rated Power, fsw=300kHz | n= 280‘000rpm / fout= 4.6kHz
■ Low EMI / Low Cabling Effort

Power Control electronics – Control Battery start

Cooling water
electronics power electronics electronics switch (not
channels Power connection Battery start visible)
semiconductors diode
Compressor
outlet Power electronics -
electronical connector
Motor
connection
stator

Thrust
bearing

Electrical
connector

Compressor
inlet
Output Motor - power
filter electronics
Impeller Rotor connection
Cooling water inlet
Journal gas bearing Cooling water outlet

● Integration  2x System Power Density | 97%  98.5% Inverter Efficiency

 95 /135

DB-Inverter Comparative Evaluation

■ Comparison to Conv.
2-Level Inverter + Front-End Ub = 40V…120V
DC/DC Boost-Stage P = 1.0kW
fs = 300kHz (200V EPC GaN)
fo = 5kHz

210 W/in3

1
2U

● Advantages — Lower Sw. Losses & Lower # of Filter Inductors 98 W/in3

 96 /135

Multi-Axis Drive Systems

■ Common DC-Bus — Single AC/DC Converter / Smaller Cabinet
■ Motor Integration of DC/AC Stage — Massive Saving in Cabling Effort / Simplified Installation

DC Power
Network

Source:

Cabinet

Inverter
Stage

● Facilitates DC-Bus Energy Buffer

● Direct Energy Exchange @ DC-Bus / Higher Efficiency / Unidir. Front-End
 /135

Overload | Thermal Limit

 97 /135

GaN Overload Capability

■ Highly Dynamic Robotics VSDs  3x … 5x Rated Torque for Seconds
■ Smaller GaN Chip Area  Lower Thermal Time Constant
■ Packaging Essentially Defines GaN Usability (!)

Cu-Plate

● 200V GaN vs. Si (Multi-Level Inverter) Comparison

 /135

Buck-Boost
Y-Inverter
 98 /135

Motivation
■ General / Wide Applicability
— Adaption to Load-Dependent Battery | Fuel Cell Supply Voltage
— VSDs  Wide Output Voltage / Speed Range

● No Additional Converter for Voltage Adaption  Single-Stage Energy Conversion

 99 /135

“Outside-the-Box” Topologies
■ Z-Source Inverter  Shoot-Through States Utilized for Boost Function
■ Higher Component Stress Eff. Limits Boost Operation to ≈120% Uin

Source: F.Z. Peng / 2003

J. Rabkowski / 2007

■ 3-Φ Back-End DC/AC Cuk-Converter

Source: T.A. Lipo

et al. /2002 &
K.D.T Ngo / 1984

● Integration Typ. Results in Higher Comp. Stresses & Complexity / Lower Performance
 100 /135

Boost Converter DC-Link Voltage Adaption

■ Inverter-Integr. DC/DC Boost Conv.  Higher DC-Link Voltage / Lower Motor Current
■ Access to Motor Star-Point & Specific Motor Design Required
■ No Add. Components

Source: J. Pforr et al. / 2009

■ Explicit Front-End DC/DC Boost-Stage

Source: www.rick-gerber.com Source: R.W. Erickson et al. / 1986

 Coupling of the Control of Both Converter Stages  “Synergetic Control”

 101 /135

Buck-Boost Y–Inverter
■ Generation of AC-Voltages Using Unipolar Bridge-Legs

“Y-Inverter”

● Switch-Mode Operation of Buck OR Boost Stage  Single-Stage Energy Conversion (!)

● 3-Φ Continuous Sinusoidal Output / Low EMI  No Shielded Cables / No Motor Insul. Stress
 102 /135

Sinusoidal Modulation
■ Y-Inverter

■ Motor Phase Voltages

● Const. DC Offset  Strictly Positive Output Voltages uaN, ubN, ucN

● Mutually Exclusive Operation of the Half-Bridges  Low Switching Losses
 103 /135

Boost-Operation uan > Ui

■ Phase-Module

■ Motor Phase Voltages

● Current-Source-Type Operation
● Clamping of Buck-Bridge High-Side Switch  Quasi Single-Stage Energy Conversion
 104 /135

Buck-Operation uan < Ui

■ Phase-Module

■ Motor Phase Voltages

● Voltage-Source-Type Operation
● Clamping of Boost-Bridge High-Side Switch  Quasi Single-Stage Energy Conversion
 105 /135

Discontinuous Modulation
■ Y-Inverter

■ Motor Phase Voltages

● Clamping of Each Phase for 1/3 of the Fund. Period  Low Switching Losses (!)
● Non-Sinusoidal Module Output Voltages / Sinusoidal Line-to-Line Voltages
 106 /135

Control Structure
● Motor Speed Control

■ Cascaded Current / Voltage / Current Control Loops

■ Seamless Transition between Boost- & Buck-Mode  “Democratic” Control
 107 /135

Y–Inverter VSD
■ Demonstrator Specifications

● Wide DC Input Voltage Range  400…750VDC

● Max. Input Current  ± 15A

● Max. Output Power  6…11 kW

● Output Frequency Range  0…500Hz
● Output Voltage Ripple  3.2V Peak @ Output of Add. LC-Filter
 108 /135

Y–Inverter Demonstrator
● DC Voltage Range 400…750VDC
● Max. Input Current ± 15A
● Output Voltage 0…230Vrms (Phase)
● Output Frequency 0…500Hz
● Sw. Frequency 100kHz
● 3x SiC (75mΩ)/1200V per Switch
● IMS Carrying Buck/Boost-Stage Transistors & Comm. Caps & 2nd Filter Ind.
Control
Output Filter 3Φ Output Board DC Input
Inductors
245 W/in3

Main
Inductors

■ Dimensions  160 x 110 x 42 mm3

 109 /135

Y–Inverter - Measurement Results

■ Stationary Operation
UDC= 400V
UAC= 400Vrms (Motor Line-to-Line Voltage)
fO = 50Hz
fS = 100kHz / Discontinuous PWM
P = 6.5kW 100V/div 200V/div
10A/div 1V/div
uab
uS,a
uDC

iL ∆uab

● Line-to-Line Output Voltage Ripple < 3.2V

 110 /135

Efficiency Measurements
● Dependency on Input Voltage & Output Power Level

UDC= 400V / 600V

UAC= 230Vrms (Motor Phase-Voltage)
fS = 100kHz

 Multi-Level Bridge-Leg Structure for Increase of Power Density @ Same Efficiency

 111 /135

EMI-Limits (VSD Product Standard)

● IEC 61800-3  Product Standard for Variable-Speed Motor Drives
● EMI Emission Limits  Grid Interface (GI) and Power Interface (PI)
● Application  Residential (C1) or Industrial (C2)

■ EMI-Filter Design for Unshielded Cables > 2m and Resid. Applications (Cond. & Rad.)
 112 /135

Conducted EMI-Filter
● Separate Cond. DM & CM EMI-Filter on DC-Side & DC-Minus Ref. EMI-Filter on AC-Side

Cf2 (on the back)

LCM LDM CDM = C0 Lf2

 Low Add. EMI Filter Volume — 74cm3 for Each Filter (incl. Toroid. Radiated EMI Filter)
 Total Power Density Reduces — 15kW/dm3 (740cm3)  12kW/dm3 (890cm3)
 113 /135

Conducted EMI - Experimental Results

● Measurements of the Cond. EMI Noise on the AC-Side (QP, with 50Hz AC-LISN)

 Small 80uH CM-Ind. Added on AC-Side - (3 cm3 of Add. Volume = 0.5% of Converter Vol.)
 Conducted EMI with Unshielded Motor Cable Fulfilled
 114 /135

Measurement of Radiated EMI-Noise (1)

● Equipment Under Test (EUT) Placed on Wooden Table with Specified Arrangement
● CM Absorption Devices (CMAD) Terminate All Cables on AC-Side & DC-Side (Total lcable ≈ 1.5m)
● Measurement of Radiated Noise with Antenna in 3m Distance

[IEC 61800-3]
[Schwarzbeck]

■ Either Open-Area Test Site (OATS) or Special Semi-Anechoic Chamber (SAC) Needed
■ Alternative Pre-Compliance Measurement Method
 115 /135

Measurement of Radiated EMI-Noise (2)

● CM-Currents NOT Returning IN THE CABLE are Dominant Source of Radiation
● Relation Between Radiated Electric Field and CM-Currents (!)

[Electromagnetic Compatibility Engineering, H. Ott]

[Fischer FCC F-33-1]

up to 250MHz
Znom = 6.3Ω

■ Max. Allow. El. Field Strength of 40dBuV/m  Max. CM-Current of 3.5uA (11dBuA)
■ Current Probe Impedance of 6.3Ω (F-33-1)  Max. Noise Volt. of 26dBuV @ Test Receiver
 116 /135

Radiated EMI-Filter Design

● Single-Stage HF CM-Filter on DC-Side and AC-Side
● Plug-On CM-Cores (NiZn-Ferrites)  Low Parasitics & Good HF-Att. up to 1GHz

CY2,DC (on the back) Cf2 (on the back)

LHF LHF

 Additional EMI Filter Volume Already Considered with Conducted EMI Filter
 Total Power Density Slightly Reduces — 15kW/dm3  12kW/dm3
 117 /135

Experimental Results - Radiated EMI

● Y-Inverter Placed in Metallic Enclosure  Emulate Housing, but UNshielded Cables (!)
● Measurement Setup  According IEC 61800-3
● Alternative Measurement Principle  Conducted CM-Current Instead of Radiation

 Already Noticeable Noise Floor

 HF-Emissions Well Below Equivalent EMI-Limit  Next Step: Verification Using Antenna
 /135

Buck-Boost
Current Source Inverter
 118 /135

3-Φ Current Source Inverter Topology Derivation

■ Y-Inverter  Phase Modules w/ Buck-Stage | Current Link | Boost-Stage
■ 3-Φ CSI  Buck-Stage V-I-Converter | Current DC-Link DC/AC-Stage




 Single Inductive Component & Utilization of Monolithic Bidirectional GaN Switches

 119 /135

3-Φ Current Source Inverter (CSI)

■ Bidirectional/Bipolar Switches  Positive DC-Side Voltage for Both Directions of Power Flow

Source:

● Monolithic Bidir. GaN Switches  Factor 4 (!) Reduction of Chip Area Comp. to Discrete Realization
 120 /135

3-Φ Buck-Boost CSI (1)

■ Monolithic Bidir. Bipolar GaN Switches  Full Controllability
■ Buck-Stage for Impressing Const. DC Current / PWM of CSI for Output Voltage Control

● Conventional Control of Inverter Stage  Switching of All 3 Phase Legs (3/3)

 121 /135

3-Φ Buck-Boost CSI (2)

■ Monolithic Bidir. Bipolar GaN Switches Featuring 2 Gates / Full Controllability
■ Buck-Stage for Impressing Const. DC Current / PWM of CSI for Output Voltage Control

● Conventional Control of Inverter Stage  Rel. High CSI-Stage Sw. Losses

 122 /135

3-Φ Buck-Boost CSI (3)

■ “Synergetic” Control of Buck-Stage & CSI Stage
■ 6-Pulse-Shaping of DC Current by Buck-Stage  Allows Clamping of a CSI-Phase

● Switching of Only 2 of 3 Phase Legs  Significant Reduction of Sw. Losses

 123 /135

3-Φ Buck-Boost CSI (4)

■ “Synergetic” Control of Buck-Stage & CSI Stage
■ 6-Pulse-Shaping of DC Current by Buck-Stage  Allows Clamping of a CSI-Phase

● Switching of Only 2 of 3 Phase Legs  Significant Red. of Sw. Losses (≈ -86% for R-Load)
 124 /135

3-Φ Buck-Boost CSI (5)

■ “Synergetic” Control of Buck-Stage & CSI Stage
■ 6-Pulse-Shaping of DC Current by Buck-Stage  Allows Clamping of a CSI-Phase

● Operation for 30°Phase Shift of AC-Side Voltage & Current

 125 /135

3-Φ Buck-Boost CSI (6)

■ “Synergetic” Control of Buck-Stage & CSI Stage
■ 6-Pulse-Shaping of DC Current by Buck-Stage  Allows Clamping of a CSI-Phase

● Operation for 90°Phase Shift (±90° — Limit Case for Buck-Stage Current Control)
 126 /135

3-Φ Buck-Boost CSI (7)

■ Implementation of “Synergetic Control”
■ DC-Link Ref. Curr. = Max. Value of AC-Side Currents

3/3 Mod. (iDC=const.) 

2/3 Mod. (6-Pulse iDC) 
Partial 2/3 Mod. 
Full-Boost Operation
● Seamless Transition from
Buck to Boost Operation
 127 /135

3-Φ DC-Link AC/AC Converter Topologies

■ Current DC-Link Topology ■ Voltage DC-Link Topology
● Application of M-BDSs ● Standard Bridge-Legs
● Complex 4-Step Commutation ● Low-Complexity Commutation
● Low Filter Volume ● Defined Semiconductor Voltage Stress
● Facilitates DC-Link Energy Storage
!

● Challenging Overvoltage Protection ● High Input / Output Filter Volume

● Limited Control Dynamics
 128 /135

200kHz SiC Current DC-Link AC/AC Converter (1)

■ Normally-On TO220 1200V/6A SiC J-FETs — Built in 2008 (!)
■ 1200V/10A SiC Schottky Series Diodes
■ X7R Ceramic Filter Capacitors

● Natural Free-Wheeling Current Path for Gate Driver Supply Loss

 129 /135

200kHz SiC Current DC-Link AC/AC Converter (2)

■ 7kHz DC-Link Current Control Bandwidth
■ PCB-Stack Construction — Power | Gate-Drive | Control Board
■ Coldplate Cooling
Input 400Vrms Line-to-Line
Output 0…300Hz
Rated Power 2.5 kVA
2.4 kVA / dm3
(40 W/in3)

230 x 80 x 65 mm3

● Low Volume Toroidal Powder Core DC-Link Inductor (320uH)

 130 /135

200kHz SiC Current DC-Link AC/AC Converter (3)

■ 7kHz DC-Link Current Control Bandwidth
■ PCB-Stack Construction — Power | Gate-Drive | Control Board
■ Coldplate Cooling

— Conducted EMI | EMI Filter

● Low Volume Toroidal Powder Core DC-Link Inductor (320uH)

 131 /135

3-Φ AC/AC Matrix Converter

■ Indirect Matrix Converter (IMC) ■ Direct Matrix Converter (CMC)
● CSI GaN M-BDS AC/DC Front-End ● 4-Step Commutation
● ZCS Commutation of CSI Stage @ iDC=0 ● Exclusive Use of GaN M-BDSs
● No 4-Step Commutation

— Higher # of Switches Compared to CMC — Thermally Critical @ fout ≈ fin

— Lower Cond. Losses @ Low Output Voltage
— Thermally Critical @ fout  0
 132 /135

3-Φ AC/AC Converter Comparison

■ Current DC-Link Topology ■ Direct Matrix Converter
● Application of M-BDSs | 12 Switches ● Application of M-BDSs | 9 Switches
● 4-Step Commutation ● 4-Step Commutation
● Buck-Boost Functionality ● Complex Space Vector Modulation
● Low Filter Volume ● Limited to Buck-Operation (!)

● Challenging Overvoltage Protection ● Challenging Overvoltage Protection

 133 /135

Matrix Converter Monolithic 3D-Integration

■ GaN 3x3 Matrix Converter Chipset with Drive-By-Microwave (DBM) Technology
– 9 Dual-Gate GaN AC-Switches
– DBM Gate Drive Transmitter Chip & Isolating Couplers
– Ultra Compact  25 x 18 mm2 (600V, 10A – 5kW Motor)

Source: ISSCC 2014

5.0GHz Isolated (5kVDC) Dividing Coupler

/135
 134 /135

Future Development
■ Commoditization / Standardization
■ Extreme Cost Pressure (!)

“There is Plenty of.

Room at the Top”  Medium Voltage/Frequency
Solid-State Transformers

“There is Plenty of..

Power-Supplies on Chip  Room at the Bottom”

● Key Importance of Technology Partnerships of Academia & Industry

 135 /135

Smart Converter Concept

■ Utilize High Computing Power & Network Effects in the Cloud  Cognitive Power Electronics
Source: Dr. R. Sommer

● Sensing & Computing on Component Level | Converter Level | System Level | Application Level
 /135

Thank you!