Unit- V

Chapter
10
Memories

Syllabus
Memories : Types : Primary memory, Secondary memory, Organization, Dimension, Memory bank,
Features, Applications : RAM (SRAM, DRAM), Volatile and Non-Volatile., ROM (PROM, EPROM,
EEPROM), Flash Memory, Comparison of RAM and ROM, EPROM and flash memory. SIMM : Features,
SSD memory : Features.

Chapter Contents
10.1 Introduction
10.10 Expanding the Memory Size
10.2 Memory Organization and Operation 10.11 Random Access Memory (RAM)
10.3 Primary and Secondary Memories 10.12 Dynamic RAM (DRAM)
10.4 Classification Based on Principle of 10.13 Comparison of RAM and ROM
Operation
10.5 Classification Based on Physical 10.14 Comparison of EPROM and EEPROM
Characteristics
10.6 Classification Based on Mode of Access 10.15 Flash Memory
10.7 Classification Based on Fabrication 10.16 SSIM (Single In Line Memory Module)
Technology
10.8 Read Only Mernory (ROM) 10.17 SSD (Solid State Drives)
10.9 Internal Organization of RAM
Digital Techniques
Memones
10-2
required t
10.1 Introductlon: 8 bit word, eight flip flops are
To store an and (c)
and so on (Figs. 102 1(b)
Definition be used 8 bit or 16 h.
4 brt,
have to store a numtber of
We
Memory is defined as the part of a computer in which words in a mermory
data or program locations in a memory
instructions can be stored for retrieval. there are a number of a
Any digital systems needs to store the Hence of required length
stor1ng a word
unprocessed, with each locat1on
partially processed data and the result A suitable shown in Fig 102 1(d).
memory block can be used for the same. Dimension/ Size :
A subsystem of such digital 10.2.1 Memory
processing system which locations and number of bits per wo
can store all the above The number of
mentioned data is called as
memory to memory.
memory. will vary from capable of
Earlier the memory used to be of example if aparticular memory chip is then
magnetic type. For word having N bits in it
storing M words with each
But now adays we use Mx N.
semiconductor memories of the size of the
memory will be
various types and size. x4
size of a memory chip is specitied as 16
In this So if the consists of 16 locatione
chapter we are going to d1scuss the principle of then it means that this memory
word.
operation and limitations of various semiconductor can store one 4-bit
and each location 1024
memory. practically used memories can have 256, 512,
The store theso
10.2 Memory Organization per chip. ie. they can
2048 etc. locations
and Operation : many words.
bits.
word size are 1, 4 and 8
And the common
We have already seen that a flip-flop is equivalent to a to store 16 bit words
Then what to do if we require
single bit memory cell. So the basic element of a words and/or large
Memories with higher number of
semiconductor memory is aflip-flop. cascading a number of
word size can be formed by
Each flip flop is capable of storing one binary bit i.e. 0 chips, of smaller size.
or l only. (see Fig. 10.2.1(a)). Device:
D D D. D CLK
10.2.2 Block Diagram of aMemory
device is as shown in
D D The block diagram of a memory
Fig. 10.2.2.
Mermory device with
CLK PFlip-tlop Flip-flop|Fip-flop
3
Fip-flopFip-flop M locations and N bit words
2 1
Address inputs
(P - lines)
MxN bits Data outputs
of memory (N - lines)
(a) Fllp-flop is the basic (b) Four Flip-fops are grouped
element of any memory to store a4-bit word Data inputs
(N- lines)
Location 0 Word 0
Memory
Location 1 Word 1 chip
Word 2 Control Inputs

FF7 FF6FFSFF4FF3FF2 FF1 FFO (C-1139) Fig. 10.2.2 :Block diagram of memory device
There are three types of inputs to an M x N memory
(c) Elght Fllp-fopss are grouped device namely:
to store an 8-bit word Location M Word M
(d) Memory consists of many 1 Address input lines.
locations. Each location
stores one word Data input lines.
(C-1138) Fig. 10.2.1
3 Control inputs.
Therefore to store a 4 bit word we need to use four
And there are N number of data output lines.
flip flops.
TeckKaowledge
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 Techiques 103
Mermories

N- -number of data input lines. The data to be Input and output data buses are alled as unidirectional
are
There lines word by word with each
on these buses beause the data fows onty in one direction on
stored is put are also them.
N-bitlong Data inputs called as Data
word
In all the modern day memory chuãs the same st ot
bus
sddress
I n p u t. s
data lines is sometimes used fo data inpt and
number of address input lines. The digital Sometimes for data outout ooerations This reduces the
are"p
There
applied on these lines are used to number of data lines being used
words spec1fy the
"addressofthe required memory location, for reading
Such adata bus is caled as bi-drectional data bus ard
alreadystored data or writing a new data. (Refer
the
Fig.
1023) Ris represented with arrows on both sdes as show in
Wth addroSs Inpu 1100 Fig 1024.
Loation 0 ihe 12 ooation is
The data in locaianecoOSOd
12 wa be
Location 1
road or wrten Address bs Plines
Locaion 2 Memory
chip

Adres
Data output B-drecaonal
dala bu NHines
Location 12
Location 13 -cs (chip selec)
R/W
Location 14 (Read /Wrle)
Irput Locaion 16 (C1141)Fig. 10.24 : Memory chip with bi-directional data bus
Control lines:
The control lines inciude the read/wite line and the
Control signal
s-1140) Fig. 10.2.33:Selection of alocation using chip select line (which acts as the enable input).
the address lines The bi-directional data bus is used as input data bus for
To accesS any one ofthe Mpossible locations, we need Some specific time when input data is to be loaded into
that 2e M
Paddress lines such memory (write operation).
For example if M = 16 locations, then P=4. So we need
And it is used as output data bus for specific time when
ddress lines to have sixteen different combinations
the stored data is to be read. (read operation).
from 0000to 1111. So address is specified in the binary
The bi-directional data bus thus saves N data lines.
form.
f the address inputs A, A, A, A, = 1100 ie. 12,, then There is only one control line allotted to the read and
we will be able to access the twelth location of the write operation. It is denoted by RW line in Fig. 1024.
memory chip as shown in Fig. 10.2.3. If this line is at logic 1 level, then "reading" operation
The P address lines together are called as an address takes place whereas for logic 0 on this line the "write"
bus.
operation takes place.
In practice the address input is applied to a P to M
With R/W= 1 the data bus acts as an output data bus
decoder. Depending on the binary number adjusted on
the P lines, the decoder outputs will select the desired and with RW = 0, it acts as the input data bus.
memory location.
Data output lines: Input chip enable :
The data available the selected memory location can The chip select input is an active high input. When
be "read" on the data output lines. CS = 1 only then the memory chip is enabled and
The number of data lines is N i.e. equal to the number reading or writing can take place.
of bits per word. The output data lines are also called as But if CS = 0then no operations can take place.
output data bus.
Teck Kaeuledge
PuDI Ca1 tons
Dgital Techniques
104 Memories
Power supply lines : Primary Secondary
Sr.
In addition to the address, control and data lines, Feature memory memory
are two more pins assigned for the there No.
power supply and Volatile (data is Non-volatile (data
ground Volatility lost when power is retained when
power is off)
10.3 Prlmary and isoff)
Secondary Memorles:
Semiconductor memory 3 Types RAM (SRAM,
ROM (NAND,
Flash
Menory
into primary memory and
can be broadly
categorized DRAM).
(PROM, EPROM, SSDs
NOR).
secondary
their function, speed, and usage in mernory based on EEPROM)
computing systems.
10.3.1 Primary Memory: Access by Directly Not directly
CPU accessible by the accessible by the
Primary memory, also known as main CPU CPU(requires l/O
directly accessible by the CPU. memory, is operations)
It is used to store data and Stores data and Stores data and
instructions that are actively 5 Usage programs for
being used or processed. instructions
being long-term use
currently
Primary memory is characterized by its high speed and
used
volatility, meaning it loses its content when the power is
turned off. 6
Capacity Typically smaller | Larger capacty
capacity
The examples of primary primary
semiconductor 7 More expensive Less expensive
memory include Cost per
unit
unit of per
unit per
1 RAM (Random Access Memory) storage
storage
2 ROM (Read Only Memory) Hard drives
8 Examples Cache memory,
10.3.2 Secondary Memory: main memory (HDDS), solid
state drives
(RAM)
Secondary memory, also known as (SSDs), USB
auxiliary or external drives
memory, is not directly accessible by the CPU.
It is used for long-term 9. Facilitates fast Provides large
storage of data and programs. Role in
and storage for data
Secondary memory is non-volatile, meaning it retains its system processing
execution and software
content even when the power is turned off.
10. Provides large
The examples of secondary Data Temporary
semiconductor memory retention storage storage for data
include :
and software
1. Flash memory
10.3.4 Classification and Characteristics of
2. Solid State Drives (SSDs)
Memories :
10.3.3 Comparison of Primary and
Secondary Memory : The memory devices can be classified, on the basis of
Table 10.3.1 :Comparison of primary and various parameters.
secondary memory The parameters used as basis of classification are as
Sr. Feature Primary Secondary follows:
No. memory memory 1 Principle of operation.
1. Speed Very high speed Slower speed 2 Physical characteristics.
compared to
3 Mode of access.
primary memory
4 Technology used for fabrication.

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classiflcation Based 10-5

on
10.4
Operation: Princi pl e of
s-19, S-23, W-23 The Mermores
CSBTEQuestions types eqentl mermores are uther
diassfed into two
1
Give classification of Sht regsters
memory and compare RAM
and ROM (any four points)
af 2
Charge
Explain classification of
memory ? memories(s-19,4 Marks)
What is ash Shift registers Coupled Deviees (CCD)
Give classification of memory and(S-23,6 Marka)
The shoft
Q3
and ROM(Any four points) RAMcompare dynam1c. regsters tan be of two troe e staie 0
(W-23, 2Marka) In the statk mermory, the
classification of memories based
The on the Change with time as long asmemory tontents do hot
operation.is shown in Fig. 104.1 of principle (uninterrupted)As sOon as wepower supply to it s ON
Memones memory contents wil be lost thurn of the prwer the
In the
dymamic
Read and
wnte memories
Read only storing informationmemory, MOS
The memorycapacitors areof used for
Seguental
memones (RWM or RAM) memones
(ROM) Contert
addressabie, memory can alter on their own with conterts dynamic
memories (CAM) desirable time. This is not
Sht
registers
ROM Therefore it is necessary to refresh such
Charge coupled
regular intervals memories
devices (CCD) PROM
EPROM
Advantages of dynamic memories:
l They are simpler than the static
EAROM 2
They are less memornes
(C-1142) Fig.. 10.4.1 : Memory classification based on 3 expensive.
principle of operation Require less power for operation.
4
They have high packaqing densities. That
40.4.1 Sequential Memories: means
tor the same storage capacity the size of the
IMSBTEQuestions
W-23 dynamic memory is smaller than that of the static
1ist the types of semiconductor memories. memory.
Q.1
Due to all these advantages the dynamic memories are
(W-23, 2Marks) widely used in digital systems.
Definition: The only disadvantage of dynamic memories is the
Sequential memories are the memories in which the additional circuitry required for refreshing, the MOS
locations are organized one after the other ie. in a capacitors.
sequential manner. Charge Coupled Devices (CCD) :
Examples: The CCD are manufactured using MOS technology.
The examples of sequential memory are magnetic tape
Information is stored in terms of charge.
The advantages of CCD are high density and low cost.
audiovideo cassette.
10.4.2 Random Access Memory
The reading/writing operation performed on such
(RWM or RAM) :
memories is a sequential process. Definition :
Therefore the time required to access a memory Random access memory is the type of memory for which
location (for reading or writing) is not the same for all data reading as wel as writing is possible. It is alsocalled
memory locations. Instead, the time required to access as Read Write Memory (RWM).
the locations at the beginning of the memory will be The memory locations in this type of memory are
less than that required for the locations at the end of organized in such a way that the access time required
the memory. for accessing (reading or writing) any location is the
same.

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PuDLC a tIgns
Digital Techniques 106
Mermories
suitable only for bulk yRe
This is the advantage of using RAM Over the sequential These ROMs are costly so are
memones (umber of chips inmillions)
RAMs also can be further classified into two types Programmabie Read Only Mermorles (PROM):
ROMs as per hie
namely the static RAM and dynamic RAM A user can prograrn these
RAMS can be fabncated using either bipolar technology requirements using a PROM programmer.
once after h
(using BJTs) or unipolar technology (using MOSFETs) A PROM can be programmed only
fabrication.
10.4,3 Road Only Momorios (ROM) : the contents will become
After programming
Definition: permanently fixed in the ROM.
ROM stands for Read-Only-Memory. It can be The PROMS are manufactured without any data storer
per the
programmed only once by the manufacturer as onto them (they are blank).
requirements of the user. Erasable and Programmable ROM:
for which
Read only memory is the type of memory As the name suggests, these ROMs can be erased and
only the data reading operation is possible. programmed again and again, by the user.
reading the
These memories are designed only for The commonly used techniques for erasing are a
information which is already stored on them. The user
follows:
cannot write any new information on them.
1 Erasing using utraviolet radiation.
These are similar to the prerecorder cassettes.
2. Erasing using electricity.
Amanufacturer or someone else can write ROMs, but
The erasable programmable ROM using ultraviolet rays
the writing process is much more complicated as
compared to that of a RAM. used for erasing is called as EPROM.
And the ROM that uses the electrical voltage for erasinn
ROM is used to store fixed informations such as look up
tables, some static data, microprocessor instructions is known as Electrically Alterable ROM (EAROM).
etc. 10.4.4 Content Accessible Memories (CAM):
It is possible to organize ROMs in such a way that Content accessible memory is basically a RAM with
reading time required for any location remains same. some special features.
the
Types : It can perform association operation in addition to
read/write operations performed by the conventional
The ROMs are further classified into three categories as
RAM.
follows:
1 Read Only Memory. 10.5 Classification Based on Physical
Characteristics :
2 Programmable Read Only Memory (PROM).
3 Erasable and Programmable ROM (EPROM). The cdassification based on the physical characteristics
Read Only Memory : as shown in Fig. 10.5.1.
These memories are programmed at the time of Memories
manufacturing. So they are truly the read only
Erasable or
memories. non erasable

The programming is done as per the requirements of Volatile or

the user but the manufacturer and not the user does it. non volatile

Such ROMs are called as custom programnmed or (C-1143) Fig. 10.5.l:Classification based on
mask programmed. We cannot change the physical characteristics
programmed data after it is manufactured.
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Erasable or
051
Non-erasable Memories: 10-7
Dolinitlon: We can erase
erasable memory is the one in this Memories
An
information can be erased and which the stored
we can
ulThetraviolet (UV) lhght through
PROM by exposing it to the
information
ontoit save new exposure period shouldthebe quartz wi15ndow
user can not erase any information Sometimes longer
Note that the UV rays
10 to
minutes or
The
non-erasable memory. For stored in the
example ROM is a non- all the wili
erase all the
logic 1 locations in the erased cels at time and
erasablememory,
EPROM will store a
DYpes:
The
erasable memories can be
classes as follows :
further categorised Advantages:
1
It is
wo in
2 poss1ble to erase the
existing
Location- by - location
erasable memories. IR is
possible to data.
1.
Alllocations times. program new data any number of
2 simultaneously erasable.
Locationbylocation erasable memories : Disadvantages :
1
we can erase the
In this type, contents of We can't erase
the memony locations in a
informatmemor
ion yis
locations one by one and then the manner. the
stored. EAROM, RAM and CAM
new
are the 2
All
locations get erased. selective
The EPROM has to be
location by location erasable memory. examples of
and put in the rermoved from the socket
we have to eraser for erasing.
In EAROM, erase
the
before entering the new contents of the 10.5.3 Volatile or
location first
However in RAM and information. Non-volatile Memories :
CAM, erasing W-18. W.19. S-22
performed automatically when a new operation is MSBTE Questions
be entered. information is to Q.1
Compare the volatile with non-volatile
Alllocations simultaneously erasable memories: (Any three points). memory
Q. 2 (W-18, 3 Marks)
hoce are the memories n which, Compare the volatile with non-volatile
contents of all the memory.
memory locations are erased simultaneously.
Q. 3 (W-19, 2 Marks)
Eor example when we expose an EPROM to the Compare the volatile with non-volatile memory
ultraviolet radiation, the contents of all the (Any two points each) (S-22, 2 Marks)
locations get
erased simultaneously. Volatile memory :
Ultraviolet If the
10.5.2 Erasable Programmable information stored in a memory chip is lost when
the electrical power is switched OFF,
ROM (UV EPROM) : then the
called as volatile memory. RAM is a volatile memory is
The EPROM which can be erased using the ultra violet memory.
That means a volatile memory can hold the data
exposure is shown in Fig. 10.5.2. stored
on it only as long as the power supply is
Window
it. It loses the data as soon as the
connected to
power is turned off.
Non-volatile memory :
If theinformation once stored in memory chip does not
change unless the user changes it deliberately then such
a memory is called as non-volatile memory.
(C-512) Fig. 10.5.2:UV EPROM
Such memories can hold the information even after
As mentioned earlier, all the memory locations in an
switching off their power supply. Read Only Memories
EPROM will be erased simultaneously. In an EPROM
(ROMS) of all types are examples of non-volatile
there is a quartz lid or window on the package as memory.
shown in Fig. 10.5.2.
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 Memories
Digital Techniques 10-8
Based on Fabrication
Classiflcatlon
Comparlson of volatle and nonvolatlle memorles: 10.7
Technology:
Table 10.5.1: Comparison of volatile and
nonvolatlle memorles fabrication technologies used for
two basic folowe
There are chips. They are as
manufacturing the memory
Sr.
No. Parameter Volatlle Nonvolatlle
memorlos memorles Bipolar technology.
1
(unipolartechnology).
1 Definition Information Information
technology
stored is lost if does not get 2 MOS
technologies are TTL and Fc
power is tumed
off.
lost.
The examples of bipolar fabricated using either
ROM, EPROMs can be
2 Classification All RAMs and RAM,
ROMs, technology.
EPROM, bipolar or MOS fabricated
magnetic dynamic RAM, EPROM and EAROM are
The only the
memories. technology only i.e. using
3 Effect of using MOS
Stored No effect of
MOSFETS.
power information is power on
Memory(ROM):
retained only as
long as power is
stored
information.
10.8 Read Only
ROM is t
on. information stored in a
4
We knowthat the
Applications For temporary For pemanent permanent nature.
storage storage of User can't alter
can be only read by the user but the
information. It
information. The ROMs are
the pre-existing of
10.6 Classification Based on Mode of manufacturer at the time
programmed by the
Access :
manufacturing them.
important advantages of
Mode of access tells us the manner in which a memory Following are some of the
location is accessed while we perform the read or write ROMs:
operation. Low cost.
3. Flexibility.
1
There are two possible modes of aCcess as follows : 2 High speed. 4. ROM is a nonvolatile memory.
1 Sequential access.
10.8.1 Application of ROM:
2 Random access. of ROM are:
Some of the important applications
10.6.1 Sequential Access: 1 For implementation of
combinational circuits.
2 For implementation of sequential
circuits.
In the sequential memories memory locations are
accessed in a sequential manner. 3 In character generation.
4. To store look up tables.
So the time required to aCcess various locations will not
be the same as stated earlier. 5 For storing microprocessor program.
10.8.2 ROM Manufacturing :
10.6.2 Random Access:
The technologies used for ROM manufacturing are:
In this type we can access any memory location without 1. Bipolar technology.
going sequentially.
2 MOS technology.
Accessing any memory location therefore needs same ROM Organization:
10.8.3
amount of time, irrespective of the place of the memory
location. AROM is an array of selectively unidirectional contacts.
One can open or close the contacts by selecting them in
Examples of random access are RAM, ROM and CAM.
order to write the required information into a ROM.
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Techniques 10-9
Mernories
Circult
dlagram

organization of 16-bit ROM array is shown in Thus we can select any of the 16
the help of the possibie junctions wth
The
Fig.
1081 address lines A, A, A, Ag
Diode matrix
Diode rnatriz is the most
important part of the POM
array shown in Fig 10 8.2
-Row 0
1d4
Docodor Dos
2

A,
P 4Pa 4 4P
Column 3
Row (C-1146) Fig. 10.8.2
drivers Diode
matrix
It is
Column
enable
Cdumn
formed by /coonnecting a diode and aswitch in series
1a 4 Sense between each row and column.
Ag Decoder amplfiers
Ag
For example refer Fig. 1082 which shows diode Doz
oData output
Chipsolect alongwith a switch connected between row 0 and
(CS)
(C-1145) Fig. 10.8.1: A16-bit ROM array column 3
two 2 - 4 address decoders, 16 locations and The chip select (CS) input is used to enable the output
It uses
So this is a 116 x 1 ROM.
1-dataoutput. A ROM is programmed by selectively opening and
16 locations at which we can save 1-bit
There are Closing the switches connected in series with the
information each.
diodes. This is as explained below.
The method of addressing is called as two dimensional,
10.9 Internal Organization of RAM:
v-Yor coincident selection, addressina.
Aunidirectional switch is included at the junction of Fig. 10.9.1 illustrates the internal organization of a
every rOW and| column, as shown in Fig. 10.8.2. 16 x 4 memory chip. 16 x 4 means it can store 16 words
lower two address bits (A, A) are connected as of 4 bits each.
The
input to the decoder D,. Therefore we will have 16 locations (addresses) each
The outputs of this 2 :4 line decoder are used to selet storing a 4-bit data word.
four rows. The four possible
one out of the
combinations of A, Ao are 00, 01, 10 and 11. This chip therefore consists of 4-address lines to have
16 addresses.
Corresponding to each of these combinations one row
For 4 to 16 line conversion we have a 4 to 16 line
out of four is selected.
decoder used.
The high two address bits (A, Az) are connected as
input to the decoder D. There are 16 locations each one capable of storing a
4-bit word.
The four outputs of this decoder (Ag A, = 00, 01, 10 and
11) are used to select one out of the four column sense Therefore there will be 4 input data lines and 4 output
amplifiers, i.e. to select one of the four columns. data lines as shown in Fig. 10.9.1.

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Mernorie
10-10

D, D, (Dala ingut ines)

Dy D
cel
Input -1bit mermory
Bulfers
Write (W)

3210Location0
Location 1

4 to
Addresa 16
inputs line G
A, Read (R)
decodor
Memory chip
A
Location 14
3 | 2 10 Location 15

Output
butters

D3 D D, D (Dala output lines)

(C-1150) Fig. 10.9.1: Internal orqanization of RAM
and output
Four input buffers are connected between the data buffers are enabled
Therefore the input
input lines and memory while four output buffers have load the word 1001 at the
buffers are disabled. This will
been inserted between the memory and data output
memory location 0110.
lines.
therefore the output buffere
Note that separate input and output lines are being The output of gate G, is 0,
impedance state) Hence the
used. A multiplexed data bus is not being used. will go into tristate (high
output lines.
Control logic circuit consists of two AND gates and two data is not available on the
originally present at the
NOT gates. Note that the data which is
cleared off first and
The inputs to the control logic circuit are read, write and selected memory location (0110) is
data inputs will
chip select CS. the new data (1001) applied at the
10.9.1 Write Operation : replace it.
The sequence of events taking place for writing the 10.9.2 Read Operation :
desired data (say 1001) at the desired memory location already
Read operation is essential for reading the
(say 0110) is as follows:
stored contents ofa selected memory location.
We want to write at the memory location 1001.
For read operation the CS and read (R) inputs should be
Therefore adjust AA, A, Ag = 0110 so as to select the
made active by applying a logic 1 while the write input
desired memory location. Adjust D, D, D, Do = 1001 at
the data inputs. should be made inactive by applying a logic 0 to it.

Make CS = 1,W= 1 and R= 0. This will enable gate G, CS = 1,R=1, W=0.

and disable gate G, This will enable gate G, and disable gate G, in
Fig. 10.9.1.
The output of G, is connected to the input buffers and
Hence the input buffers are disabled and output buffers
that of G, is connected to the output buffers. are enabled.

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the
10-11
input
buffers go into tnstate
(high irnpedance
state)
The and will not allow the connectiorn with the input Here n8 and N Memores
4 henee 2 We
21Cs. have to ue
each wih a
buffer will
Step2Connections casy164
data
enabled output connect the data on
selected
The location to the output ines This is read
Since the number d
operation kans dees nt hange (16, the
number of address lines
bofollowod for read operation wil not
to It wil be change
stops
Toreaddata from the memory chip one has to follows, equal to 4, and they will be
followingprocedure the nemory ICs urmn to tr
Make the chip select (CS) to the chip active ie. As the word sze is to be
1
make CS = 1.
This will enable the chip. lines of 1C-2 as the MsB eupanded, we wll use the Gas
lines (D. D,, D, D,)
Address of the desired memory
the data lines of IC Iwil be wheress
location applied
is used as LS8 lines (D, D, Dy
2
to the address
lines. D)
Now apply Read (R) = 1 and write (W) = 0. Connect the same read (RD) input to both ICs
3.

10.10Expanding the Memory Size : Simultaneously It ll now act as read (RD) input of the
overall memory
applications the capacity of the single
available Sane thing is true for the write WR) input, as wel as
In many sufficient the chip select (CS)
memory chip is not input.
Hence we have to increase it by using more than one Ihe connections are as shown in Fig. P.
10.101
chips.
memory. Addrass A D7
This is called expansion of lines An Chip 2
The memory expansion can be of following two types:
D,
CS RD WNR
Expansion of word size. (increase in N).
1 8- brt data
Control 16 z4
2
Expanding the word capacity (increase in M). lines
(Input
or

40.10.1 Expanding the Word Size :

Output)
CS RD WA
D.
Here we want a word size "n" which is greater than the
Chip -1
word size "N" of the available memory chip. D

Eor example conversion of 16 x 4 memory into a 16 x8 16 x 4

memory will require expansion of word size from 4 to 8 (C-1156) Fig. P. 10.10.1 : A 16 x 8 memory using two
Alote that number of words M =16 remains constant. 16 x 4 memory chips

The following example explains the word size expansion 10.10.2 Expanding Word Capacity :
process
Expanding word size means increasing the value of M,
Ey. 10.10.1 : A 16 x 4 size memory is available. Expand its keeping the word size (N) unchanged.
Word size so as to obtain a16 x 8 memorv. That means the number of locations are to be increased
Soln. : keeping the word size same.
Step 1: Decide number of memory chips:
For example if 16 x 4 chips are available and we want to
f the required word size is denoted by "n" and the have a 32 x 4 memory then we have to perform the
available word size is denoted by N, then the number of word capacity expansion.
ICs required is an integer given by,
The following example illustrates the word capacity
Number of ICs = X n/N.
expansion.

Tech Kneuledg
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Digital Techniques 1012 So the first 16
first chip is selected
the
Ex. 10.10.2 : Obtain a 32 4 memory using 16 x 4 memory When A, 0 for A, A A, A, =
0000 t
accessed
chips locations canbe
Soln. 1111
disabled and second chip is
Step 1: Numberof memory chips 1, first
chip is
With A, the RD or
To obtain a memory of capacity m words using memory 0000 to 1111 now
chips with M words each, the number of chips required selected For A, A, A, A, 16 locations of
performed on the
be
is given by. WR operation can
X m/M chip-2.
chips are requirer
Where X is an integer. x 8 memory
Ex. 10.10.3 : How many 256
In this example, m = 32 and M = 16 memory ? Also
show the memOry
2048 x 8
X = 2 ie. 2 chips of capacity 16 x 4 are to obtain a chip
required. with each memory
addresses associated
Step 2:Connections:
Soln. :
The two 16 x 4 chips are connected in the chips
following 2048 x 8 memory using 256 x 8
manner: In order to obtain
2048/256 = 8 chips.
The address lines are connected to the address lines of we need to use
the chips are
both chips individually. bi-directional data lines of all
The
That means out of the 5 address lines (we need 5
Connected to each other.
address lines) the 4 LSB lines A, A, A, A, will be same together.
of all chips are connected
for each chip and the MSB line A, should be used to That means D, lines
select chip-1 orchip-2. connected together...and so on.
D, lines are
with A, = 0 chip-1l should be selected. chips are connected
read (RD) lines of all the
The
with A, = lchip-2 should be selected. of the
and this line acts as the read input
together
As the word size is same (4 bit), the data input/output
lines of both the chips should be connected in parallel combined memory.
all the chips are
connected
to each other. Similarly write (WR) lines of
That means D, of chip-1 is connected to D, of chip-2 (WR) input of the
combined
together to form the write
and the common D, line now acts as the D, line of the
memory.
overall memory. Similarly the connections are made for need 8 address Iines A, to
D,, D, and D, lines. Connect the read input of each chip To access 256 locations we
locations we need 11 address
together and write inputs also together. A, and to access 2048
The connection diagram is shown in Fig. P. 10.10.2. lines A, to Ao
D
common to all
Hence the LSB eight lines A, to A, are
Data
input
Do

RD RD the chips.
3:8
Chip-1 Chip-2
The MSB three lines A, to A,, are applied to a
then
WR WR decoder and the 8 outputs of the decoder are
CS-1 CS-2
Read
(RD)
applied one by one to the chip select inputs of the eight
Write
Address (WA)
memory chips.
lines As
A The connection diagram of 2048 x 8 memory using
(C-1157)Fig. P. 10.10.2 : A32x 4 size memory obtained using
two 16 >x4 memory chips eight 256 x 8 memory chips is shown in Fig. P. 10.10.3.

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PubIC a lions
JaTechniques
1013
A10
AddressAg
Memones
Ag

A1
Ao

3 to 8 AD
line
decoderO Chp 7
Cs Chip 6
D
WR Chip 0
D WA
D WA
D
Data Do
pus |D7
RD

WA
(C-1158) Fig. P..10.10.3 : 2048 x8 size
memory using eight 256 x8
MemoryaddresSes: memory chips
Types of RAM:
addresses of memory locations for
The eight memory There are two types of RAMA
chips are
givenin Table P. 10.10.3.
1 Static
TableP. 10.10.33: Memory addresses for various chips RAM. 2. Dynamic RAM.
Memorychipnumber
Address (Hex)
10.11.1 Static RAM (SRAM):
It is possible to implement the static RAM using the
Chip 0 000-OFF (256 locations) bipolar as well as MOS technology.
Chip-1 100 -1FF (Next 256 locations) The stored data remains as long as
power is applied to
the chip.
Chip-2 200-2FF (Next 256 locations)
Static RAM cells are basically flip flops which can
Chip- 3 300- 3FF (Next 256 locations) stay in
a given state (i.e. store a bit) as long as
power to the
Chip 4 400 4FF (Next 256 locations) circuit is not interrupted.
Chip -5 500- 5FF (Next 256 locations) It is possible to implement the static RAM using the
bipolar as well as MOS technology.
Chip -6 600-6FF (Next 256 locations) The stored data remains as long as power is applied to
Chip 7 700-7FF (Last 256 locations) the chip.

10.11 Random Access Memory (RAM) : 10.12 Dynamic RAM (DRAM):

S-22
It is a type of physical memory used in most personal
MSBTE Questions Computers.
The term dynamic indicates that the memory must be
Q.1. Name the types of RAM. (S-22, 2 Marks)
constantly refreshed (reenergized) or it will lose its
We know that RAM is a memory that can be read as
contents.
well as written.
In the dynamic RAM, the data is stored in the form of
RAM is a volatile memory so it loses the stored data charge on the capacitor. The dynamic RAM cell is as
when power is turned off. shown in Fig. 10.12.1.
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Dig tal Techniques
Control (Column) signal
MOSFETwilch
10-14

SRAM
Memoriea
Sr
Parameter DRAM
No.

Refreshng
Not required Requred
Control (Row) Storage Less
capaortor More
Signal Cost
Access tme OR Less So these More So
6
(C 116) Fig. are faster these are
The sense and
10.12.1:Dynamic RAM speed memores Siower
control lines are
signals When both these lnesused as column and row rmemones

acts as a closed are high, the More

switch and charges the MOSFET 7 Power
Less

When the control and capacitor. consumption

sense both are low, the RAMand ROM.
turns OFF (So acts as an
open switch) and the
MOSFET 10.13 Comparison of
retains its charge because capacitor
there is no path for the S19, W-22. W-23
capacitor to discharge. Thus a log1c 1 bit is MSBTE Questions
Features of DRAM: stored.
compare RAM
Q. 1 Give classification of memory and
Each cell of a DRAM (S-19, 4 Marks)
Consists of a transistor and a and ROM (any four points).
tiny capacitor
a. 2
Compare RAM with ROM memory (Any three
2. A DRAM cell
needs to be refreshed after points).
(W-22, 3 Marks)
few ms. every
and compare RAM
3 It stores data in the Q.3 Give class1fication of memory
form of charge on the and ROM (Any four points)
(W-23, 2 Marks)
capacitor.
RAM and ROM
4 It is a Table 10.13.1 : Comparison of
non-volatile type memory.
10.12.1 Comparison of SRAM and DRAM: Sr. Parameter RAM ROM
No.
W-18, S-22 Reading and Read1ng only
1 Operations
MSBTE Questions involved writing
Q. 1 Compare the Temporary Permanent
SRAM with DRAM memory 2 Type of
(Any three points). (W-18, 3 Marks) storage
Q. 2 Compare the SRAM with DRAM memory (Any two SRAM, PROM, EPROM.
3. Types
points each). DRAM EEPROM
(S-22, 2 Marks)
The comparison of DRAM and SRAM is as shown in 4 Application Calculators, Computers,
Computer microprOcessor
Table 10.12.1.
Table 10.12.1: Comparison of SRAM and DRAM 10.14 Comparison of EPROM and
EEPROM: w-19, W-22
Sr.
No.
Parameter SRAM DRAM MSBTE Questions
Assume data
1 Circuit Each SRAM Each DRAM Q. 1 Compare EPROM with EEPROM.
rate = 1 Mbps. (W-19, 2 Marks)
configuration cell is a flip unit consists
Q. 2 Compare EPROM with EEPROM memory
flop. of one
(W-22, 3 Marks)
(Any three points).
MOSFET and
Table 10.14.1: Comparison of EPROM and EEPROM
a capacitor.
Sr EPROM EEPROM
2 Number of More Less Parameter
No.
components per (only two)
1. Technique Exposure to A voltage of 20
cell to 25 Volts is
used for ultraviolet light.
3 Menory cells/unit Less than More than applied
erasing.
area DRAM SRAM
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10 15
EPROM
Parameter
EEPROM Sr.
No. Mermories
NO Selective
Not possible
Allthe
Possble A
particular 3
Parameter EPROM Flash
erasing
locations get Time for erasing Long 10 to
erased location only
can be erased 15
memory
Long typically
4
Need to Instant
Short typIcaly
3
Timerequired
forerasing 10to 15 min. 10 ms mermory
the circut removes
from to neCeSAaryNot
recsary
Needto It is necessary
to remove the
Not necessary
to remove
EPROM remove
the from rerne
to
the circt
from
for
remove circut for
PROM from PROM PROM 5
Way of eras1ng erasing erasing
CIrcuit. Al the data
erased
gets Selective
Cost
Less Very expensive
5 expensive 6 erasng
10.15 Flash Memory:
Applications In
possibie
computer to Cell phones,
S-23 store the digital carTera
MSBTE Questions operating
system. etc
Q.1 Explain classification of memories. What is flash
10.16 SSIM (Single In
memory ?

It is aspecial
type of RAM.
(S-23, 6 Marks)
Module): Line Mernory
It is a non-volatile memory which is powered Definition:
continuously. The erasing and programming of this Single In-Line Memory
memorytakes place in a block by block manner. memory module used inModule
older
(SIMM) is a type of
provide computer systems to
Due to this process, the flash memories are faster than
EEPROMs which erase and write new data at the SIMM
random-access memory (RAM).
byte modules have a single row of
on one side of the electncal
contacts
level. module.
Flash memory cannot be used as a
random access SIMMs have a notch in the
ensure correct orientation and module's edge connector to
memory because RAM is to be addressed at byte leyel prevent insertion in the
The sections of flash memory chip are organized in Such wrong direction.
away that they can be erased instantaneously or in a Types of SIMM modules :
flash. Hence its name is "Flash Memory. 1. 30-pin SIMM :
A
Special technique called Fowler-Nordheim tunnelling This module is used
is used for erasing the contents. primarily in early personal
Computers and workstations. Each module
Important features of a flash memory are high speed, 30 electrical contacts. contains
low operating voltages, low power consumption and 2.
72-pin SIMM :
durability. Typical application areas are digital camera,.
embedded controllers, cellular phones,etc. This module is introduced later
and used in systems
throughout the 1990s.
10.15.1 Comparison of EPROM and FLASH These modules have 72 electrical
Memory : contacts
higher capacities and data transfer rates and offer
Table 10.15.1: Comparison of EPROM and flash memory SIMMs. than 30-pin
Sr. Flash
No.
Parameter EPROM 10.16.1 Features of SSIM:
memory
1. Type Non volatile Non volatile Following are the features of SSIM:
1
2 Erasing Exposure to UV Electrical Memory capacity :
technique rays. signals are SIMMs typically range from 1 MB to 32 MB in
used for
capacity.
with 72-pin SIMMs offering higher
erasing capacities compared
to 30-pin SIMMs.

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Dig1tal Techniques
2.
Data width
10-16
5
Silentoperation
moving parts,they operate
Memonen
SIMMs have a data
9 bits (for width of 8 bits (for parity SIMMs) or
non- panty SIMMs).
Since
have no
SSDs to
compared HDDs, which
moving mechanicalcomponents
have spinning disks anslent y
3
Speed ratings : Applications of
SSDs:
SIMMs are rated by their access time, often measured in
10.17.2
important
applications of SSDs
nanoseconds (ns), which indicates the speed at which Follow1ng are the
data can be Consumereloctronics :
accessed.
4,
Parity checking: 1
desktops, tablets, and smartphones
Used in laptops, storage
and improve
Some SIMMs include parity checking, which faster veral
helps to provide
detect and correct errors in performance.
5. memory. centers :
Voltage requirements : Enterprise and data
2. Used for high-performance storage solutions where
SIMMs operate at standard voltages used by the
system's memory bus, typically 5 volts for older and durabil1ty are critical
systems. speed, reliability,
Embedded systems :
10.17 SSD (Solid State 3 applications, medical
Drives) : Used
industrial
in systems, and loT devices where rotun
automotive dence,
Definition: with low power
consumption is required.
Solid State Drives (SSDs) are a type of storage
storage device that Review Questions
uses solid-state memory to store data
persistently. classification of memories
Unlike traditional hard disk drives (HDDS), which use Explain the based on ther
a. 1 principle ofoperation.
mechanical spinning disks and magnetic heads, SSDs
have no moving parts. Explainthe classification of memories based on ther
Q. 2 physical characteristics.
Instead, they rely on flash memory technology, which is
atype of non-volatile memory that Explain the concept of RAM. Mention its types
retains data even
when power is turned off. Q.3 working of any one
Explain with diagram type o
10.17.1 Features of SSD Memory : RAM.
and RAM.
SSD memory has following features : Differentiate between ROM
Q. 4
diagram the dynamic MOS
1. Non-volatile : Q.5 Explain with circuit
memory.
SSDs retain data even when the power is turned off, How can you differentiate between sequental
unlike volatile memory such as RAM. Q. 6
RAM ?
2. access memory and
Fast access and transfer speeds : Explain the meaning of static and dynam1c
Q.7
SSDs offer significantly faster read and write speeds memories. State their applications.
compared to traditional HDDs, leading to quicker boot What is ROM ? What are the types of
ROM
Q.8
times, faster file transfers, and improved overall system Compare between them.
responsiveness.
Q.9 State the advantages of memories.
3. Durability and reliability : ROMs.
Q. 10 State and explain the types of
memories
SSDs are more shock-resistant and less prone to Q. 11 State and explain the characteristics of
mechanical failure than HDDs, making them ideal for Q. 12 Compare EPROM and EEPROM.
portable devices and environments prone to vibration. Q13What is refreshing ?
4. Low power consumption: 9EGrentiate between volatile and nonvolatie
SSDs consume less power than HDDs, which can lead maraoies.
longer battery life in laptops and mobile devices.
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