Introduction to 80x86 Processors

by
Redae K
1
 8086 Microprocessor
• It is a 16 bit µp.
• 8086 has a 20 bit address bus can access up
to 220 memory locations ( 1 MB) .
• It can support up to 64K I/O ports.
• It has multiplexed address and data bus
AD0-AD15 and A16–A19

2
 Continued…
• It can prefetches up to 6 instruction bytes
from memory and queues them in order to
speed up instruction execution.
• It requires +5V power supply.
• A 40 pin dual in line package.
• Address ranges from 00000H to FFFFFH
• Memory is byte addressable - Every byte has
a separate address.

3
 Memory Segmentation
• There are 4 memory segments
‒ Code Segment:- stores instruction code bytes
‒ Data Segment:- stores data bytes
‒ Extra Segment:- stores extra data and
specifically in strings
‒ Stack Segment:- stores addresses and data
while subprogram executes

4
Continued…

5
Internal Architecture of 8086

6
 Continued…
• 8086 has two blocks:
– Bus Interface Unit (BIU)
– Execution Unit (EU)
• Why those two blocks are needed to
exist?
Pipelining : Fetching the next instruction
while the current instruction executes.

7
 Continued…
• BIU:
– The BIU handles all transactions of data
and addresses on the buses for EU.
• Functions:
– Calculating the address of the memory
– Fetch instructions or data from memory
– Write the data to memory
– Write and read data to or from ports
8
 Continued …
• The instruction bytes are transferred to the
instruction queue.
• BIU contains the following functional parts:
‒ Instruction pointer (IP)
‒ Segment register
‒ Instruction queue
‒ Address adder
9
 Continued…
• Instruction pointer (IP):-
– it is a 16 bit register that keeps the address of the
next instruction to be fetched and executed.
• A segment register:-
– is used to hold the upper 16 bits of the starting
address for each of the segments.

10
 Continued …
• There are 4 segment registers
– code segment (CS) register
– stack segment (SS) register
– extra segment (ES) register
– data segment (DS) register

11
 Continued…
• Instruction queue
‒ it is a high speed register used to save the
prefetched instructions in a group manner
‒ it can store a maximum of 6 instruction
bytes. Why?

12
 Continued…
• Address adder why?
‒ Used to compute the address of the memory
‒ Physical address = segment address*10 +
offset address
Ex: if CS = 2010H and IP 1050H
Physical address = 2010*10 + 1050 = 21150H

13
 Continued…
• A ways location in the memory segments
are pointed as follows:
‒ CS:IP
‒ DS:SI or DS:BX
‒ SS:SP or SS:BP
‒ ES:DI

14
 Continued…

• EU:
– EU executes instructions from the
instruction system byte queue.
‒ Decodes instructions fetched by the BIU
‒ Generate control signals
‒ Executes instructions

15
 Continued…
• The main parts are:
‒ Control Circuitry:- which directs internal
operations.
‒ Instruction decoder:- translates instructions
fetched from memory into a series of actions,
which the EU carries out.
‒ ALU:- a 16 bit ALU and it performs
arithmetic and logical operations.
16
 Continued…
• It also contains the following parts
‒ General Purpose Registers
‒ Pointer And Index Registers
‒ Flag Register

17
 Continued…
• General Purpose Registers

18
 Continued…
• Pointer And Index Registers:
‒ 16 bit registers
‒ used to keep offset addresses

19
 Continued…
• Flag Register
• A flag is a flip flop which indicates:
‒ some conditions produced by the execution
of an instruction or,
‒ controls certain operations of the EU

20
 Continued…

• It contains 7 unused flags, 6 status flags and

3 control flags

21
 Continued…
• Carry (CF): This flag is set, when there is a
carry out of MSB in case of addition or a
borrow in case of subtraction.
• Parity (PF): PF=0;odd parity, PF=1;even
parity
• Auxiliary (AF): This is set, if there is a
carry from the lowest nibble, i.e. bit three,
during addition or borrow for the lowest
nibble, i.e. bit three, during subtraction.
22
 Continued...

• Zero (ZF): Z=1; result is zero. Z=0; The

result is 0
• Sign (SF): S=1; negative, S=0
• Trap (TF): if set then single-step interrupt
will occur after the next instruction
• Interrupt (IF): I=0; INTR pin disabled. I=1;
INTR pin enabled

23
 Continued…
• Direction (DF): is used to handle strings.
‒ if set, the string is accessed from right to left
(reversed) i.e auto-decrementing mode other
wise the string is accessed from left to right
(forward) i.e auto-incrementing mode
‒ STD = set direction flag
‒ CLD = clear direction flag

24
 Continued…
• Overflow (OF): This flag is set, if an
overflow occurs
• EX: if register AL = 7Fh and the instruction
ADD AL,1 is executed then the following
happen

25
 Continued…
• AL = 80h
• CF = 0; there is no carry out of bit 7
• PF = 0; 80h has an odd number of ones
• AF = 1; there is a carry out of bit 3 into bit 4
• ZF = 0; the result is not zero
• SF = 1; bit seven is one
• OF = 1; the sign bit has changed
26
Pin Diagram of Intel 8086

27