X67DM9321

X67DM9321

1 General information
This module has 8 digital channels that can be configured as inputs or outputs. The inputs are designed for sink
connections, the outputs for source connections.
The node number switch for setting the X2X Link address is a unique feature. When modular machine configura-
tions change, it is necessary, for example, to define specific module groups at a fixed address that is independent
of the preceding modules in the line. All subsequent standard modules refer to this offset and use it automatically
for addressing purposes.
■ 8 digital channels, configurable as inputs or outputs
■ Node number switches for setting the X2X Link address
■ Outputs with short circuit protection
■ All outputs with single-channel diagnostics
■ Configurable input delay
■ 2 additional channels with counter functions

2 Order data
Model number Short description Figure
Digital mixed modules
X67DM9321 X67 digital mixed module, 8 channels configurable as inputs or
outputs, 24 VDC, 0.5 A, configurable input filter, 2 event counters
50 kHz X2X Link address switch

Table 1: X67DM9321 - Order data

Required accessories
For a general overview, see section "Accessories - General overview" of the X67 system user's manual.

Data sheet V2.25 1

X67DM9321

3 Technical data
Model number X67DM9321
Short description
I/O module 8 digital channels, configurable as inputs or outputs using software, inputs with additional functions
General information
Isolation voltage between channel and bus 500 VEff
Nominal voltage 24 VDC
B&R ID code 0x199B
Sensor/Actuator power supply 0.5 A summation current
Status indicators I/O function for each channel, supply voltage, bus function
Diagnostics
Outputs Yes, using status LED and software
I/O power supply Yes, using status LED and software
Connection type
X2X Link M12, B-keyed
Inputs/Outputs 8x M8, 3-pin
I/O power supply M8, 4-pin
Power consumption
Internal I/O 2.5 W
X2X Link power supply 0.75 W
Certifications
CE Yes
KC Yes
EAC Yes
UL cULus E115267
Industrial control equipment
HazLoc cCSAus 244665
Process control equipment
for hazardous locations
Class I, Division 2, Groups ABCD, T5
ATEX Zone 2, II 3G Ex nA IIA T5 Gc
IP67, Ta = 0 - Max. 60°C
TÜV 05 ATEX 7201X
I/O power supply
Nominal voltage 24 VDC
Voltage range 18 to 30 VDC
Integrated protection Reverse polarity protection
Power consumption
Sensor/Actuator power supply Max. 12 W 1)
Sensor/Actuator power supply
Voltage I/O power supply minus voltage drop for short circuit protection
Voltage drop for short-circuit protection at 0.5 A Max. 2 VDC
Summation current Max. 0.5 A
Short-circuit proof Yes
Digital inputs
Input voltage 18 to 30 VDC
Input current at 24 VDC Typ. 4 mA
Input characteristics per EN 61131-2 Type 1
Input filter
Hardware ≤10 μs (channels 1 to 4) / ≤70 µs (channels 5 to 8)
Software Default 0 ms, configurable between 0 and 25 ms in 0.2 ms intervals
Input circuit Sink
Additional functions 50 kHz event counting, gate measurement
Input resistance Typ. 5 kΩ
Switching threshold
Low <5 VDC
High >15 VDC
Event counter
Quantity 2
Signal form Square wave pulse
Evaluation Each falling edge, cyclic counter
Input frequency Max. 50 kHz
Counter 1 Input 1
Counter 2 Input 3
Counter frequency Max. 50 kHz
Counter size 16-bit
Gate measurement
Quantity 1
Signal form Square wave pulse
Evaluation Rising edge - Falling edge
Counter frequency
Internal 48 MHz, 3 MHz, 187.5 kHz
Counter size 16-bit

Table 2: X67DM9321 - Technical data

2 Data sheet V2.25

 X67DM9321
Model number X67DM9321
Length of pause between pulses ≥100 µs
Pulse length ≥20 µs
Supported inputs Input 2 or input 4
Digital outputs
Variant FET positive switching
Switching voltage I/O power supply minus residual voltage
Nominal output current 0.5 A
Total nominal current 4A
Output circuit Source
Output protection Thermal cutoff for overcurrent and short circuit, integrated protection for
switching inductances, reverse polarity protection for output power supply
Diagnostic status Output monitoring with 10 ms delay
Leakage current when switched off 5 µA
Switching on after overload shutdown Approx. 10 ms (depends on the module temperature)
Residual voltage <0.3 V at 0.5 A rated current
Peak short-circuit current <12 A
Switching delay
0→1 <400 µs
1→0 <400 µs
Switching frequency
Resistive load Max. 100 Hz
Braking voltage when switching off inductive loads 50 VDC
Electrical properties
Electrical isolation Channel isolated from bus
Channel not isolated from channel
Operating conditions
Mounting orientation
Any Yes
Installation elevation above sea level
0 to 2000 m No limitations
>2000 m Reduction of ambient temperature by 0.5°C per 100 m
Degree of protection per EN 60529 IP67
Ambient conditions
Temperature
Operation -25 to 60°C
Derating -
Storage -40 to 85°C
Transport -40 to 85°C
Mechanical properties
Dimensions
Width 53 mm
Height 85 mm
Depth 42 mm
Weight 190 g
Torque for connections
M8 Max. 0.4 Nm
M12 Max. 0.6 Nm

Table 2: X67DM9321 - Technical data

1) The power consumption of the sensors and actuators connected to the module is not permitted to exceed 12 W.

4 LED status indicators

Figure LED Color/Status Description
Status indicator 1: Status indicator for X2X Link
Status indicator 1: LED Green Red Description
Left: Green, Right: Red Off Off No power supply via X2X Link
On Off X2X Link supplied, communication OK
Off On X2X Link supplied but X2X Link communication not functioning
On On PREOPERATIONAL: X2X Link supplied, module not initialized
I/O LEDs
LED Color Status Description
1-8 Orange - Output status of the corresponding digital input/output
Status indicator 2: Status indicator for module function
LED Color Status Description
Left Green Off No power to module
Single flash RESET mode
Blinking PREOPERATIONAL mode
On RUN mode
Right Red Off No power to module or everything OK
On Error or reset status
Status indicator 2:
Single flash Warning/Error on an I/O channel. Level monitoring for digital out-
Left: Green, Right: Red
puts has been triggered.
Double flash Supply voltage not in the valid range

Data sheet V2.25 3

X67DM9321

5 Operating and connection elements

X2X Link
Connection A: Input
Connection B: Output

Digital inputs/outputs 1 to 8

24 VDC I/O power supply

Connection C: Supply
Connection D: Routing

6 Node number switches

High Low

The decentralized X2X Link backplane, which connects individual X67 modules with one another, is set up to be
self-addressing. Because of this, it is not necessary to set the node numbers. The module address is assigned
according to its position in the X2X Link line.
In certain cases, e.g. when configurations of modular machines change, it is necessary to define specific module
groups at a fixed address, regardless of the preceding modules in the line.
For this reason, the digital mixed module is equipped with node number switches that can be used to set the X2X
Link address. All subsequent modules refer to this offset and use it automatically for addressing purposes.
#10 #11 #12 #30 #31 #20 #21 #22 #50 #51 #52

X2X Link

Figure 1: Sample configuration

If the node number on the module is set to 0x00, then the module address is assigned according to its position
in the X2X Link line.

7 X2X Link
This module is connected to X2X Link using pre-assembled cables. The connection is made using M12 circular
connectors.
Connection Pinout
3 Pin Description
A
1 X2X+
2 X2X
2 3 X2X⊥
4 X2X\
4
1 Shield connection made via threaded insert in the module.

A → B-keyed (male), input

B 3 B → B-keyed (female), output

4
1

4 Data sheet V2.25

 X67DM9321

8 24 VDC I/O power supply

The I/O power supply is connected via M8 connectors C and D. The I/O power supply is connected via connector
C (male). Connector D (female) is used to route the I/O power supply to other modules.

Information:
The maximum permissible current for the I/O power supply is 8 A (4 A per connection pin)!
Connection Pinout
2 Pin Description
C
1 1 24 VDC
2 24 VDC
4
3 GND
4 GND
3
C → Connector (male) in module, feed for I/O power supply
D 2 D → Connection (female) in module, routing of I/O power supply
1

9 Pinout

1 +24 VDC
X1 to X8
3 GND
M8 ①
4 DI/DO x

① X67CA0D40.xxxx: M8 sensor cable, straight

X67CA0D50.xxxx: M8 sensor cable, angled

9.1 Connections X1 to X8
M8, 3-pin Pinout
3 Pin Name
4
1 24 VDC sensor/actuator power supply1)
3 GND
4 Inputs/Outputs
1) Sensors/Actuators are not permitted to be supplied externally.
1
Connections (female), input/output
1
4

Data sheet V2.25 5

X67DM9321

10 Connection examples

+24 VDC 4 1

Sensor
DI
Connection X
GND
3

+24 VDC 4 1
Actuator

DO
Connection X
GND
3

11 Input/Output circuit diagram

Output status Control logic,

temperature
cutoff 4

3 1
Input status Filter (tIN)
I/O status
LED (orange)

Short circuit
and overload protection
Monitoring of
I/O power supply C +24 V D

2 2

1 4 4 1

3 3
Reverse polarity protection
GND

VDR
>30 V

6 Data sheet V2.25

 X67DM9321

12 Switching inductive loads

Coil inductance
100 H 10 H
1000

1H

Coil resistance [Ω]

100 mH

100

10 mH

50
0.1 1 10 100

Max. switching cycles / second

(with 90% duty cycle)

Data sheet V2.25 7

X67DM9321

13 Register description
13.1 General data points

In addition to the registers listed in the register description, the module also has other more general data points.
These registers are not specific to the module but contain general information such as serial number and hardware
version.
These general data points are listed in section "Additional information - General data points" of the X67 system
user's manual.

13.2 Function model 2 - Standard

Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Configuration
16 ConfigIOMask01 USINT ●
18 ConfigOutput03 (input filter) USINT ●
Communication
0 Input state of digital inputs 1 to 8 USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput08 Bit 7
2 Switching state of digital outputs 1 to 8 USINT ●
DigitalOutput01 Bit 0
... ...
DigitalOutput08 Bit 7
30 Status of digital outputs 1 to 8 USINT ●
StatusDigitalOutput01 Bit 0
... ...
StatusDigitalOutput08 Bit 7
26 Input latch - Rising edges 1 to 8 USINT ●
InputLatch01 Bit 0
... ...
InputLatch08 Bit 7
28 Acknowledgment - Input latch 1 to 8 USINT ●
QuitInputLatch01 Bit 0
... ...
QuitInputLatch08 Bit 7
8192 asy_ModulID UINT ●
8196 asy_SupplyStatus USINT ●
8208 asy_SupplyInput USINT ●

8 Data sheet V2.25

 X67DM9321

13.3 Function model 1 - Counter

Register Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Configuration
16 ConfigIOMask01 USINT ●
20 ConfigOutput01 (counter channel 1) USINT ●
22 ConfigOutput02 (counter channel 2) USINT ●
18 ConfigOutput03 (input filter) USINT ●
Communication
0 Input state of digital inputs 1 to 8 USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput08 Bit 7
2 Switching state of digital outputs 1 to 8 USINT ●
DigitalOutput01 Bit 0
... ...
DigitalOutput08 Bit 7
30 Status of digital outputs 1 to 8 USINT ●
StatusDigitalOutput01 Bit 0
... ...
StatusDigitalOutput08 Bit 7
26 Input latch - Rising edges 1 to 8 USINT ●
InputLatch01 Bit 0
... ...
InputLatch08 Bit 7
28 Acknowledgment - Input latch 1 to 8 USINT ●
QuitInputLatch01 Bit 0
... ...
QuitInputLatch08 Bit 7
4 Counter01 UINT ●
6 Counter02 UINT ●
20 Reset counter 1 USINT ●
ResetCounter01 Bit 5
22 Reset counter 2 USINT ●
ResetCounter02 Bit 5
8192 asy_ModulID UINT ●
8196 asy_SupplyStatus USINT ●
8208 asy_SupplyInput USINT ●

Data sheet V2.25 9

X67DM9321

13.4 Function model 254 - Bus controller

Register Offset1) Name Data type Read Write
Cyclic Acyclic Cyclic Acyclic
Configuration
16 - ConfigIOMask01 USINT ●
20 - ConfigOutput01 (counter channel 1) USINT ●
22 - ConfigOutput02 (counter channel 2) USINT ●
18 - ConfigOutput03 (input filter) USINT ●
Communication
0 0 Input state of digital inputs 1 to 8 USINT ●
DigitalInput01 Bit 0
... ...
DigitalInput08 Bit 7
2 0 Switching state of digital outputs 1 to 8 USINT ●
DigitalOutput01 Bit 0
... ...
DigitalOutput08 Bit 7
30 - Status of digital outputs 1 to 8 USINT ●
StatusDigitalOutput01 Bit 0
... ...
StatusDigitalOutput08 Bit 7
26 - Input latch - Rising edges 1 to 8 USINT ●
InputLatch01 Bit 0
... ...
InputLatch08 Bit 7
28 - Acknowledgment - Input latch 1 to 8 USINT ●
QuitInputLatch01 Bit 0
... ...
QuitInputLatch08 Bit 7
4 - Counter01 UINT ●
6 - Counter02 UINT ●
20 - Reset counter 1 USINT ●
ResetCounter01 Bit 5
22 - Reset counter 2 USINT ●
ResetCounter02 Bit 5
8192 - asy_ModulID UINT ●
8196 - asy_SupplyStatus USINT ●
8208 - asy_SupplyInput USINT ●

1) The offset specifies the position of the register within the CAN object.

13.4.1 Using the module on the bus controller

Function model 254 "Bus controller" is used by default only by non-configurable bus controllers. All other bus
controllers can use additional registers and functions depending on the fieldbus used.
For detailed information, see section "Additional information - Using I/O modules on the bus controller" of the X67
user's manual (version 3.30 or later).

13.4.2 CAN I/O bus controller

The module occupies 1 digital logical slot on CAN I/O.

10 Data sheet V2.25

 X67DM9321

13.5 Configuration

13.5.1 I/O mask 1 to 8

Name:
ConfigIOMask01
Channels are configured as inputs/outputs in this register. It also determines whether output monitoring or filtering
is applied to the channels. Outputs are monitored but not filtered.

Information:
In counter operation, channels 1 to 4 can only be configured as inputs.
Data type Values Bus controller default setting
USINT See bit structure. 0

Bit structure:
Bit Description Value Information
0 Channel 1 configured as input/output 0 Configured as input (bus controller default setting)
1 Configured as output
... ...
7 Channel 8 configured as input/output 0 Configured as input (bus controller default setting)
1 Configured as output

13.5.2 Input filter

An input filter is available for each input. The input delay can be set using register "ConfigOutput03" on page 11.
Disturbance pulses which are shorter than the input delay are suppressed by the input filter.
Input
signal

Time

Signal after tDelay tDelay tDelay

the filter

Time

tDelay ⇒ Input delay

13.5.2.1 Digital input filter

Name:
ConfigOutput03
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since
the input signals are sampled every 200 μs.
Data type Value Filter
USINT 0 No software filter (bus controller default setting)
2 0.2 ms
... ...
250 25 ms - Higher values are limited to this value

Data sheet V2.25 11

X67DM9321

13.5.3 Configuration of Counter Channels 1 and 2

Name:
ConfigOutput01 to ConfigOutput02
ResetCounter01 to ResetCounter02
Counter channels 1 and 2 are configured in this register.
Data type Values Bus controller default setting
USINT See bit structure. 0

Bit structure:
Bit Description Value Information
0-2 Configuration of the counter frequency (only with gate mea- 000 Counter frequency = 48 MHz (bus controller default setting)
surement) 001 Counter frequency = 3 MHz
010 Counter frequency = 187.5 kHz
011 to 111 Reserved
3-4 Reserved 0
5 ResetCounter0x 0 No affect on counter (bus controller default setting)
1 Delete counter
6-7 Configuration of the operating mode 0 Event counter operation (Bus controller default setting)
1 Gate measurement

Event counter operation

The falling edges are registered on the counter input.
The counter status is collected with a fixed offset to the network cycle and transferred in the same cycle.

Gate measurement

Information:
Only one of the counter channels at a time can be used for gate measurement.
The time of rising to falling edges for the gate input is registered using an internal frequency. The result is checked
for overflow (0xFFFF).
The recovery time between measurements must be >100 µs.
The measurement result is transferred with the falling edge to the result memory.

13.6 Communication

13.6.1 Digital inputs

Unfiltered
The input state is collected with a fixed offset to the network cycle and transferred in the same cycle.
Filtered
The filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering
takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.

13.6.1.1 Input state of digital inputs 1 to 8

Name:
DigitalInput01 to DigitalInput08
This register indicates the input state of digital inputs 1 to 8.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalInput01 0 or 1 Input state - Digital input 1
... ...
7 DigitalInput08 0 or 1 Input state - Digital input 8

12 Data sheet V2.25

 X67DM9321

13.6.2 Digital outputs

The output status is transferred to the output channels with a fixed offset in relation to the network cycle (SyncOut).

13.6.2.1 Switching state of digital outputs 1 to 8

Name:
DigitalOutput01 to DigitalOutput08
This register is used to store the switching state of digital outputs 1 to 8.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 DigitalOutput01 0 Digital output 01 reset
1 Digital output 01 set
... ...
7 DigitalOutput08 0 Digital output 08 reset
1 Digital output 08 set

13.6.3 Monitoring status of the digital outputs

On the module, the output states of the outputs are compared to the target states. The control of the output driver
is used for the target state.
A change in the output state resets monitoring for that output. The status of each individual channel can be read.
A change in the monitoring status generates an error message.

13.6.3.1 Status of digital outputs 1 to 8

Name:
StatusDigitalOutput01 to StatusDigitalOutput08
This register is used to indicate the status of digital outputs 1 to 8.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 StatusDigitalOutput01 0 Channel 01: No error
1 Channel 01: Short circuit or overload
... ...
7 StatusDigitalOutput08 0 Channel 08: No error
1 Channel 08: Short circuit or overload

13.6.4 Input latch

It works in the same way as a dominant reset RS flip-flop.

Reset x R S Q State
R 0 0 x Do not change
0 1 1 Set
S Q Latch x 1 0 0 Reset
Input x
1 1 0 Reset
Pos. edge

Data sheet V2.25 13

X67DM9321

13.6.4.1 Input latch - Rising edges 1 to 8

Name:
InputLatch01 to InputLatch08
The rising edges of the input signal can be latched with a resolution of 200 µs in this register. The input latch is
either reset or prevented from latching with register "QuitInputLatch0x" on page 14.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 InputLatch01 0 Do not latch input 1
1 Latch input 1
... ...
7 InputLatch08 0 Do not latch input 8
1 Latch input 8

13.6.4.2 Acknowledgment - Input latch 1 to 8

Name:
QuitInputLatch01 to QuitInputLatch08
This register is used to reset the input latch by channel.
Data type Values
USINT See the bit structure.

Bit structure:
Bit Name Value Information
0 QuitInputLatch01 0 Do not reset input 1
1 Reset input 1
... ...
7 QuitInputLatch08 0 Do not reset input 8
1 Reset input 8

13.6.5 Event counter / Gate measurement

Name:
Counter01 and Counter02
Depending on the mode, this register contains the counter value or gate time of channel 1 and channel 2.
Data type Values
UINT 0 to 65535

13.6.6 Reading the module ID

Name:
asy_ModulID
This register offers the possibility to read the module ID.
Data type Values
UINT Module ID

13.6.7 Operating limit status registers

Name:
asy_SupplyStatus
This register can be used to read the status of the operating limits.
Data type Values
USINT See bit structure.

Bit structure:
Bit Description Value Information
0 I/O power supply within/outside warning limits 0 Within the warning limits (18 to 30 V)
1 Outside of the warning limits (<18 V or >30 V)
1-7 Reserved 0

14 Data sheet V2.25

 X67DM9321

13.6.8 I/O supply voltage

Name:
asy_SupplyInput
This register contains the I/O supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V

13.6.9 Output supply voltage

Name:
asy_SupplyOutput
This register contains the output supply voltage measured by the module.
Data type Values Information
USINT 0 to 255 Resolution 1 V

13.7 Minimum I/O update time

The minimum I/O update time defines how far the bus cycle can be reduced while still allowing an I/O update to
take place in each cycle.
Minimum I/O update time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs

13.8 Minimum cycle time

The minimum cycle time specifies the time up to which the bus cycle can be reduced without communication
errors occurring. It is important to note that very fast cycles reduce the idle time available for handling monitoring,
diagnostics and acyclic commands.
Minimum cycle time
Without filtering 150 μs
With filtering 200 μs
Counter operation 250 µs

Data sheet V2.25 15