MICROCONTROL

LERS
8051
Created By: J.Samrajam
Assistant.professor
JNTUHCEH
Pin Description of the 8051

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 8051 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8) 
Pin Description
• Pin 1-8(port 1,p1.0 to p1.7): These are 8
pins of port 1. Each of these pins can be
configured as input or output.

• Pin 9(Reset): A positive voltage pulse on

this pin resets the microcontroller.
• Pin 10-17(Port3, P3.3 to P3.7): these are dual
function pins. Similar to port 1, each of
these pins can serve as universal input or
output.
• Pin 18,19 (X1 ,X2): These are the input and
output pins of internal oscillator. A quartz crystal is
usually connected to these pins.
• These 2 pins provide external clock.
• Way 1：using a quartz crystal oscillator
• Way 2：using a TTL oscillator

• Pin 20(GND): Ground

• Pin 21-28(Port2,P2.0 to P2.7): If there is no

intention to use external memory then these port
pins are configured as universal input/output. In
case external memory is used then the higher
address byte ie address A8-A15 will appear on this
port.
 Pins of 8051（1/4）
• Vcc（pin 40）：
• Vcc provides supply voltage to the chip.
• The voltage source is +5V.

• Pin 12(INT0): Interrupt 0 input

• Pin 13(INT1): Interrupt 1 input

• Pin 13(T0): Counter 0 clock input

• Pin 14(T1): Counter 1 clock input

• Pin 15(WR): Signal for writing to external

additional RAM
• Pin 16(RD): Signal for reading from external Ram.
 Pins of 8051（3/4）

• EA（pin 31)
• By applying logic 0 to this pin ,P2 and P3 are
used for data and address transmission with no
regards to whether there is internal memory or
not. Otherwise by applying logic 1bto EA pin,
the microcontroller will use both memories, first
internal and afterwards external (if exists) .
• PSEN（pin 29）：program store enable
• If external Rom is used for storing program then
it has logic 0 value every time the
microcontroller reads a byte from memory.
Pins of 8051

• ALE（pin 30）：address latch enable

• It is an output pin and is active high.
• This pin is used when multiple memory chips are
connected to the controller and only one of them needs
to be selected.
Architecture of 8051
Architecture of 8051
The 8051 Architecture consist of these
specific features

 The 8 bit CPU with Registers A and B

 Internal ROM
 16-bit program counter(PC) and data pointer(DPTR)
 Internal RAM of 128 bytes
 8-bit Program Status word(PSW)

 Two 16 bit Counter / timers

 4 eight-bit ports

 3 internal interrupts and 2 external interrupts.

 Control register

 Oscillator and clock circuits.

 A and B CPU Register

 The 8051 contains 34 general purpose or working registers.

Two of these Register A and B.

The immediate result is stored in the accumulator

register (Acc) for next operation.

The B register is a register just for multiplication and

division operation which requires more register spaces
for the product of multiplication and the quotient and
the remainder for the division.
Program status word(PSW)

 The program status word shown in figure.

The PSW contain the math flags, User program flag

F0,and the register select bits that identify which of the
four General-purpose register banks is currently in use
by the program.

The math flags include carry(c),auxiliary carry(AC),

overflow(OV) and parity(p)
Program Status Word (PSW)
The 8051 oscillator and clock

The 8051 requires an external oscillator circuit. The oscillator circuit

usually runs around 12MHz. The crystal generates 12M pulses in one
second.

 A machine cycle is minimum amount time must take by simplest

machine instruction

 An 8051 machine cycle consists of 12 crystal pulses (clock cycle).

The first 6 crystal pulses (clock cycle) is used to fetch the Opcode
and the second 6 pulses are used to perform the operation on the
operands in the ALU.

This gives an effective machine cycle rate at 1MIPS (Million

Instructions Per Second).
Oscillator circuit and timing
 Program counter (PC)

 The program counter points to the address of the next

instruction to be Executed

As the CPU fetches the opcode from the program ROM,
the program counter is increasing to point to the next
instruction.

 The program counter is 16 bits wide

 This means that it can access program addresses 0000

to FFFFH, a total of 64K bytes of code
 Data pointer (DPTR)

 The data pointer is 16 bit register.

It is used to hold the address of the data in the

memory.

The DPTR register can be accessed separately as

lower eight bit(DPL) and higher eight bit (DPH).

It can be used as a 16 bit data register or two

independent data register.
 The stack and
The stack pointer (SP)

 The stack is a section of RAM used by the CPU to store

information temporarily

 This information could be data or an address

The register used to access the stack is called the SP

(stack pointer) register

 The stack pointer in the 8051 is only 8 bit wide.

 Operation of
stack
pop
push

stack pointer

stack
Internal
memory
 128 bytes of RAM.

 Directly addressable range:

00 to 7F hexadecimal.

 Indirectly addressable range:

00 to FF hexadecimal.

 Bit addressable space:

20 to 2F hexadecimal .

 Four register banks:

00 to 1F hexadecimal.
Internal
Memory
 Internal
RAM
The 128 byte internal RAM shown in figure
It is organized into three areas.

1.Working register:
Thirty-two bytes from address 00h to 1Fh that make up 32 working register
organized as Four bank of eight bit each.
 Bits RS0 and RS1 in the PSW determine which bank of register is currently
Is use.
 Bank 0 is selected upon reset

2.Bit addressable:
A bit addressable area of 16 bytes occupies RAM bytes addresses 20h to
2Fh,forming A total of 128 addressable bits.
 An addressable bit may be specified by its bit address of 00h to 7Fh.

3.General purpose:
 A general-purpose RAM area above the bit area,form 30h to 7Fh,addresable
as bytes.
Internal RAM
Organization

Sachin Bhalavat
(9409049436)
 External
memory
External memory is used in some cases when the internal ROM and RAM
memory Available On chip is not sufficient. Two separate are made
available by the 16-bit PC and the DPTR and by different control pins for
enabling external ROM and RAM chips.

If the 128 bytes of internal RAM is insufficient, the external RAM is

accessed by the DPTR. In the 8051 family, external RAM of upto 64 KB can
be added to any chip.
Special Function Register
(SFR)
The SFR (Special Function Register) can be accessed
by their names or by their addresses.

The SFR registers have addresses between 80H

and FFH.

 Not all the address space of 80 to FF is used by SFR.

The unused locations 80H to FFH are reserved and

must not be used by the 8051 programmer.

 There are 21 SFRs.

 Special Function Register
Map
Bit Addressable
F8
F0 B
E8
E0 ACC
D8
D0 PSW
C8
C0
B8 IP
B0 P3
A8 IE
A0 P2
98 SCON SBUF
90 P1
88 TCON TMOD TL0 TL1 TH0 TH1
80 P0 SP DPL DPH PCON
Special Function Register
(SFR)cont..
Special Function Register
(SFR)cont..
 128 byte address space,
directly addressable as 80 to FF
hex.

 16 addresses are bit addressable:

(those ending in 0 or 8).

 This space contains:

Special purpose CPU registers.
I/O ports.
Interrupt control
Timers
serial I/O
Special Function Register
(SFR)cont..
 CPU registers:
- ACC : Accumulator.
-B : B register.
- PSW : Program Status Word.
- SP : Stack Pointer.
- DPTR : Data Pointer (DPH, DPL).

 Interrupt control:
-IE : Interrupt Enable.
-IP : Interrupt Priority.
 I/O Ports:
- P0 : Port 0.
- P1 : Port 1.
- P2 : Port 2.
- P3 : Port 3.
Special Function Register
(SFR)cont..
 Timers:
- TMOD : Timer mode.
- TCON : Timer control.
- TH0 : Timer 0 high byte.
- TL0 : Timer 0 low byte.
- TH1 : Timer 1 high byte.
- TL1 : Timer 1 low byte.

 Serial I/O:
- SCON : Serial port control.
- SBUF : Serial data registers.
 Other:
- PCON : Power control
 I/O
Ports
-Four 8-bit I/O ports.
Port 0
Port 1
Port 2
Port 3

- Most have alternate functions.

- Quasi-bidirectional:
 Port 0
- Port 0 is a dual purpose port, it is located from pin 32 to pin 39
(8 pins).

- To use this port as both input/output ports each pin must be connected
externally to pull-up resistor.
- As an I/O port.
- Alternate functions:
As a multiplexed data bus.
8-bit instruction bus, strobed by PSEN. Low
byte of address bus, strobed by ALE. 8-bit
data bus, strobed by WR and RD.
 Port 1

- Port 1 is a dedicated I/O port from pin 1 to pin 8.

- Upon reset it is configured as outport.
- It is generally used for interfacing to external device
- thus if you need to connect to switches or LEDs, you could make use
of these 8 pins,
- but it doesn’t need any pull- up resistors as it is having internally
- As an I/O port: Standard quasi-bidirectional.
 Port 2

- Like port 0, port 2 is a dual-purpose port.(Pins 21 through 28)

-It can be used for general I/O or as the high byte of the address bus for
designs with external code memory.
- Like P1 ,Port2 also doesn’t require any pull-up resistors
- As an I/O port:
Standard quasi-bidirectional.
- Alternate functions:
High byte of address bus for externalprogram and data memory
accesses.
 Port 3
- Port 3 is also dual purpose but designers generally avoid using this port
unnecessarily for I/O because the pins have alternate functions which
are related to special features of the 8051.
- Indiscriminate use of these pins may interfere with the normal operation
of the 8051.

- As an I/O port:
Standard quasi-bidirectional.
- Alternate functions:
Serial I/O - TXD, RXD
Timer clocks - T0, T1
Interrupts - INT0, INT1
Data memory- RD, WR
 I/O Port
structure
 The internal circuitry for the I/O port is shown in
the figure
 If you want to read in from a pin, you must first
give a logic ‘1’ to the port latch to turn off the
FET otherwise the data read in will always be
logic ‘0’.
 When you write to the port you are actually
writing to the latch e.g. a logic 0 given to the
latch will be inverted and turn on the FET
which cause the port pin to be connected to
I/O Port structure
Diagram

Sachin Bhalavat
(9409049436)
 Timer/Counte
rs
 Two 16-bit up counters, named T0 and T1, are provided for the general use
of the programmer.
Each counter may be programmed to count internal clock pulses, acting as a
timer, or programmed to count external pulses as a counter.

The counters are divided into two 8-bit registers called the timer low
(TL0,TL1) and high (TH0, TH1) bytes.

All counter action is controlled by bit states in the timer mode control register
(TMOD), the timer/counter control register (TCON) and certain program
instructions.

TMOD is dedicated to the two timers and can be consider two duplicate 4-bit
registers, each of which controls the action of the timers.
TCON has control bits and flags for the timers in the upper control bits and
flags for the external interrupts in the lower nibble.
 Timer/Counters(con
t..)
 These timers exist in the SFR area as pairs of 8- bit registers.
– TL0 (8AH) and TH0 (8CH) for Timer0.
– TL1 (8BH) and TH1 (8DH) for Timer1. (LSB is bit 0 ; MSB is bit 7)

When used as timers, the registers are incremented once per

machine cycle. – Each machine cycle is 12 clock cycles.

Count frequency = (system clock frequency) / 12

When used as counters, the registers will be incremented once on

every 1-0 (negative edge) on the appropriate input pin.
• T0 – P3.4
• T1 – P3.5

The pins must be held high for one complete machine cycle and then
low for one complete machine cycle.
Timer/Counters:
Block
Schematic
 Timer/Counters:
Application
The timers can be used for:
1. Interval timing
The timer is programmed to overflow at a regular interval
and set the timer overflow flag. Overflow means reaching
maximum count of FFFFH.

2. Event counting
Determine the number of occurrences of an event.An
event is any external stimulus that provides a 1-to-0
transition on a pin of the µC.
TCON (Counter/Timer Control
Register)
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

- TF1, TF0 : Overflow flags for Timer 1 and Timer 0.

- TR1, TR0 : Run control bits for Timer 1 and Timer 0.

Set to run, reset to hold.

- IE1, IE0 : Edge flag for external interrupts 1 and 0. *

Set by interrupt edge, cleared when interrupt is processed.

- IT1, IT0 : Type bit for external interrupts. *

Set for falling edge interrupts, reset for 0 level interrupts.

* = not related to counter/timer operation.

 TMO
D
GATE C/T M1 M0 GATE C/T M1 M0

Timer 1 Timer 0

- GATE : Permits INTx pin to enable/disable counter.

- C/T : Set for counter operation, reset for timer operation.
M1, M0 : Operating Mode select Bit 1/0. Set/Cleared by
program to select Mode

M1 M0 Mode
0 0 0
0 1 1
1 0 2
1 1 3
 Interrupt
System
 5 Interrupt Sources (in order of priority):
1 External Interrupt 0 (IE0)
2 Timer 0 (TF0)
3 External Interrupt 1 (IE1)
4 Timer 1 (TF1)
5 Serial Port (RI/TI)
 Each interrupt type has a separate vector
address.

 Each interrupt type can be programmed

to one of two priority levels.
 External interrupts can be programmed
for edge or level sensitivity.
Interrupt vector
Addresses
Source Address
IE0 03H
TF0 0BH
IE1 13H
TF1 1BH
RI&TI 23H

The 8051 starts execution at 0000H after Reset.

IE : Interrupt Enable
Register
EA ---- ---- ES ET1 EX1 ET0 EX0

- EA : Global interrupt enable.

- ES : Enable serial port interrupt
- ET1 : Timer 1.
- EX1 : External interrupt 1.
- ET0 : Timer 0.
- EX0 : External interrupt 0.

- 0 = Disabled.
- 1 = Enabled.
IP: Interrupt Priority
Register
----- ----- ----- PS PT1 PX1 PT0 PX0

- PS : Serial interface.
- PT1 : Timer 1.
- PX1 : External interrupt 1.
- PT0 : Timer 0.
- PX0 : External interrupt 0.

- 0 = Low priority.
- 1 = High priority.
Basics of serial
communication
Types of Serial
communications
 RxD and TxD pins in the
8051
The 8051 has two pins for transferring and
receiving data by serial communication.
These two pins are part of the Port3(P3.0
&P3.1)
These pins are TTL compatible and hence
they require a line driver to make them
RS232 compatible
Serial communication is controlled by an 8-
bit register called SCON register, it is a bit
addressable register.
SCON : Serial Control
Register
SMO SM1 SM2 REN TB8 RB8 TI RI

- SM0, SM1 = Serial Mode:

00 = Mode 0 : Shift register I/O expansion.
01 = Mode 1 : 8-bit UART with variable baud rate.
10 = Mode 2 : 9-bit UART with fixed baud rate.
11 = Mode 3 : 9-bit UART with variable baud rate.
- SM2 : It enables the multiprocessor communication feature in Mode 2
& Mode 3
- REN = Enables receiver.
- TB8 = Ninth bit transmitted (in modes 2 and 3).
- RB8 = Ninth bit received:
Mode 0 : Not used.
Mode 1 : Stop bit.
Mode 2,3 : Ninth data bit.
- TI = Transmit interrupt flag.
- RI = Receive interrupt flag.
 SM0 ,
SM1
 These two bits of SCON register determine the
framing of data by specifying the number of bits
per character and start bit and stop bits. There
are 4 serial modes.
SM0 SM
1
0 0 Serial Mode
0
0 1 Serial Mode 8 bit
1, data,
1 stop bit, 1 start bit
1 0 Serial Mode 2
 RE
N
• REN (Receive Enable) also referred as
SCON.4. When it is high,it allows the 8051
to receive data on the RxD pin. So to
receive and transfer data REN must be set
to 1.When REN=0,the receiver is disabled.
This is achieved as below
SETB
SCON.4 &
CLR
SCON.4
 TI ,
RI
• TI (Transmit interrupt) is the D1 bit of SCON
register. When 8051 finishes the transfer of 8-bit
character, it raises the TI flag to indicate that it is
ready to transfer another byte. The TI bit is
raised at the beginning of the stop bit.
• RI (Receive interrupt) is the D0 bit of the SCON
register. When the 8051 receives data serially
,via RxD, it gets rid of the start and stop bits and
places the byte in the SBUF register. Then it
raises the RI flag bit to indicate that a byte has
been received and should be picked up before it
is lost. RI is raised halfway through the stop bit.
 Serial
Interface
 Full duplex UART.
 Four modes of operation:
1.Synchronous serial I/O expansion.
2.Asynchronous serial I/O with variable
baud rate.
3. Nine bit mode with variable baud rate.
4. Nine bit mode with fixed baud rate.
 10 or 11 bit frames.
Registers:
SCON - Serial port control register.
SBUF - Read received data.
- Write data to be transmitted.
PCON - SMOD bit.
 Serial Interface
Modes of
Operation
TXD and RXD are the serial output and input pins (Port 3,
bits 1 and 0).

Mode 0:
Shift Register Mode. Serial data is transmitted/received on
RXD. TXD outputs shift clock. Baud Rate is 1/12 of clock
frequency.

Mode 1:
10-bits transmitted or received. Start (0), 8 data bits (LSB
first), and a stop bit (1). Baud Rate Clock is variable using
Timer 1 overflow or external count input. Can go up to
104.2KHz (20MHz osc.).
 Serial Interface
Modes of
Operation(cont..)
Mode 2:
11-bits transmitted or received. Start (0), 8 data bits
(LSB first), programmable 9th bit, and stop bit (1).
Baud Rate programmable to either 1/32 or 1/64
oscillator frequency (625KHz for 20MHz osc.).

Mode 3:
11-bit mode. Baud Rate variable using Timer 1
overflow or external input. 104.2 KHz max. (20 MHz
osc.).
 Multi-Drop
Communication
Serial Communication Modes 2 and 3 allow one "Master" 8051 to control
several "Slaves":

 The serial port can be programmed to generate an interrupt if the 9th data
bit = 1.

 The TXD outputs of the slaves are tied together and to the RXD input of the
master. The RXD inputs of the slaves are tied together and to the TXD
ouput of the master.

 Each slave is assigned an address. Address bytes transmitted by the

master have the 9th bit = 1.

 When the master transmits an address byte, all the slaves are interrupted.
The slaves then check to see if they are being addressed or not.

 The Addressed slave can then carry out the master's commands.