0% found this document useful (0 votes)
7 views

Es CH 1 Part 3

Uploaded by

320506402078
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
7 views

Es CH 1 Part 3

Uploaded by

320506402078
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 19

INTERRUPTS

When an I/O device needs attention from the microprocessor, it


asserts its interrupt signal to let the microprocessor know.

interrupt request (IRQ), lets the microprocessor know that some

other chip in the circuit wants help.


of its
When the microprocessor detects that signal attached to
a one

interrupt request pins is asserted, it stops executing the sequence of


instructions it was executing, saves the address of the instruction that
would have been next on the stack, and jumps to an interrupt
routine.

19-10 70 AMSojma,xa. d(S93,AUKI (A)


Figure 4.2 Interrupt Hardware

This signal tells the microprocessor


that the serial port chip necds service.

Serial
Port

CPU
TTTTT

Network
Interface Interrup
request pins.

TTTT
This signal tells the microprocessor
that the network chip needs service.

19-10 207
DAMSjaya,est d(I4I, AUKI (A)
Interrupt routines are subroutines that do whatever needs to be
done when the interrupt signal occurs
An interrupt routine is also called as an interrufpt handler o r an

interrupt service routine (ISR)


The last instruction to be executed in an interrupt routine is an

assembly language 'RETURN instruction.


When it gets there, the microprocessor retrieves from the stack the
address of the next instruction it should do (the one it was about to
do when the interrupt occurred) and resumes execution from there.

19-1020 IAMSwnarya,ea. of (S9, AxI (n)


Saving and Restoring the Context
Pushing all of the registers at the beginning of an interrupt routine
saving the context;
poppingthem at the end restoring the context.
Failing to do these operations properly can cause troublesome bugs.

Disabling Interrupts
Almost every system allows to disable interrupts.
most 1/0 chips allow program to tell them not to interrupt, even if
they need the microprocessor's attention by stopping the interrupt
signal at the source.

12-1002 IAM.Swjarya,Iept. of (SBT,AKI (A)


instruction can be used to tell the
A single assembly-language
microprocessor to ignore all interrupt requests and
a correspOonding
way to tell it to start paying attention again.
Most microprocessors have a nonmaskable interrupt, an input pin
that causes an interrupt that cannot be disabled.

There are times when it is necessary to disable that interrupt.


But Nonmaskable interrupt cant be disabled
So nonmnaskable interrupt is most commonly used for events that are
completely beyond the normal range of the ordinary processing
(power failure)

19-1020 AMSmjarya,I*pt. of (S*ST, AUKI (A)


Microprocessors allow software to disable interrupts (except
nonmaskable interrupt) when software has critical processing to do.
Some microprocessors use priority mechanism in addition to
enabling and disabling individual interrupts
by assigning a priority to each interrupt request signal and allow thee
program to specify the priority of the lowest priority interrupt that it
is willing to handle at any
given time.
Then it can disable all interrupts (except nonmaskable
interrupt) by
setting the acceptable priority higher than that of any interrupt.
It can enable all interrupts by setting
acceptable priority very low

19-10702 IAMSowijarya,Irpt. of (S&S,AUKI (A)


SOME COMMON QUESTIONS
How does the microprocessor know where to find the internupt routine when the interrupt
ocCurS? This depends on the microprocessor, and
you'll have to look at the
manual to find. out how your
microprocessor does it. Some microprocessors
assume that the
interrupt service routine is at a fixed location. For example, if
an 1/O
chip signals an Intel 8051 on its first interrupt request pin, the 8051
assumes that the
interrupt routine is at location 0x0003. It becomes your job to
make sure that the interrupt routine is there. Other microprocessors have more
sophisticated methods. The most typical is that a table somewhere in memory
Contains interrupt vectors, the addresses of the inter rupt routines. When an
interrupt occurs, the microprocessor will look up the address of the interrupt
routine in this interrupt vector table. Again, it is
your job to set up that table
properly.
Hor do microprocessors that use an intemupt vector table know where the table is? Again,
this depends upon the microprocessor. In some, the table is always at the same
location in nemory, at Ox00000 for the Intel 80186, for example. In others,
the microprocessor provides your program with some way to tell it where the
table is.
19-10-202 DAMSowjanya,Dept of (S8SI,AUI (A)
Can a microprocessor be internipted in the middle of an instruction? Usually not. In
almost every case, the microprocessor will finish the instruction that it is working
on before jumping to the interrupt routine. The most common exceptions are
those single instructions that move a lot of data from place to place. Both the
Zilog Z80 and the Intel x86 families ofmicroprocessors, for example, have single
instructions that move potentially thousands of bytes of data. These instructions
can be interrupted at the end of transferring a single byte or word and will
resume where they left off when the interrupt routine returns.
If two intem1pts happen at the same time, which interrupt routine does the microprocessor
do first? Almost every microprocessor assigns a priority to each interrupt signal,
and the microprocessor will do the interrupt routine associated with the higher-
priority signal first. Microprocessors vary all over the map when it comes to how
your program can control the priorities of the interrupts.
Can an interupt request signal interrupt another internupt routine? On most rnicro-
processors, yes. On some microprocessors it is the default behavior; on others,
you have to put an instruction or two into your interrupt routines to allow
this interrupt nesting. The Intel x86 microprocessors, for example, disable
all interrupts automatically whenever they enter any interrupt routine; there-
fore, the interrupt routines must reenable interrupts to alow interrupt nesting

19-10-202) DEAM.Sowjaya,Dept. ofSAST,AUKI (A)


What happens if an internupt is signaled while the internupts are disabled? In most cases
the microp rocessor will remember the interrupt until interrupts are reenabled,
at which point it will jump to the interrupt routine. If more than one interrupt
is signaled while interrupts are disabled, the microp rocessor will do them in
priority order when interrupts are reenabled. Interrups, therefore, are not really
disabled; they are merely deferred.
What happens if I disable intemupts and then forget to reenable them? The micro
processor will execute no more interrupt routines, and any procesSing in your

system that depends upon interrupt routines which is usually all processing in
an embedded system--will grind to a halt.
What happens ifI disable internupts when they are already. disabled or enable interupts
when they are already enabled? Nothing.
Are intemupts enabled or disabled when the microprocessor first starts up? Disabled.
Can I write my interrupt usually. Most com1pilers used for
routines in C? Ys,
embed ded-systems code recognize a nonstandard keyword that allows you to
tell the compiler that a particular function is an interrupt routine. For example:

19-102022 DxAMSowijuya,Dept of (SAST,AUCE (A)


THE SHARED-DATA PROBLEM
When interrupts are used, the interrupt routines need to communicate
with the rest of the code.
Therefore, interrupt routines need to signal the task code to do
follow-up processing
So they must share one or more variables to communicate with one
another.

Eg:Nuclear reactor monitoring system code monitors two


temperatures, which are always supposed to be equal. If they differ it
indicates a malfunction in the reactor.

19-10 702 IAMSwaya,Iept. o(S&,AKI (A)


Figure 4.4 Classic Shared-Data Problem
static int iTemperatures(2] :

void interrupt vRea d Temperatures (void)

1Temperatures[0]- !! read in value from hardware


Temperatures [1]- !! read in value from hardware

void main (voi1d)

1 Templ
1nt iTempo. :
while ( TRUE

i Tempo 1Temperatures[0J:
i Femp1 Temperatures[1]:
-

f (1Temp0 ! 1 Temp1)
I! Set off howl ing alarm;

Problem - It sets off the alarm even though the two measured temperatures are same.

19-10 207 DAMSojanya,Ipt o (SEST, AUKI (A)


Characteristics of the Shared-Data Bug
the i Temperatures array is shared between the interrupt routine and
the task code.
I f theinterrupt just happens to occur while the main routine is using
ilemperatures, then the bug shows itself.
Bugs such as these are difficult to find, because they do not happen
every time the code runs.
the bug appears only if the interrupt occurs between the two critical
instructions. If the interrupt occurs at any other time, then the program
works perfectly.

19-10207 DAMSojaya,U*t. d(3&,AUI (A) 13


Bugs such as this are famous for occurring at times - 5 o'clock in the
afternoon, usually on Friday,Any time you are not paying very much
attention, Whenever no debugging equipment is attached to the system,
After your product has landed on Mars, during customer demos.
Because these bugs often show themselves only rarely and are
therefore difficult to find, it pays to avoid putting these bugs into your
code in the first place.

Whenever an interrupt routine and your task code share data, be


suspicious and analyze the situation to ensure that you do not have a
shared data bug.

19-10-2022 AMSwjanya, I ga. of(S8,AUXa (y


Solving the Shared-Data Problem
Disable interrupts whenever your task code uses the shared data.

.Ifdisable function disables interrupts and enable function enables


interrupts, then the code has no bug.The hardware can assert the
interrupt signal requesting service, but the microprocessor will not jump
to the interrupt routine while the interrupts are disabled.

C compilers for embedded systems commonly have functions in their


libraries to disable and enable interrupts. In assembly language, you can
invoke instructions that enable and disable interrupts.
no C compilers or assemblers are smart enough to figure out when it is
necessary to disable interrupts. So recognize the situations and write
explicit code when interrupts must be disabled.
19-102022 IAMSjarya,eya. f (SAST, AxI (A)
Figure 4.7 Disabling interupts Solves the Shared Data Problem from Figure 4.4
static 1nt Temperatures[2]:

void interrupt vReadTemperatures (vofd)

Temperaturest0] - !! read in valve from har dware


Temperatures[1] -
!! read in valve from hardware

void mafn (void)

int 1Temp0. 1Temp1

wh1le (TRUE)

disable (): /* 01sable interrupts whfle we use the array


*
Temp0 1Temperatures[0J:
1Tempi 1Temperatures[1J:
enable ();

1f (1Temp0 ! 1Temp1)
!!Set off howling alarm;

16
12-10200) DAM.Sowjanya,Irgt. d(S&T, AUKI(A)
Atomic and Critical Section
Atomic -A part of a program which cannot be interrupted.
Shared-data problem arises when an interrupt routine and the task
code share data, and the task code uses the shared data in a way that is
not atomic. Disable interrupts around lines of task code that use shared
data, that collection of lines becomes atomic, and problem is solved.
To solve its shared-data problem, the nuclear reactor program need only
disable the interrupt that reads temperatures. If other interrupts change
other data (time of day, water pressures, steam pressures) while the task
code is working with the temperatures, that will cause no problem.
Critical section -A set of instructions that must be atomic for the
system to work properly.
12-10 2072 IAMSjzya,Ipt d(S8,AUXI (A)
Figure 4.9 Interrupts with a Timer

static 1nt 1Seconds. iMinutes. 1Hours


vofd interrupt vUpdateTime (void)

+1 Seconds:
if (iSeconds 60)

iSeconds 0 :
++iNinutes:
if (iM nutes >- 60)

1Minutes-0 :
+ Hours:
1f (1Hours >- 24)
Hours-0;

!!Do whatever needs to be done to the hardware

1ong 1SecondsSinceMidnight (void)


return ((GHours 60) iMinutes)*60) 1Seconds):
19-10 7022 AMSwjarya,1pt of (SST, AUKT (A)
Another example is where the function ISecondsSinceMidnight returns
the number of seconds since midnight.
A hardware timer asserts an interrupt signal every second, which causes
the microprocessor to run the interrupt routine vUpdate Time to
update the static variables that keep track of the time.
Bug- If the hardware timer interrupts while microprocessor is doing the
arithmetic in ISecondsSinceMidnight, then the result might be wrong.
Solution - Disable interrupts while function does its calculation.

But that does not work ifISecondsSinceMidnight is called from within


a critical section somewhere else in the
program, as it will cause a bug by
enabling interrupts in the middle of that other critical section

191070 AMSowjaya,Dept od (S8ST,AUXI (A) 1


volatile Keyword
Most compilers that a value stays in memory unless the program
assume

changes it, and they use that assumption for optimization.


This can cause problems as sometimes up the values
compilers mess

The 'volatile'keyword, warns the compiler that an interrupt routine


might change the value of a variable so that the compiler will not
optimize your code in a way that will make it sail.
static volatile long int ISecondsToday;
Now knows that the microprocessor must read the value of
compiler
SecondsToday from memory every time it is referenced.
The compiler is not allowed to optimize reads writes. If your
or
compiler
doesn't support this koyword, turn off compiler optimizations.
19-10 2022
AM.Swjaa,Da. d(S8,AUKI(A) 70

You might also like