Scribd
Upload
42 views

Ldco Unit 5 Notes

Uploaded by

chandanavanjari
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
42 views

Ldco Unit 5 Notes

Uploaded by

chandanavanjari
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 23

Unit 5- Processor Instructions &Processor

Enhancements
Module 3: Key Characteristics of RISC and CISC and
Instruction Pipelining

Instructor
Dr. R. S. Khule,
Department of Information Technology,
Matoshri College of Engineering and Research
Centre, Nashik.
Recap

• We have discussed about the addressing modes

2
Module Objectives
• To understand the key characteristics of RISC and CISC machine
• To understand the concept and strategy of instruction pipelining

3
Module Outcomes
• Explain the key characteristics of RISC and CISC
machine
• Compare RISC and CISC
• Explain the operation of instruction pipelining
• Explain the instruction pipelining hazard
Major Advances in Computers(1)
• The family concept
– IBM System/360 1964
– DEC PDP-8
– Separates architecture from implementation
• Micro programmed control unit
– Idea by Wilkes 1951
– Produced by IBM S/360 1964
• Cache memory
– IBM S/360 model 85 1968
• Pipelining
– Introduces parallelism into fetch execute cycle
• Multiple processors
The Next Step - RISC

• Reduced Instruction Set Computer

• Key features
– Large number of general purpose registers
– or use of compiler technology to optimize register use
– Limited and simple instruction set
– Emphasis on optimising the instruction pipeline
RISC and CISC
• The main idea is to make hardware simpler by using an
instruction set composed of a few basic steps for loading,
evaluating and storing operations just like a load command will
load data, store command will store the data.
• Complex Instruction Set Architecture (CISC) –
The main idea is that a single instruction will do all loading,
evaluating and storing operations just like a multiplication
command will do stuff like loading data, evaluating and storing
it, hence it’s complex.
• Both approaches try to increase the CPU performance
• RISC: Reduce the cycles per instruction at the cost of the
number of instructions per program.
• CISC: The CISC approach attempts to minimize the number of
instructions per program but at the cost of increase in number
of cycles per instruction.
RISC and CISC
• Earlier when programming was done using assembly
language, a need was felt to make instruction do more task
because programming in assembly was tedious and error
prone due to which CISC architecture evolved but with rise up
of high level language dependency on assembly reduced RISC
architecture prevailed.
Why CISC ?

• Compiler simplification?
– Disputed…
– Complex machine instructions harder to exploit
– Optimization more difficult
• Smaller programs?
– Program takes up less memory but…
– Memory is now cheap
– May not occupy less bits, just look shorter in symbolic
form
• More instructions require longer op-codes
Why CISC (2)?

• Faster programs?
– Bias towards use of simpler instructions
– More complex control unit
– Micro program control store larger
– thus simple instructions take longer to execute
RISC Characteristics

• One instruction per cycle


• Register to register operations
• Few, simple addressing modes
• Few, simple instruction formats
• Hardwired design (no microcode)
RISC v CISC

• Not clear cut


• Many designs borrow from both philosophies
• e.g. PowerPC and Pentium II
Pipelining
Two Stage Instruction Pipeline

Instruction Cycle
(with Interrupts) -
State Diagram
Pipelining

• Fetch instruction
• Decode instruction
• Calculate operands (i.e. EAs)
• Fetch operands
• Execute instructions
• Write operand

• Overlap these operations


Timing Diagram for
Instruction Pipeline Operation
Pipelining
The Effect of a Conditional Branch on Instruction Pipeline
Operation
Six Stage
Instruction Pipeline
Alternative Pipeline Depiction
Summary
• In this module we have discussed about key characteristics of
RISC and CISC and Instruction pipelining

22
Assignment

• Explain the key characteristics of RISC and CISC machine


• Compare RISC and CISC
• Explain the operation of instruction pipelining with diagram
• Explain the instruction pipelining hazard
• In next session i.e. Module 4 of Unit 5, we will learn about
multiprocessor systems
Thank You

You might also like