0% found this document useful (0 votes)
16 views

Home Assignment - 2-2024

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
16 views

Home Assignment - 2-2024

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

Home Assignment – 2

Due Date: 04/11/2024 at 11:59pm


Note:
1. Only submit through Moodle.
2. No hardcopy will be accepted
3. Follow the deadline (It will not be accepted after the deadline)

Q – 1: [10 marks] Various measurements are made on an NMOS amplifier for which the drain resistor RD
is 20 kΩ. First, dc measurements show the voltage across the drain resistor, VRD, to be 2 V and the gate-to-
source bias voltage to be 1.2 V. Then, ac measurements with small signals show the voltage gain to be −10.
What is the value of VT for this transistor? If the process transconductance parameter (µnCox) is 50 μA/V2,
what is the MOSFET’s W/L?

Q – 2: [15 marks] For the circuits (a), (b), and (c), μnCox = 2.5 μpCox = 20 μA/V2, |VT| = 1V, λ = 0, L =
10 μm, and W = 30 μm, unless otherwise specified. Find the labeled currents and voltages

W = 75 µm

Q – 3: [20 marks] Following figure shows an amplifier in which the load resistor RD has been replaced with
another NMOS transistor Q2 connected as a two-terminal device. Note that because VDG of Q2 is zero, it
will be operating in saturation at all times even when vI =0, and iD2 = iD1 =0. Note also that the two transistors
conduct equal drain currents. Using iD1 = iD2, show that for the range of vI over which Q1 is operating in
saturation, that is, for (Vt1 ≤ vI ≤ vO + Vt1), the output voltage will be given by:
where we have assumed Vt1 = Vt2 = Vt . Thus the circuit functions as a linear amplifier, even for large input
signals.
Finally, for (W/L)1 = ( 50μm/0.5 μm) and (W/L)2 = ( 5μm/0.5 μm), find the voltage gain.

Q – 4: [15 marks] An NMOS amplifier is to be designed to provide a 0.50-V peak output signal across a
50-kΩ load that can be used as a drain resistor. If a gain of at least 5 is needed, what gm is required? Using a
dc supply of 3 V, what values of ID and VOV would you choose? What W/L ratio is required if μnCox = 100
μA/V2? If VT = 0.8 V, find VGS.
Q – 5: [20 marks] Following figure shows a discrete-circuit amplifier. The input signal vsig is coupled to the
gate through a very large capacitor (shown as infinite). The transistor source is connected to ground at signal
frequencies via a very large capacitor (shown as infinite). The output voltage signal that develops at the drain
is coupled to a load resistance via a very large capacitor (shown as infinite).
a) If the transistor has VT = 1 V, and = 2 mA/V2, verify that the bias circuit establishes VGS = 2 V,
ID = 1 mA, and VD = +7.5 V. That is, assume these values, and verify that they are consistent
with the values of the circuit components and the device parameters.
b) Find gm and ro if VA = 100 V.
c) Draw a complete small-signal equivalent circuit for the amplifier, assuming all capacitors behave
as short circuits at signal frequencies
d) Find Rin, vgs/vsig, vo/vgs, and vo/vsig.
Q -6: [20marks] Using a 6V supply with an NMOS transistor for which VT = 1.2 V, μnCox= 3.2 mA/V2
and λ = 0, provide a design that biases the transistor at ID = 2 mA, with VDS large enough to allow saturation
operation for a 2V negative signal swing at the drain. Use 22 MΩ as the largest resistor in the feedback-bias
network. What values of RD, RG1, and RG2 have you chosen? Specify all resistors to two significant digits.

You might also like