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Dinh Duc Anh Vu

International University – VNU HCM

 Boolean algebra
◦ Algebraic simplification
 Designing combinational circuits
 Karnaugh map simplification
 Useful combinational circuits

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 Understanding and applying Boolean algebra in

designing logic circuits
 Convert a logic expression into a sum-of-
products expression.
 Perform the necessary steps to reduce a sum-
of-products expression to its simplest form.
 Use Boolean algebra and the Karnaugh map as
tools to simplify and design logic circuits.
 Design simple logic circuits without the help of
a truth table.
 Implement enable/disable circuits.

Boolean algebra & Combinational circuits 3

Algebra for Logic Circuits

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 The dual of an expression is obtained by

exchanging (• and +), and (1 and 0) in it,
provided that the precedence of operations
is not changed.
 Cannot exchange 𝑥 with 𝑥ҧ

 Example:
◦ 𝐹 𝑥, 𝑦, 𝑧 = 𝑥.ҧ 𝑦. 𝑧ҧ + 𝑥.ҧ 𝑦.
ത𝑧
◦ Find 𝐻(𝑥, 𝑦, 𝑧), the dual of F
𝐻 𝑥, 𝑦, 𝑧 = 𝑥ҧ + 𝑦 + 𝑧ҧ . 𝑥ҧ + 𝑦ത + 𝑧

Boolean algebra & Combinational circuits 5

 Let X: boolean variable, and 0,1: constants

1. X + 0 = X -- Zero Axiom
2. X • 1 = X -- Unit Axiom
3. X + 1 = 1 -- Unit Property
4. X • 0 = 0 -- Zero Property
5. X + X = X -- Idempotence
6. X • X = X -- Idempotence
7. X + X’ = 1 -- Complement
8. X • X’ = 0 -- Complement

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 Covering theorem:
◦ 𝑥+𝑥∙𝑦 =𝑥
◦ 𝑥 ∙ (𝑥 + 𝑦) = 𝑥

 Consensus theorem:
◦ 𝑥 ∙ 𝑦 + 𝑥ҧ ∙ 𝑧 + 𝑦 ∙ 𝑧 = 𝑥 ∙ 𝑦 + 𝑥ҧ ∙ 𝑧
◦ 𝑥 + 𝑦 𝑥ҧ + 𝑧 𝑦 + 𝑧 = (𝑥 + 𝑦)(𝑥ҧ + 𝑧)

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 Unlike truth tables, expressions x y z F G

representing a Boolean function 0 0 0 1 1
are NOT unique.
0 0 1 0 0
 Example:
◦ 𝐹 𝑥, 𝑦, 𝑧 = 𝑥ҧ 𝑦ത𝑧ҧ + 𝑥𝑦
ҧ 𝑧ҧ + 𝑥𝑦𝑧ҧ 0 1 0 1 1
◦ 𝐺 𝑥, 𝑦, 𝑧 = 𝑥ҧ 𝑦ത𝑧ҧ + 𝑦𝑧ҧ 0 1 1 0 0
The corresponding truth tables

1 0 0 0 0
for F() and G() are to the right.
They are identical! 1 0 1 0 0
 Thus, F() = G() 1 1 0 1 1
1 1 1 0 0
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 In order to design a cost-effective and efficient circuit, we must

minimize the circuit’s size (area) and propagation delay (time
required for an input signal change to be observed at the output
line)
 Observe the truth table of 𝐹 = 𝐴 + 𝐵𝐶 + 𝐴𝐵 and 𝐺 = 𝐴 + 𝐵𝐶
 Truth tables for F and G are identical, i.e. same function
 Use G to implement the logic circuit (less components)
C A B C F G
0 0 0 1 1
A F 0 0 1 1 1
0 1 0 1 1
B
0 1 1 1 1
C 1 0 0 0 0
B 1 0 1 0 0
A G
1 1 0 1 1
1 1 1 0 09

 Both circuits perform the same logic, so it should be

obvious that the simpler circuit is more desirable because
it contains fewer gates and will therefore be smaller and
cheaper than the original.
 Furthermore, the circuit reliability will improve because
there are fewer interconnections that can be potential
circuit faults

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 Boolean algebra is a useful tool for simplifying

digital circuits.
 Why do it? Simpler can mean cheaper, smaller,
faster.
 It is not always obvious which theorems should be
applied to produce the simplest result
 Two essential steps:
◦ The original expression is put into SOP form by repeated
application of De Morgan’s theorems and multiplication of
terms.
◦ Once the original expression is in SOP form, the product
terms are checked for common factors, and factoring is
performed wherever possible. The factoring should result
in the elimination of one or more terms.

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𝑧 = 𝐴𝐵𝐶 + 𝐴𝐵 𝐴 𝐶 = 𝐴𝐵𝐶 + 𝐴𝐵 𝐴 + 𝐶
= 𝐴𝐵𝐶 + 𝐴𝐵 𝐴 + 𝐶 = 𝐴𝐵𝐶 + 𝐴𝐵𝐴 + 𝐴𝐵𝐶 = 𝐴𝐵𝐶 + 𝐴𝐵 + 𝐴𝐵𝐶
= 𝐴𝐶 𝐵 + 𝐵 + 𝐴𝐵 = 𝐴𝐶 + 𝐴𝐵 = 𝐴(𝐶 + 𝐵)

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 Simplify 𝐹 = 𝑥𝑦𝑧 + 𝑥𝑦𝑧 + 𝑥𝑧

𝐹 = 𝑥𝑦𝑧 + 𝑥𝑦𝑧 + 𝑥𝑧
= 𝑥𝑦 𝑧 + 𝑧 + 𝑥𝑧
= 𝑥𝑦 1 + 𝑥𝑧
= 𝑥𝑦 + 𝑥𝑧
 Simplify 𝐹 = 𝑥𝑦𝑧 + 𝑥𝑦(𝑥 𝑧)
𝐹 = 𝑥𝑦𝑧 + 𝑥𝑦 𝑥 𝑧 = 𝑥𝑦𝑧 + 𝑥𝑦 𝑥 + 𝑧
= 𝑥𝑦𝑧 + 𝑥𝑦(𝑥 + 𝑧) = 𝑥𝑦𝑧 + 𝑥𝑦 + 𝑥𝑦𝑧
= 𝑥𝑧 𝑦 + 𝑦 + 𝑥𝑦 = 𝑥𝑧 + 𝑥𝑦
= 𝑥(𝑧 + 𝑦)

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 Prove 𝑥ҧ 𝑦ത𝑧ҧ + 𝑥𝑦
ҧ 𝑧ҧ + 𝑥𝑦𝑧ҧ = 𝑥ҧ 𝑧ҧ + 𝑦𝑧ҧ
 Proof:
𝑥ҧ 𝑦ത𝑧ҧ + 𝑥𝑦
ҧ 𝑧ҧ + 𝑥𝑦𝑧ҧ
=𝑥ҧ 𝑦ത𝑧ҧ + 𝑥𝑦ҧ 𝑧ҧ + 𝑥𝑦
ҧ 𝑧ҧ + 𝑥𝑦𝑧ҧ
=𝑥ҧ 𝑧(ҧ 𝑦ത + 𝑦) + 𝑦𝑧(ҧ 𝑥ҧ + 𝑥)
=𝑥ҧ 𝑧ҧ + 𝑦𝑧ҧ
QED.

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 𝑧 = 𝐴𝐶 𝐴𝐵𝐷 + 𝐴𝐵𝐶 𝐷 + 𝐴𝐵𝐶

 𝑧 = 𝐵𝐶 + 𝐴𝐷(𝐵 + 𝐶)

 𝑡 = (𝐴 + 𝐵)(𝐴 + 𝐵)
 𝑡 = 𝐴𝐵 + 𝐴𝐵

 𝑥 = (𝐴 + 𝐵)(𝐴 + 𝐵 + 𝐷)𝐷
 𝑥 = 𝐵𝐷

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 The complement of a function is derived by

interchanging (• and +), and (1 and 0), and
complementing each variable.
 Otherwise, interchange 1s to 0s in the truth
table column showing F.
 The complement of a function IS NOT THE
SAME as the dual of a function.

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 Find the complement of 𝐹 = 𝑥𝑦ത𝑧ҧ + 𝑥𝑦𝑧 ҧ

 G = F’ = 𝑥 𝑦ത𝑧ҧ + 𝑥𝑦𝑧 ҧ
= 𝑥 𝑦ത𝑧ҧ ∙ 𝑥𝑦𝑧
ҧ DeMorgan
= (𝑥ҧ + 𝑦 + 𝑧)(𝑥 + 𝑦ത + 𝑧)ҧ DeMorgan

 Note: The complement of a function can also

be derived by finding the function’s dual,
and then complementing all of the literals

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 Literal: A variable or its complement

 Product term: literals connected by •
 Sum term: literals connected by +
 Minterm: a product term in which all the
variables appear exactly once, either
complemented or uncomplemented
 Maxterm: a sum term in which all the
variables appear exactly once, either
complemented or uncomplemented

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 A switching function can be represented by

several different, but equivalent, algebraic
expressions.
◦ There are two standard forms
 SOP (sum of product)
 POS (product of sum)
◦ The standard form is a unique algebraic
representation of each function
 Canonical form

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 For an n-variable function, a minterm is a product term

of n variables in complemented or un-complemented
form.
◦ If the variable’s value is 0 → complemented form.
◦ If the variable’s value is 1 → un-complemented form.
 With n variables → 2n minterms
 Symbol for minterm: mi , whereas i is the decimal
equivalent of the minterm’s corresponding binary
combination (bi)
◦ Example: Assume 3 variables (A,B,C), and i=3. Then, bi = 011
and its corresponding minterm is denoted by 𝑚𝑖 = 𝐴𝐵𝐶
 If A, B and C are the input variables, the minterms are:
𝐴ҧ𝐵ത 𝐶,ҧ 𝐴ҧ𝐵𝐶,
ത 𝐴𝐵ҧ 𝐶,ҧ 𝐴𝐵𝐶,
ҧ 𝐴𝐵ത 𝐶,ҧ 𝐴𝐵𝐶,
ത 𝐴𝐵 𝐶,ҧ 𝐴𝐵𝐶
 Represents exactly one combination in the truth table

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 For an n-variable function, a maxterm is a sum term of n

variables in complemented or un-complemented form.
◦ If the variable’s value is 1 → complemented form.
◦ If the variable’s value is 0 → un-complemented form.
 With n variables → 2n maxterms
 Symbol for maxterm: Mi , whereas i is the decimal equivalent
of the maxterm’s corresponding binary combination (bi)
◦ Example: Assume 3 variables (A,B,C), and i=3. Then, bi = 011 and its
corresponding maxterm is denoted by 𝑀𝑖 = 𝐴 + 𝐵 + 𝐶
 If A, B and C are the input variables, the maxterms are: (𝐴ҧ +
ҧ (𝐴ҧ + 𝐵ത + 𝐶), (𝐴ҧ + 𝐵 + 𝐶),
𝐵ത + 𝐶), ҧ (𝐴ҧ + 𝐵 + 𝐶), (𝐴 + 𝐵ത + 𝐶),
ҧ (𝐴 +
ത ҧ
𝐵 + 𝐶), (𝐴 + 𝐵 + 𝐶), (𝐴 + 𝐵 + 𝐶)
 Represents exactly one combination in the truth table

Boolean algebra & Combinational circuits 21

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 The complement of minterm is maxterm and

vice versa
𝑚𝑖 = 𝑀𝑖
𝑀𝑖 = 𝑚𝑖

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 Express a Boolean function

Whereas
◦ mi is the ith minterm
◦ Fi is the F-function’s value corresponding to the ith
minterm

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 Express the following functions in the

Standard SOP
◦ 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷
 Already in standard SOP form
◦ 𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐶 + 𝐴𝐵
𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐶 𝐵 + 𝐵 + 𝐴𝐵 𝐶 + 𝐶
𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶
◦ 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = (𝐴 + 𝐵)(𝐴 + 𝐶)
𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐴𝐴 + 𝐴𝐶 + 𝐴 𝐵 + 𝐵𝐶
𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐴𝐶 + 𝐴 𝐵 + 𝐵𝐶=…

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 Write the expression form of the following

functions
 𝐹 𝐴, 𝐵, 𝐶 = σ(1,4,5,6)
𝐹 𝐴, 𝐵, 𝐶 = 𝐴 𝐵𝐶 + 𝐴𝐵 𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶

 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = σ(1,4,5,6)
𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐴 𝐵 𝐶𝐷 + 𝐴𝐵𝐶 𝐷 + 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷

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 Express a Boolean function

whereas
◦ mi is the ith maxterm
◦ Fi is the F-function’s value corresponding to the ith
maxterm

Boolean algebra & Combinational circuits 27

 Write the expression form of the following

functions
 𝐹 𝐴, 𝐵, 𝐶 = ς(1,4,5,6)
𝐹 𝐴, 𝐵, 𝐶
= (𝐴 + 𝐵 + 𝐶)(𝐴 + 𝐵 + 𝐶)(𝐴 + 𝐵 + 𝐶)(𝐴 + 𝐵 + 𝐶)

 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = σ(1,4,5,6)
𝐹 𝐴, 𝐵, 𝐶, 𝐷
= (𝐴 + 𝐵 + 𝐶 + 𝐷)(𝐴 + 𝐵 + 𝐶 + 𝐷)(𝐴 + 𝐵 + 𝐶
+ 𝐷)(𝐴 + 𝐵 + 𝐶 + 𝐷)

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 Transform the function F into the standard

form 2
 𝐹 𝐴, 𝐵, 𝐶 = σ(0,2,3,7)

𝑀𝑖 = 𝑚𝑖
𝐹 𝐴, 𝐵, 𝐶 = ෍(0,2,3,7) = ෑ(7,5,4,0)

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 For an n-variable function, a minterm is a product term of n

variables in complemented or un-complemented form.
◦ If the variable’s value is 0 → complemented form.
◦ If the variable’s value is 1 → un-complemented form.
 Symbol for minterm: mi , whereas i is the decimal equivalent
of the minterm’s corresponding binary combination (bi)
 A maxterm is a sum term of n variables in complemented or
un-complemented form.
◦ If the variable’s value is 1 → complemented form.
◦ If the variable’s value is 0 → un-complemented form.
 Symbol for maxterm: Mi , whereas i is the decimal equivalent
of the maxterm’s corresponding binary combination (bi)
 The complement of minterm is maxterm and vice versa
◦ 𝑚𝑖 = 𝑀𝑖
◦ 𝑀𝑖 = 𝑚𝑖
 Represents exactly one combination in the truth table

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 Transform the expression form into Standard

SOP.
 Fill values “1” in the rows having the binary
combinations equals to the minterm indices
of the expression. The other rows will have
F=0.

Boolean algebra & Combinational circuits 31

 Write the truth table of the following function

𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐶 + 𝐴𝐵
We have
𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐶 + 𝐴𝐵
= 𝐴𝐶 𝐵 + 𝐵 + 𝐴𝐵 𝐶 + 𝐶
= 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶
= ෍(7,5,3,2)

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 Transform the expression form into Standard

POS.
 Fill values “0” in the rows having the binary
combinations equals to the maxterm indices
of the expression. The other rows will have
F=1.

Boolean algebra & Combinational circuits 33

 Write the truth table of the following function

𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐶 + 𝐴𝐵

𝐹 𝐴, 𝐵, 𝐶 = 𝐴𝐶 + 𝐴𝐵
= 𝐴+𝐴 𝐴+𝐵 𝐶+𝐴 𝐶+𝐵 (dual of the distributive law)
= 𝐴+𝐵 𝐶+𝐴 𝐶+𝐵
= 𝐴 + 𝐵 + 𝐶𝐶 𝐶 + 𝐴 + 𝐵𝐵 𝐶 + 𝐵 + 𝐴𝐴
= 𝐴+𝐵+𝐶 𝐴+𝐵+𝐶 𝐶+𝐴+𝐵 𝐶+𝐴+𝐵 𝐶+𝐵+𝐴 𝐶+𝐵+𝐴
= 𝐴+𝐵+𝐶 𝐴+𝐵+𝐶 𝐶+𝐴+𝐵 𝐶+𝐴+𝐵
= ෑ(0,1,4,6)

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Boolean algebra & Combinational circuits 35

 Example: Write the algebraic form of the

following function

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 Example: Write the algebraic form of the

following function

Boolean algebra & Combinational circuits 37

 In practical, there are some cases in which

the binary combinations of variables does
not exist. Thus, the output (the value of the
function) corresponding to these binary
combinations can be 0 or 1 (called “don’t
care”), symbol “d”. When filling in the Truth
Table for the “don’t care” cases, the symbol
“x” is used.

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 Example: build Truth table for F

Boolean algebra & Combinational circuits 39

 Example: build Truth table for F

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Boolean algebra & Combinational circuits 41

Any logic problem can be solved using the

following step-by-step procedure.
1. Interpret the problem and set up a truth
table to describe its operation.
2. Write the AND (product) term for each case
where the output is 1.
3. Write the sum-of-products (SOP)
expression for the output.
4. Simplify the output expression if possible.

5. Implement the circuit for the final,

simplified expression.
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 Problem: A logic circuit having 3 inputs, A, B, C will

have its output HIGH only when a majority of the inputs
are HIGH
A B C x
 Step 1 Set up the truth table
0 0 0 0
0 0 1 0
 Step 2 Write the AND term for 0 1 0 0
each case where the output is a 1. 0 1 1 1 → ABC
1 0 0 0
1 0 1 1 → ABC
1 1 0 1 → ABC
1 1 1 1 → ABC

Boolean algebra & Combinational circuits 43

 Step 3 Write the SOP form for the output

x = ABC + ABC + ABC + ABC

 Step 4 Simplify the output expression

x = ABC + ABC + ABC + ABC + ABC + ABC

= BC( A + A) + AC(B + B ) + AB(C + C )
= BC + AC + AB

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 Step 5 Implement the circuit

A AC
1
C

BC X = AC+BC+AC
2
B

AB
3

Boolean algebra & Combinational circuits 45

A
1
C

X = AC+BC+AC
2
B

3 1

2 4

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 In a simple copy machine, a stop signal, S, is to be generated to

stop the machine operation and energize an indicator light
whenever either of the following conditions exists:
◦ (1) there is no paper in the paper feeder tray; or
◦ (2) the two microswitches in the paper path are activated, indicating a
jam in the paper path.
 The presence of paper in the feeder tray is indicated by a HIGH
at logic signal P. Each of the microswitches produces a logic
signal (Q and R) that goes HIGH whenever paper is passing over
the switch to activate it.
 Design the logic circuit to produce a HIGH at output signal S for
the stated conditions, and implement it using two-input NAND
gates.

Boolean algebra & Combinational circuits 47

 Step 1. Setup the truth table

 Step 2. Write the AND term

for each case where the
output is a 1

 Step 3. Write the SOP form

for the output
𝑆 = 𝑃𝑄𝑅 + 𝑃𝑄𝑅 + 𝑃𝑄𝑅 + 𝑃𝑄𝑅 + 𝑃𝑄𝑅

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 Step 4. Simplify the output expression

𝑆 = 𝑃𝑄𝑅 + 𝑃𝑄𝑅 + 𝑃𝑄𝑅 + 𝑃𝑄𝑅 + 𝑃𝑄𝑅
= 𝑃𝑄(𝑅 + 𝑅) + 𝑃𝑄(𝑅 + 𝑅) + 𝑃𝑄𝑅
= 𝑃𝑄 + 𝑃𝑄 + 𝑃𝑄𝑅
= 𝑃 𝑄 + 𝑄 + 𝑃𝑄𝑅 = 𝑃 + 𝑃𝑄𝑅
= 𝑃 + 𝑄𝑅 (by applying 𝑥 + 𝑥𝑦 = 𝑥 + 𝑦)
 Step 5. Implement the circuit

Boolean algebra & Combinational circuits 49

Boolean algebra & Combinational circuits 50

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A B C D z
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
 Designing a circuit that has 4 logic 0 1 0 0 0

signal lines A, B, C, D representing 0 1 0 1 0

a 4-bit binary number with A as 0 1 1 0 0

→ ABCD
MSB and D as LSB. The circuit 0 1 1 1 1
1 0 0 0 1 → ABCD
produces a HIGH output only when
1 0 0 1 1 → ABCD
the binary number is greater than 1 0 1 0 1 → ABCD
01102 = 610 1 0 1 1 1 → ABCD
1 1 0 0 1 → ABCD
B
C 1 1 0 1 1 → ABCD
z = A+BCD
D 1 1 1 0 1 → ABCD
A 1 1 1 1 1 → ABCD

Boolean algebra & Combinational circuits 51

B
C z = A+BCD
D
A
B
C 1
D
3

A 2

 Process of converting a SOP circuit from AND/OR to

NAND gates as follows
1. Replace each AND/OR/INVERTER gate by a single NAND gate
2. Use a NAND gate to invert any single variable that is feeding
the final OR gate

Boolean algebra & Combinational circuits 52

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 Design a logic circuit with inputs P, Q, R so

that output S is HIGH whenever P=0 or
whenever Q=R=1
◦ 𝑆 = 𝑃 + 𝑄𝑅

Boolean algebra & Combinational circuits 53

 Write the SOP expression for a circuit with 4

inputs and an output that is to be HIGH only
when input A is LOW at the same time that
exactly two other inputs are LOW
 𝑥 = 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶𝐷
 Implement the expression of the above
question using all NAND gates. How many
gates are required?
 8

Boolean algebra & Combinational circuits 54

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Tool to simplify a logic

expression

Boolean algebra & Combinational circuits 55

 K Map that shows the relationship between inputs &

outputs, is a method used to simplify the Boolean
function
 Each cell of K-map expresses a value of function F
(0, 1 or x), corresponding to a row of the Truth
Table
 Horizontally & vertically adjacent squares differ only
in one variable
◦ Note that each square in the top row is considered to be
adjacent to a corresponding square in the bottom row.
 Once a K map has been filled with 0s and 1s, the
SOP expression for the output can be obtained by
ORing together those squares that contain a 1.

Boolean algebra & Combinational circuits 56

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Boolean algebra & Combinational circuits 57

Boolean algebra & Combinational circuits 58

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 The function F is given

◦ by the Truth table
◦ in the Standard form 1 (-form)
◦ in the Standard form 2 (-form)
◦ in algebraic expression

Boolean algebra & Combinational circuits 59

 If the function F is based on the Truth Table

◦ Fill “0”, “1” or “x” in squares having
the same binary combinations A B C F
in Truth Table. 0 0 0 0
0 0 1 0
F AB 0 1 0 1
C 00 01 11 10 0 1 1 0
0 0 0
1 2
X 6
1 4
1 0 0 1
1 0 1
0 3
0 7
X 5
1 0 1 x
1 1 0 x
1 1 1 0
Boolean algebra & Combinational circuits 60

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 If the function F is given in the standard SOP form (-form)

◦ Fill “1” in squares corresponding to minterms,
◦ Fill “x” in squares corresponding to “don’t care”
◦ Fill “0” in the remained squares
 We can fill only two symbols “1” and “x” in the K-map. The
blank squares are implicit.
F AB
00 01 11 10
CD
00 0 X 0 1
0 4 12 8
𝐹 𝐴, 𝐵, 𝐶, 𝐷 = ෍(2,3,5,8,11,13,14) + 𝑑(1,4,15)
01 X 1 1 5 1 13 0 9

11 13 0 X15 1 11
7

10 12 0 6
1 14 0 10
Boolean algebra & Combinational circuits 61

 If the function F is given in the standard POS form (-

form)
◦ Fill “0” in squares corresponding to maxterms,
◦ Fill “x” in squares corresponding to “don’t care”
◦ Fill “1” in the remained squares.
 We can fill only two symbols “0” and “x” in the K-map. The
blank squares are implicit. F AB
00 01 11 10
CD
00 10 0 0 12 X 8
4
𝐹 𝐴, 𝐵, 𝐶, 𝐷 = ෑ(4,5,12,14,15) . 𝑑 3,7,8,11
01 11 0 1 1
5 13 9

11 X 3 X 7 0 15 X 11
10 1 2 1 6 0 14 1 10
Boolean algebra & Combinational circuits 62

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 If the function F is given in algebraic form

◦ Convert it into Standard SOP or POS and then fill in the K-
map.
◦ If it has the form of SOP, transform it into standard SOP.
◦ If it has the form of POS, transform it into standard POS.
F AB
00 01 11 10
CD
00 00 0 0 12 0
4 8
𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝐴𝐵𝐶𝐷 + 𝐴𝐵𝐶 + 𝐵𝐶𝐷 + 𝐴𝐷
= σ(2,6,7,9,10,11,13,15) 01 01 0 1 1
5 13 9

11 0 1 1 15 1 11
3 7

10 1 2 1 6 0 14 1 10
Boolean algebra & Combinational circuits 63

F AB
00 01 11 10
CD
00
0 4 12 8

 Looping is a process combining the

01 squares which
contain 1s. The output expression can be1 simplified
5 13 by 9

looping 11
 Adjacent squares 3 7 15 11

◦ 2 squares are adjacent if they lie close10

each other or they are
symmetric through axis. The feature of two adjacent
2 squares
6 14 is 10
they are corresponding to two minterms (or maxterms) which
are different in only 1 bit
◦ 4 squares are adjacent if they consist of 2 adjacent squares and
each square of this group is adjacent to one square of the other
◦ The above definition is applied similarly for 8 adjacent squares
and 2n adjacent squares
◦ The adjacent squares are grouped if they have the same 1 or 0

Boolean algebra & Combinational circuits 64

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 When grouping the adjacent squares having

the same value “1”, we obtain a product of
variables having the same value:
◦ 0 → variables are in complemented.
◦ 1 → variables are not complemented.
(Variable with different values are omitted.)
 Because two adjacent squares have the
binary combinations which are different in
one variable
 grouping two adjacent squares can remove
one variable.

Boolean algebra & Combinational circuits 65

Looping a pair of adjacent

1s in a K map eliminates
the variable that appears in
complemented and
uncomplemented form.

Boolean algebra & Combinational circuits 66

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 Similarly,
◦ When grouping 4 adjacent cells  remove 2
variables.
◦ When grouping 8 adjacent cells  remove 3
variables.
 Generally,
◦ When grouping 2n adjacent cells  remove n
variables

Boolean algebra & Combinational circuits 68

Looping a quad of
adjacent 1s
eliminates two
variables that appears
in both complemented
and uncomplemented
form

Boolean algebra & Combinational circuits 69

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Looping an octet of
adjacent 1s eliminates
three variables that
appears in both
complemented and
uncomplemented form

Boolean algebra & Combinational circuits 70

 When a variable appears in both

complemented & uncomplemented form
within a loop, that variable is eliminated
from the expression.
 Variables that are the same for all squares of
the loop must appear in the final expression

Boolean algebra & Combinational circuits 75

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1. Construct the K map and place 1s and 0s in the

squares according to the truth table
2. Loop the isolated 1s which are not adjacent to any
other 1s (single loops)
3. Loop any pair which contains a 1 adjacent to only one
other 1 (double loops)
4. Loop any octet even if it contains one or more 1s that
have already been looped
5. Loop any quad that contains one or more 1s that have
not already been looped, making sure to use the
minimum number of loops
6. Loop any pairs necessary to include any 1s that have
not yet been looped, making sure to use the minimum
number of loops
7. Form the OR sum of all the terms generated by each
loop

Boolean algebra & Combinational circuits 76

 Step 1. the map was obtained from the problem truth table
 Step 2. Square 4 is the only square containing a 1 that is not
adjacent to any other 1. It is looped and is referred to as loop 4.
 Step 3. Square 15 is adjacent only to square 11. This pair is
looped and referred to as loop 11, 15.
 Step 4. There are no octets.
 Step 5. Squares 6, 7, 10, and 11 form a quad. This quad is
looped (loop 6, 7, 10, 11). Note that square 11 is used again,
even though it was part of loop 11, 15.
 Step 6. All 1s have already been looped.
 Step 7. Each loop generates a term in the expression for X.

77

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 Step 1. the map was obtained from the problem truth table
 Step 2. There are no isolated 1s.
 Step 3. The 1 in square 3 is adjacent only to the 1 in square 7. Looping
this pair (loop 3, 7) produces the term 𝐴𝐶𝐷.
 Step 4. There are no octets.
 Step 5. There are two quads. Squares 5, 6, 7, and 8 form one quad.
Looping this quad produces the term 𝐴𝐵. The second quad is made up
of squares 5, 6, 9, and 10. This quad is looped because it contains two
squares that have not been looped previously. Looping this quad
produces 𝐵𝐶.
 Step 6. All 1s have already been looped.
 Step 7. Each loop generates a term in the expression for X.

78

 Step 1. the map was obtained from the problem truth table
 Step 2. There are no isolated 1s.
 Step 3. The 1 in square 2 is adjacent only to the 1 in square 6. This pair
is looped to produce 𝐴𝐶𝐷. Similarly, square 9 is adjacent only to square
10. Looping this pair produces 𝐴𝐵𝐶. Likewise, loop 7, 8 and loop 11,
15 produce the terms 𝐴𝐵𝐶 and 𝐴𝐶𝐷, respectively.
 Step 4. There are no octets.
 Step 5. There is one quad formed by squares 6, 7, 10, and 11. This
quad, however, is not looped because all the 1s in the quad have been
included in other loops.
 Step 6. All 1s have already been looped.
 Step 7. Each loop generates a term in the expression for X.

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 Don’t-Care Conditions are certain input conditions for

which there are no specified output levels
 Don’t-care conditions should be changed to either 0 or
1 to produce K-map looping that yields the simplest
expression
 Example

Boolean algebra & Combinational circuits 80

 Let’s design a logic circuit that controls an

elevator door in a three-story building.
◦ The circuit has four inputs.
◦ M is a logic signal that indicates when the elevator is
moving (M=1) or stopped (M=0).
◦ F1, F2, and F3 are floor indicator signals that are
normally LOW, and they go HIGH only when the
elevator is positioned at the level of that particular
floor.
 For example, when the elevator is lined up level with the
second floor, F2=1 and F1=F3=0.
◦ The circuit output is the OPEN signal,
which is normally LOW
and will go HIGH when the elevator door is
to be opened.

Boolean algebra & Combinational circuits 81

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 Because the elevator cannot

be lined up with more than
one floor at a time, only
one of the floor inputs can
be HIGH at any given time.
 When M=1 the elevator is
moving, so OPEN must be a
0 because we do not want
the elevator door to open.
 When M=0 (elevator
stopped) we want OPEN=1
provided that one of the
floor inputs is 1.

Boolean algebra & Combinational circuits 82

Simplify the following function:

F
AB
00 01 11 10
CD
00 1 1 1 1
01 1 1 1 1

11
10 1 1 1

Boolean algebra & Combinational circuits 83

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Simplify the following function:

F
AB
00 01 11 10
CD
00 1 1
01 1 1

11
10 1 1 1

Boolean algebra & Combinational circuits 84

Simplify the following function:

F
AB
00 01 11 10
CD
00 0 0 0 0
01 0 0 0 0

11
10 0 0 0

Boolean algebra & Combinational circuits 85

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Simplify the following function:

F(A,B,C,D) = (2,3,5,8,11,13,14) + d(1,6,9,10,15)
F
AB
CD
00 01 11 10 C’D
B’D 00 1
x 1 1 x
01 AB’
11 1 x 1
10 1 x 1 x
CD’

Boolean algebra & Combinational circuits 86

Simplify the following function:

F(D,C,B,A) = (2,3,5,8,11,13,14).d(1,6,9,10,15)
F
AB
CD
00 01 11 10 C+D’
B+D’ 00 0
x 0 0 x
01 A’+B
11 0 x 0
10 0 x 0 x
C’+D

Boolean algebra & Combinational circuits 87

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Simplify the following functions:

Boolean algebra & Combinational circuits 88

Simplify the following functions:

0
0
0 0
0 0

Boolean algebra & Combinational circuits 89

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Simplify the following functions:

Boolean algebra & Combinational circuits 90

Simplify the following functions:

Boolean algebra & Combinational circuits 91

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 Compared to the algebraic method, the K-

map process is a more orderly process
requiring fewer steps and always producing a
minimum expression
◦ Algebraic simplification is considered as the trial-
and-error process
 For the circuits with large numbers of inputs
(larger than four), other more complex
techniques are used

Boolean algebra & Combinational circuits 92

• Parity generator and

checker
• Enable/Disable circuits

Boolean algebra & Combinational circuits 93

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Boolean algebra & Combinational circuits 94

Boolean algebra & Combinational circuits 95

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 Design a logic circuit that will allow a signal to pass to the

output only when control inputs B and C are both HIGH;
otherwise, the output will stay LOW
◦ An AND gate should be used because the signal is to be passed without
inversion, and the disable output condition is a LOW. Because the enable
condition must occur only when B=C=1, a three-input AND gate is used

 Design a logic circuit that allows a signal to pass to the output

only when one, but not both, of the control inputs are HIGH;
otherwise, the output will stay HIGH
◦ An OR gate is used because we want the output disable condition to be a
HIGH, and we do not want to invert the signal. Control inputs B and C
are combined in an XNOR gate. When B and C are different, the XNOR
sends a LOW to enable the OR gate. When B and C are the same, the
XNOR sends a HIGH to disable the OR gate.

96

 Designing a logic circuit with input signal A,

control input B and outputs X and Y to operate
as follows:
◦ When B = 1, X = A and Y = 0
◦ When B = 0, X = 0 and Y = A
◦ Pulse-steering circuit

Boolean algebra & Combinational circuits 97

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 Boolean algebra
◦ SOP and POS
◦ Simplifying Boolean expression
 Design of a combinational Logic circuit
◦ construct its truth table,
◦ convert it to a SOP
◦ simplify using Boolean algebra or K mapping,
◦ implement
 K map: a graphical method for representing a circuit’s
truth table and generating a simplified expression
 Some useful logic circuits
◦ Parity generator and checker
◦ Enable/disable: Each of the basic gates can be used to enable or
disable the passage of an input signal to its output

Boolean algebra & Combinational circuits 98

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