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COA IAT2 QBank

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7 views1 page

COA IAT2 QBank

Uploaded by

nitishjha8828
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Subject Name:

Subject Code: Computer Semester: Faculty In-charge:


ITC405 Organization & IV Meena Ugale
Architecture

Question Bank 2 : Internal Assessment Test -2 Date: 22/03/2024

Questi
on CO BL Module Question
No.
Q1 Draw & explain six stage CPU instruction pipeline.
Q2 Describe various pipelining hazards.
Q3 What is horizontal & vertical micro instruction?
Q4 ITC405.3 BL2 03 Explain the Flynn's Classification in detail.

Explain the following terms microinstruction, micro-


Q5
operation, micro-program.
Write a note on Microprogrammed & Hard-wired control
Q6
unit.

Q7 Discuss the floating-point representation IEEE standard 754


with examples.
Q8 BL3 04 Examples on Booth’s Multiplication, Restoring & Non-
ITC405.4 restoring Division Algorithms.
Q9 Examples on IEEE 754 single and double precision standard
of floating-point representation.
Q10 Classify the types of memories based on the hierarchy of
speed and size.
Q11 Explain the key characteristics of computer memory systems
in detail.
Q12 Explain cache coherence.
ITC405.5 BL2 05
Q13 What is locality of reference? List and define different types
of locality.
Q14 Discuss cache organization.
Q15 What are the elements of cache design?
Discuss the working of:-
Q16 (i)DMA (ii) Programmed I/O (iii) Interrupt Driven I/O (iv)I/O
ITC405.6 BL2 06 Module
Q17 Compare and contrast DMA, Programmed I/O and Interrupt
Driven I/O.

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