MCU Application Note
MCU Application Note
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table of Contents
4 Sleep and low power consumption ........................ .......... ....................................... ........... ................................... 8
7 Precautions for using external crystal oscillator ............................ ............... .................................................. ............ 9
2 Read back the chip check code ... ........................................ ......... ....................................... 12
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8 The check code is different after updating the IDE ........................................ . ....................................... ......................... 15
3 Read the check code of the chip ............................ .............. ................................... ............... ..................... 17
4 The function of each button of the writer software ........................................ . ....................................... .........................17
5 The writer software does not display the FT61F04X chip ............................... ......... ........................................................ 17
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Chapter VII C language programming precautions............................................ .. ............................................... ... ..... twenty two
Chapter 8 Precautions for Use of Specific Models.......................................... .................................................. .......... twenty four
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1 Interrupt considerations
When an interrupt event occurs during the running of the program, the CPU will store the current PC value of the program on the stack, and then start from address 04H
The interrupt program is executed until the RETI instruction is executed, and the PC value in the stack is retrieved and returned to the main program to continue execution.
The interrupt protection scene and the recovery scene program are used to protect the scene information when the program enters the interruption, such as accumulator W and status register
The value of STATUS. If PCLATH is rewritten in the interrupt, a buffer register needs to be added to protect PCLATH. Such as
If the PCLATH value is not rewritten in the interrupt, the protection is not required. The procedures for protecting the site and restoring the site can ensure that the
The scene information before and after is consistent, and the main program can continue to be executed correctly after the interrupt returns.
The recommended procedures for on-site protection and restoration are as follows:
W_TMP EQU 0x70; Cache register for protecting W value (0x70-0x7F is the common interval)
ORG 0004H ; Pseudo-instruction, defines the entry address of the interrupt program
STR W_TMP ; Enter the interrupt program, start to protect the scene, and store the value of W in the cache
SWAPR STATUS, W; store the upper four digits and lower four digits of STATUS into W after swapping
SWAPR S_TMP, W; swap the high and low four bits of the S_TMP buffer and store them in W
SWAPR W_TMP,F ; Swap the high and low four bits of W_TMP
SWAPR W_TMP,W ;Swap the high four bits and low four bits of W_TMP and store them in W
W_TMP and S_TMP need to be defined in the address range 0x70-0x7F, which is shared by all BANKs, in case they are in other BANKs
If the register in BANK0 is to be processed in the interrupt handler, then BANK needs to be set in BANK0.
If the register in BANK1 is to be processed in the interrupt handler, then BANK needs to be set in BANK1.
If the bank is not set after entering the interrupt, the program will directly operate to the register in BANK0 after BANK1 enters the interrupt.
An error will occur when registering. In the same way, when BANK0 enters the interrupt, the operation to the register in BANK1 will also cause an error.
The above are the matters needing attention when programming with assembler, and there is no need to pay attention when programming with C language.
The C compiler will automatically set the interrupt protection site and restore the site program.
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When the application needs to save power, it usually uses sleep plus key-press wake-up. The key-on wakeup function requires this IO to have power
Level change interrupt function, the level change interrupt function of most of the FMD chips is on the PORTA port, and some chips have falling edge change
For interrupts (such as PORTA of the FT61F04X series), you need to pay attention to the level status.
ReadAPin = PORTA; //Read the port status and store it in the buffer, set the initial value of the level change interrupt match
ReadAPin = PORTA; //Read the port status and store it in the buffer to eliminate the level change interrupt matching condition
The following points should be paid attention to when waking up by interrupt on change:
1) The IO state of this button needs to be set in the initialization. For example, set as input port and enable internal pull-up resistor function, IO
Connect to the ground through the button series resistor. In this way, when there is no button, the level of the port is fixed at high level. When the button is pressed, the port level is changed by
2) From reading the port status to entering sleep, the fewer instructions in between, the better.
3) The action of turning off the general interrupt GIE before sleep will make the chip continue to execute the program after SLEEP after waking up.
4) If the general interrupt GIE is not turned off before sleep, it will jump to the interrupt entry address 04H to execute the interrupt program after waking up.
After the interrupt returns, continue to execute the program after SLEEP. Therefore, it is necessary to add read port status and clear level changes in the interrupt program
The action of the interrupt flag, so as not to cause the program to repeatedly enter the level change interruption because the conditions of the port level change interruption have been matched.
ReadAPin = PORTA; //Read the port status and store it in the buffer to eliminate the on-change interrupt matching condition
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3 EEPROM precautions
1) When using the EEPROM program, in order to prevent unstable voltage during power-on, the reading and writing of EEPROM may become unstable.
Need to add about 100ms delay before EEPROM operation. If PWRT (power-on delay) is enabled in the code option, then
The program only needs to add about 40ms delay before reading and writing EEPROM.
2) Before using EEPROM, you need to initialize the EEPROM. If any EEPROM is not used
Write the address "0xAA" twice, and subsequent programs do not operate to this address. such as:
EEPROMwrite(0xFF,0xAA);
3) The process of writing EEPROM data needs to follow the routine steps below:
NOP(); //Note: When the chip is running at 1T, NOP() should be added here
NOP(); //Note: When the chip is running at 1T, NOP() should be added here
while(WR); //Step G: Wait for the completion of EEPROM writing (the process is about 2ms)
If the watchdog is enabled by the software, the watchdog needs to be cleared after entering the EEPROM writing program.
If part of the application has other functions to be implemented in the interrupt (such as analog PWM output), the EEPROM has been written
The interrupt cannot be closed within 2ms of the process, and the positions of step H and step G can be interchanged.
4) After writing the EEPROM data, compare the actual value of the EEPROM with the target value to be written. in case
If they are equal, the writing is successful; otherwise, the writing fails and the program can take the rewrite operation.
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Caused by reset, then the flag bit EECON1.WRERR will be set to 1. It can be judged by reading this flag bit during power-on initialization.
Whether an abnormal situation occurs during an EEPROM writing process, and then take corresponding measures.
In some battery applications or applications that require low power consumption, the chip must use sleep to reduce the power consumption of the whole machine.
The sleep current of the FMD chip can be as low as 3uA, and as low as 0.3uA.
When entering sleep, you need to pay attention to the following aspects:
1) As far as possible, close the peripherals that are not used by the chip.
2) After the LVD/LVR function is activated, there will be a current of about 15uA. During sleep, you can choose to turn off the LVD/LVR function according to the actual situation.
3) Normal IO should be set according to application needs during sleep. If it is a normal output port, it should be set to a power-saving output. if
For ordinary input ports, the input port should be kept at a fixed level and cannot be in a floating state.
4) Whether FOSC is selected as INTOSC in the compilation options. If INTOSC is selected, it will cause the CLKO pin of the chip to output frequency
5) Because some chips are not fully encapsulated, these IOs need to be set to avoid floating input states.
6) The reset pin of some series of chips is multiplexed with the IO port, and when used as an input port, there is no internal pull-up and pull-down resistor. Need special attention if this
If IO is not used, it is necessary to set MCLRE in the code option to MCLR function to avoid this IO in a floating input state. Such as
7) If the application is special, turning off the watchdog function can reduce the current by about 3uA.
The internal pull-up resistor/pull-down resistor only takes effect when the IO is in the digital input port.
1) Turn off other analog functions of the IO port first (some chips are analog ports by default).
4) The PORTA port of some chips also needs to set OPTION. 7=0 (/PUPA) to enable the PORTA pull-up resistor.
PORTA is an 8-bit bidirectional port. The corresponding entry and exit direction register is the TRISA register.
Conversely, setting a bit to 0 will set the corresponding PORTA port as an output port.
When set as an output port, the output drive circuit will be turned on, and the data in the output register will be placed on the output port.
When the IO is in the input state, read PORTA, and the content of PORTA will reflect the state of the input port.
When writing on PORTA, the contents of PORTA will be written into the output register.
All write operations are a "read-change-write" process, that is, the process in which data is read, then changed, and then written to the output register.
This feature requires special attention when operating some LED digital tubes.
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The value is the buffer value of PORTA, not the real level value on the PAD.
When using an external crystal oscillator, when the adjacent pins of the MCU crystal oscillator input and output high-frequency pulses, they will interfere with the crystal oscillator and cause the crystal oscillator to jitter, thereby affecting
The specific neighboring pins are combined with the package pin map to see: For example, FT61F145-TRB, PC0 is the neighboring pin of the crystal oscillator. When using an external crystal oscillator, PC0
Do not use it as a high-frequency signal input and output IO port, see the following figure for details:
1) I2C
Plug-in FT24C02: SDA and SCL are set to open-drain output and need external pull-up
2) SPI
The external FT25C64 is connected to 4 wires, SO, SI, SCL are set as open-drain output, and external pull-up is required, and CS is driven by ordinary IO
3) USART
The direction register of TX should be set as output, and RX should be set as input
Although the double buffering of the period and duty cycle largely guarantees that the PWM output does not produce glitches, if the software is very close
Write cycle and duty cycle registers at the time of TIM matching, especially if the TIM clock frequency is faster than the system clock, it is possible
Unforeseen circumstances occur, resulting in the register is not the expected value, it is strongly recommended to update the period and duty cycle registers, only in TIM
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The simulation tool is divided into three parts, the upper computer software of the emulator (IDE), the emulator (Link), and the firmware FW of the emulator.
The version information of the IDE can be viewed in the "Menu Bar-Help-About..." of the IDE interface, such as 2.1.0.
The latest IDE software can be downloaded from the official website http://www.fremontmicro.com/.
Turn off the anti-virus software before installation. It can be installed on Disk D. The new IDE has a built-in C compiler, so you don't need to call it separately.
The version of Link is less updated, and the version silkscreen is printed on the PCB panel, such as Link_V2.5
The firmware FW version information of the emulator can be displayed in the lower right corner of the IDE after the Link is plugged into the computer, such as FW Ver: V0.0.17, one
Usually upgrade with the version of IDE. If you need to upgrade or downgrade manually, you can click "Menu Bar-Help-Update Firmware..." to update
The new firmware and update files are saved in the IDE "installation directory\Update\AppUpdate.bin".
1) Connect the emulator LINK to the computer, and use the jumper to select the power supply voltage for the chip in the voltage option at the upper right corner of the emulator.
2) Connect the VCC, GND, CLK, and DAT pins on the right side of the LINK to the chip VCC, GND, ICSPCLK, and ICSPDAT.
3) After opening the project, click the Build All button and the compilation options will pop up. After selecting the compilation options, click OK, the IDE can pass LINK
4) After the download is complete, it will automatically enter the DEBUG interface. Use the icon on the DEBUG toolbar to perform simulation debugging.
It should be noted that the emulator needs to re-power on the chip when downloading the program, so the target board cannot be connected to an external power supply, and the target board
It is best not to have a large capacitor (above 100uF) affecting the re-power on of the chip.
Do not connect ICSPCLK and ICSPDAT with other components that will affect the debugging communication level status.
The failure of downloading in simulation debugging can be analyzed in two cases. One is the download failure when a separate chip is connected with Link, and the other is
In view of the first case, the analysis is divided into the following steps:
2) Check whether the connection between Link and the chip is correct and whether the contact is good.
3) Check whether the voltage of LVR in the code option is higher than the output voltage of Link.
4) Check if the chip model is correct, replace the chip for test.
5) Check whether the communication level waveform of the chip VCC, ICSPCLK, ICSPDAT is normal.
1) Use Link to connect the chip separately, and check according to the first case. If it can be downloaded, proceed to the next step.
2) Check if there is a large capacitance exceeding 100uF between VCC and GND of the chip.
3) Check whether there are capacitive devices or other components on the CLK and DAT pins of the chip that affect the communication level.
4) Check whether the reset pin function of the chip is turned on. Set MCLRE in the compile option to PA3/PA5.
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1) Change the voltage selection jump of the emulator from 3.3V/3.7V/5.0V to External.
2) Connect the external power supply VCC to the VCC of the P1 port of the emulator.
3) Connect the GND terminal of the external power supply to the GND of the P1 port of the emulator.
4) Connect the Program four wires of the emulator to the VCC, GND, ICSPCLK, ICSPDAT of the chip on the emulation board.
When using external power supply for simulation, the emulator needs to control the external power supply to the target board. The target board and the external power supply are not
It can be directly connected, and the connection must be controlled through the emulator.
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2) PROGRAM, BUSY, OK, FAIL, GND and GND on the back of the 20PIN horn socket of the writer are not marked below
Note the pins (3.3V) are respectively connected to the START, BUSY, OK, NG, GND, VCC of the serial line of the burning machine. note
Do not connect the pin marked VDD to the VCC of the machine.
3) Set the start level, BUSY level, OK level, and NG level to L effective in the setting of the burner option of the burner.
3) The burner emits a "di" prompt sound and displays "IC's checksum: XXXX" on the display.
4) If this result does not appear, you need to check whether the chip is empty or whether the chip connection is normal.
The writer has two major function modes: Write programming mode and Check verification mode.
After downloading the program to be verified to the writer, press and hold the KEY_MODE button until the screen of the writer displays "Write Flash",
Enter the writer function selection mode, at this time you can switch the writer mode through the red button.
There are the following modes under the Write function (the writer will automatically select the programming mode when downloading the program, it is not recommended to switch manually):
Write Fla EEP Rcode: Burn the chip program HEX and EEPROM.BIN, burn the rolling code
Write Fla EEP Rd FOSC: burn chip program HEX and EEPROM.BIN, burn rolling code and calibrate frequency
Write Flash Rcode: Burn chip program HEX and rolling code
Write Fla Rd FOSC: Burn chip program HEX, burn rolling code and calibrate frequency
Write Fla FOSC: Burn the chip program HEX and calibrate the frequency
Write Fla EEP FOSC: Burn chip program HEX and EEPROM.BIN and calibrate frequency
Check FOSC: Check the chip frequency (this mode will erase the chip program, you need to reprogram after checking)
Check Flash: Check procedure (only applicable when the code is not encrypted: CPB=Disable)
Check checksum num: Checksum of the chip (can be connected to the machine to automatically detect)
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1) It is powered by USB, and the 5V power supply is connected to the USB cable.
Connect the P1 row on the writer to the corresponding VDD, GND, CLK, DAT, FOSC right row pins and the corresponding pins on the target board
Some applications require that the reserved programming port does not lead to FOSC to detect the chip frequency. At this time, it needs to be in the setting interface of the burner software
After importing the program file, uncheck the Test Frequency option below, and you can burn through four wires.
6 Processing failure
There are two situations where the programming failure can be analyzed, one is the failure when programming the chip alone, and the other is the failure when programming the board.
For the first case, the analysis is divided into the following steps:
1) Check whether the tool version is the latest and the chip model is correct.
2) Check whether the wiring between the writer and the chip is correct and whether the contact is good.
3) Check whether the voltage of LVR in the compilation option is higher than the output voltage of the writer (the option is popped on the right side of the writer's display).
4) Check whether the chip VCC, ICSPCLK, ICSPDAT communication level waveform is normal.
5) Check whether the FOSC in the compile option of the program is the external crystal oscillator mode, if the external crystal oscillator mode is adopted, and FCMEN
The clock failure detection function is disabled, which will cause the chip to fail to start and enter the programming mode.
1) Use the writer to connect the chip separately, and check according to the first situation. If it can be programmed, proceed to the next step.
2) Check if there is a large capacitance exceeding 100uF between VCC and GND of the board chip.
3) Check whether there are capacitive devices or other components on the CLK and DAT pins of the board chip that affect the communication level.
4) Check whether the reset pin function of the on-board chip is turned on. Set MCLRE in the compile option to PA3/PA5.
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Generally, it is caused by the C compiler is not installed or the calling path is wrong. After opening a project in the IDE directory, "menu bar
-Project-Select Language Toolsuite..." In the pop-up box, click Browse... to select the editor under the installation directory of the compiler
2) Prompt "File not exist" or "No such file or directory" when compiling
Programming in assembly language requires including header files at the beginning of the program:
#include <header file.inc> or #include "header file.inc". Their difference lies in the location of the header file:
When using #include <header file.inc>, the compiler will look for this header file in the IDE software directory.
When using #include "header file.inc", the compiler will look for this header file in the current project directory.
Users can add custom header files by including XXX.inc or include XXX.h. After the compilation is passed, the header file will show
In the Include File directory of File View. It does not currently support adding directly in Include File manually.
During simulation, LINK will occupy ICSPCLK and ICSPDAT to communicate with the chip, so ICSPCLK and ICSPDAT cannot be used during simulation.
Simulate common IO functions. ICSPCLK and ICSPDAT can realize ordinary IO only after the program download is completed and the power is turned on again
Features.
During emulation, if the watchdog function is enabled, pay attention to the watchdog, otherwise a reset will be generated when the watchdog overflows, making the IDE unavailable
The correct PC value, resulting in a simulation error. It is recommended to turn off the watchdog function during simulation debugging, and then turn on the watchdog when testing the whole machine
Features.
The C language used in the IDE needs to include the header file SYSCFG.H, and the assembly language includes the chip series .inc header file.
The win10 system will prohibit the IDE from modifying the files in the C compiler under the system disk. Install the C compiler on a non-system disk or mouse
Right-click the main IDE program and select Run IDE as administrator to solve this problem.
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1) Open the project and select Project->Export EEPROM Data in the menu bar to generate a .bin type file.
2) Since the IDE does not support online editing of EEPROM files, it is recommended to use third-party text editing software to edit EEPROM files.
Line editing. Take UltraEdit as an example, use UltraEdit to open the file and select Edit -> Hexadecimal Function -> Hexadecimal in the menu bar
At present, the project can only be compiled and downloaded through the IDE's Build All. A single HEX file can only be used to burn the chip through the burner.
The subsequent IDE will add the function of burning HEX files separately.
Because the early IDE version has opened the function of LVRS=1.8V, some program compilation options use the project with LVRS=1.8V.
After compiling with the new IDE, LVRS will be upgraded to 2.0V by default. The program verification code will contain the content in the compilation options, so the verification
The code will be slightly different from the previous check code.
If the check codes differ greatly, it is recommended to check whether the C compiler is a restricted version (the compilation information will prompt Lite Mode).
2) Write the program to be packaged into a C file and include it in the project file.
3) After the compilation is complete, an lpp file with the same name as the C file will be generated in the project directory.
4) Include the lpp file into LIB File, delete the sub-file and recompile it.
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1 Burner online
2) Open the writer software, the software version number will be displayed in the upper left corner of the software, such as FMDWriter V5.1.
3) The firmware version number will be displayed after DRV Ver under the FMD icon at the top right of the writer software: such as DRV Ver: V2.1.0. If not
If the version number is displayed, it means that the writer is not connected successfully. It is recommended to plug in the USB cable and reconnect it.
4) If the burner firmware version is lower, it will prompt that the firmware version has expired after connecting to the burning software.
Choose OK in the dialog box, wait for about two minutes, the burner will automatically complete the update. After the firmware update is complete, you need to
New connection, after successful reconnection, the current firmware version number will be displayed behind DRV Ver.
5) You can manually update the firmware by clicking the FMD icon at the top right of the burner software.
2 Import files
Click the "Device\Settings" button, the writer software will automatically pop up a setting option box.
After selecting the chip series and model, select Flash file and EEPROM file in the file below.
If you need to burn the program file, click Browse to select the Flash file to be burned.
If you need to burn EEPROM, click Browse to select the EEPROM file to be burned.
Select the program file separately, the writer only burns the chip program area, and does not affect the original EEPROM data of the chip.
Select the EEPROM file separately, the writer only burns the chip EEPROM area, and does not affect the original program data of the chip.
If you do not select a file, you can only read the chip data through the burning software.
Through the chip FOSC, test whether the internal frequency deviation of the chip exceeds ±5%. If it exceeds ±5%, it is judged as an NG chip.
Through the chip FOSC test whether the internal frequency deviation of the chip exceeds ±1%, if it exceeds ±1%, the writer will calibrate the frequency to ±1%
If the chip cannot be calibrated within ±1%, it is judged as an NG chip. Because the chip factory test frequency deviation range is within ±1.5%,
Checking this option will cause some normal chips to be judged as NG because they cannot be calibrated within ±1%. Therefore, customers are not recommended to check it under normal circumstances.
Choose this option. For some special applications, if the internal frequency deviation range of the chip does not exceed ±1%, you can check this option.
It is used to set the burning quantity of the burner. When the burning chip reaches the maximum value, the burner will no longer burn, and the file needs to be imported again.
4) Rolling code
Used to set the chip rolling code, which is stored in the chip EEPROM area.
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The check code of the chip can be read back through the Key_Mode button on the writer and displayed on the screen of the writer.
In addition, the writer software can also read the contents of the program area and EEPROM area of the chip.
If the chip CPB encryption is enabled, only EEPROM file can be read.
For the data read back, click Flash in IC or EEPROM in IC to view the corresponding data.
Auto Program: The writer will execute "erase", "program burning" and "program verification" in sequence
Erase: Only erase the chip (Flash and EEPROM can be selected for erasing)
Program: Only perform the programming action on the chip, do not verify whether the programming is successful
Verify: Check whether the code in the chip is correct (if CPB is enabled in the programming program, it cannot be verified)
Read: Read chip information (if the chip is encrypted, only check code and EEPROM data can be read)
Calibration Frequency: Calibration frequency (after checking, the chip will automatically calibrate when the frequency offset is detected)
Test Frequency: Test frequency (after checking, the chip that detects the frequency offset will be processed as NG)
After clicking the Device/Load button, a dialog box for selecting the chip model will pop up.
1. Whether the writer is online normally. (Does DRV Ver show the burner firmware number?)
2. Whether the burner is a yellow version burner. Early black/blue/green programmers cannot burn chips with 4K and above capacity.
3. If it is the yellow version, please confirm whether the burner firmware number is the latest version.
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Rd CPU_STAT Err: The chip pin is connected to the wrong or poor contact
Read ICID Err: The burning chip does not match the HEX corresponding model downloaded by the burner
ICID_1T MATCH NG: FT61F14X, FT61F0AX, FT64F0AX, FT67F0AX Some versions do not support 1T work
mode
fosc check fail: The frequency measurement failed, the core frequency deviation is too large or the CLKO pin is connected incorrectly, and the contact is poor.
Read FCFG Err: If it is an encryption program, it means that the password is different from the secret of the chip configuration. After confirming the passwords of both parties
No ICSeriesinfo: After the new firmware is updated, it will prompt the user to import the burning program
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1 pseudo-instruction BANKSEL
The pseudo-instruction BANKSEL is used to set the bank of the register, which is used to set the bank to the register behind BANKSEL
BANK.
BANKSEL PORTA; Because PORTA is in BANK0, the instruction is equivalent to BCR STATUS,5
BANKSEL TRISA; Because TRISA is in BANK1, the instruction is equivalent to BSR STATUS,5
In FT61F02X, there are 3 registers BANK: BANK0, BANK1, BANK2, which need to pass BIT5 of STATUS,
BCR STATUS,5
BCR STATUS, 6
BSR STATUS,5
BCR STATUS, 6
This must be paid attention to when the number of instructions needs to be calculated accurately.
The assembly instruction cycle refers to the time required to execute an assembly instruction.
According to different series of chips, the instruction cycle time will be different.
The instruction cycle of 1T means that it takes 1 system clock cycle to execute an assembly instruction cycle.
The instruction cycle of 2T means that it takes 2 system clock cycles to execute an assembly instruction cycle.
The instruction cycle of 4T means that it takes 4 system clock cycles to execute an assembly instruction cycle.
When OSCCON.IRCF[2-0]=111 is selected, the internal oscillation frequency Fosc=16M. The system clock cycle is 1/16M second.
At this time, one instruction cycle is 4*1/16M=1/4M second=0.25us. That is, it takes 0.25us to execute a NOP.
FT60F02X is 2T/4T optional instruction cycle. The 2T instruction cycle can be selected in Tsel of the code option.
When OSCCON.IRCF[2-0]=111 is selected, the internal oscillation frequency Fosc=16M. The system clock cycle is 1/16M second.
At this time, one instruction cycle is 2*1/16M=1/8M second=0.125us. That is, it takes 0.125us to execute a NOP.
Most FMD assembly instructions are single-cycle instructions, that is, one instruction occupies one instruction cycle.
Some instructions with jump PCL function are two-cycle instructions, such as LJUMP, LCALL, RET, RETI, and RETW.
Part of the judgment jump instruction is a double instruction cycle when the jump condition is met, and a single instruction cycle when the jump condition is not met. Such as BTSS,
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BTSC R,b NONE 1 or 2 If the bit b of the register R is 0, skip the next instruction. When a jump occurs, it is 2 cycles
BTSS R,b NONE 1 or 2 If the bit b of the register R is 1, skip the next instruction, and when a jump occurs, it is 2 cycles
LDR R,d Z 1 Import the value of register R into accumulator W (d=W/0) or register R (d=F/1)
SWAPR R,d NONE 1 Exchange the high four bits and low four bits of register R and store them in accumulator W (d=W/0) or register R (d=F/1)
INCR R,d Z 1 The value of register R is increased by 1, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
The value of register R is increased by 1, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
INCRSZ R,d NONE 1 or 2
If the result is equal to 0, skip the next instruction, 2 cycles when a jump occurs
Add the value of accumulator W and the value of register R, and store the result in accumulator W (d=W/0) or register R (d=F/1)
ADDWR R,d C, HC, Z 1
If the result is greater than 255, then C=1
Subtract the value of accumulator W from the value of register R, and store the result in accumulator W (d=W/0) or register R (d=F/1)
SUBWR R,d C, HC, Z 1
If R>=W, then C=1
DECR R,d Z 1 The value of register R minus 1 is stored in accumulator W (d=W/0) or register R (d=F/1)
The value of register R is subtracted by 1, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
DECRSZ R,d NONE 1 or 2
If the result is equal to 0, skip the next instruction, 2 cycles when a jump occurs
ANDWR R,d Z 1 The value of register R is ANDed with the value of accumulator W, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
IORWR R,d Z 1 The value of register R is ORed with the value of accumulator W, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
XORWR R,d Z 1 The value of register R and the value of accumulator W are XORed, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
COMR R,d Z 1 The value of register R is inverted, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
RRR R,d C 1 The value of register R is shifted right with C bit, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
RLR R,d C 1 The value of register R is shifted to the left with the C bit, and the result is stored in accumulator W (d=W/0) or register R (d=F/1)
ANDWI I Z 1 The value of accumulator W is ANDed with the immediate data I, and the result is stored in accumulator W
IORWI I Z 1 The value of accumulator W is ORed with the immediate data I, and the result is stored in accumulator W
XORWI I Z 1 The value of accumulator W is XORed with the immediate value I, and the result is stored in accumulator W
RETW I NONE 2 The subroutine returns, and the immediate value I is stored in the accumulator W
ADDWI I C, HC, Z 1 The value of accumulator W is added to the immediate value I, and the result is stored in accumulator W. If the result is greater than 255, then C=1
SUBWI I C, HC, Z 1 The value of accumulator W is subtracted from the immediate value I, and the result is stored in accumulator W. If I>=W, then C=1
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4 Compilation table
Pay special attention to the processing of PCLATH when processing the table lookup function in the assembly instructions.
In the assembly, the table data is usually returned through RETW XXX. The commonly used digital tube look-up program routines are as follows:
GET_CODE:
LDWI 0X03
STR PCLATH ; Set PCLATH=3 (follow the actual address of the form)
RETW B'00111111' ;0
RETW B'00000110' ;1
RETW B'01011011' ;2
RETW B'01001111' ;3
RETW B'01100110' ;4
RETW B'01101101' ;5
RETW B'01111101' ;6
RETW B'00000111' ;7
RETW B'01111111' ;8
RETW B'01101111' ;9
Because of the limitation of PC width, LJUMP and LCALL can only access 2KROM space at most.
When using LJUMP and LCALL instructions for chips with a program space of 2K, there is no need to consider jump errors.
When using LJUMP and LCALL to access the space above 2K for chips with a capacity of 2K or more, PCLATH needs to be set.
For chips with more than 4K program space, C language programming is recommended, and the compiler will handle it automatically.
6 Use of labels
When setting the subroutine label or position label in the assembly, you need to pay attention to adding an English colon to the label:
Without the colon, it will be recognized as a macro definition by the compiler. If there is no such macro definition in the header file, the compiler will report an error.
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The #include instruction must be used to include the "syscfg.h" file provided by the compiler at the beginning of the program to realize special function registers and other
It is a declaration of special symbols. There is no need to include the header file of the chip model separately, the IDE will call it automatically.
Other subroutine files and header files also need to be included in the Main file with the #include directive.
2 Variable type
The types of commonly used variables are as follows: It should be noted that char defaults to unsigned character variables.
long 32 Long integer variable, the default is a signed long integer variable
3 Variable declaration
If you add the prefix const declaration when the variable is defined, then the variable will become a constant variable, which cannot be
The C compiler will optimize the program, and some variables that have no practical effect in the program will be optimized.
The actual value of the variable cannot be observed. If you want the variable not to be optimized, you need to add the volatile prefix when defining the variable.
When the program is powered on and running, all defined variables will be cleared or set to initial values. But in many practical applications, the program does not run
Initialize part of the variables in sequence. At this time, you can add the persistent prefix declaration before the variable definition.
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Some applications need to put 8 bit variables in the same byte for batch operation, which can be done in two ways:
union {
struct {
unsigned bit0: 1;
unsigned bit1: 1;
unsigned bit2: 1;
unsigned bit3: 1;
unsigned bit4: 1;
unsigned bit5: 1;
unsigned bit6: 1;
unsigned bit7: 1;
} oneBit;
} TESTFlag;
The operation when setting one of these bits is as follows: TESTFlag.oneBit.bit5=1; //bit5 position 1
The operation for batch resetting of bit variables is as follows: TESTFlag.allBits=0; //batch resetting of bit variables
It should be noted that the compiler does not reserve address space for absolutely positioned variables.
The address of the variable TESTFlag in the above routine is 0x20, but the last address of 0x20 may be assigned to other by the compiler
Variables are used, so an address conflict occurs. Therefore, the absolute address of the user-defined variable needs to be prefixed when defining the variable
The volatile statement prevents the compiler from automatically optimizing the allocation address.
Such usage will reduce the efficiency of RAM usage, so it is not recommended to define absolute addresses of variables in general program design.
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1. FT60F01X
PA3 is a unidirectional input port. When the input port is used, it must be pulled up externally
Only when PA3 is set as the reset pin, the internal weak pull-up will be turned on
FT60F011A-RB If PA3 is not used in the actual project, it should be set as the reset pin to reduce power consumption
FT60F010A-URB PA3 is not packaged and must be set as the reset pin
2. FT60F02X
Turn off the analog function of the comparator, and set CxIN as a digital IO pin: CMCON0: CM[2:0]=111
3. FT60F12X/FT60F11X
1) CLKO:
After the E version, CLKO is mapped to PC5, and from time to time PA6
Set external crystal oscillator: FOSC: XT (PA6, PA7 connect to high-speed crystal 4~20Mhz)
B, IESO: Disable (Do not enable dual-speed clock), IRCF can be set freely
3) PWM
When PWM duty cycle-PWM period = 1, the level of PWM output will be reversed, and the user needs to write a program to avoid this problem
4. FT61F02X
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5. FT61F04X
1) Op Amp
The op amp can only input negative voltage, if the input signal is positive voltage, it is recommended that customers use FT64F0AX
6. FT61F14X
PB0 cannot output PWM alone, only PA1 output alone, when PB0 is set, PA1 will also output PWM
When TIM2_CH1 output is enabled, PB0 cannot be configured as TIM1_CH2 output, otherwise PB0 will output TIM2_CH1 waveform.
If the system clock is selected as HIRC and TIM4 uses LP, the system clock cannot be turned off during sleep, and the power consumption is not small. Currently, it can be set
Set, enter sleep, system clock is set to internal 32K, TIM4 interrupt wake-up 6014 7001 6006 are the same
7. FT62F08X/FT61F08X
In the C language program, the interrupt function must be reserved, otherwise the compiler will report an error
FSECPB0 If sector encryption is enabled, CHECKSUM cannot be read. Note that other sector encryption will not affect
2. The analog channel 1/4VDD is a resistor divider sampling. CHS[3:0] should be switched to other channels before sleep, otherwise it will consume power and conduct
4) FT62F088-LRB, when used as a touch function, PC7 is occupied by the touch library, it must be left floating and cannot be used as a normal IO port
8. FT62F21X/FT60F21X
The lower 7 bits of P1DDTL cannot be 0 at the same time, for example, when P1DDTL=0X80, P1D outputs low level instead of PWM
The waveform and mapping are also the same. Currently, this can only be circumvented by software, and P1CDTH needs to be assigned.
9. FT62F13X/FT61F13X
1) PA3, PA5 are not encapsulated models, they are tied to GND, and the software should not set them high to avoid leakage
2) FT61F131B-RB, PB3 (PC0) closed, PA1 (PA4) closed, an IO port must be set as a floating input to be normal
3) When the instruction cycle is set to 4T, the EFT anti-interference characteristics of IO will be stronger