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Vlsi Lab

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16 views

Vlsi Lab

Uploaded by

bandi.praneeshreddy2024
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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VLSI SYSTEM DESIGN LAB

Name: Preeti Kumari

Reg. No.: 22BLC1324

Faculty: Dr. Bindu B

Course Code: BECE303P

Experiment 1: NMOS characteristics and parametric analysis

Aim

To understand the I-V characteristics of the NMOS.


● Drain current vs gate voltage
● Channel length modulation
● Drain current vs drain voltage with parametric analysis
● Body effect

Schematic
Waveforms

Id-Vgs characteristics

The threshold voltage comes around 0.6 V

Id-Vd characteristics (channel length modulation)

λ=(103.063μA-94.387μA)/(992.3872mV-715.824mV)=0.03137 μA/mV
Hence the channel length coefficient is found to be 0.03137 μA/mV

Id-Vd (parametric analysis)


Body effect

Inference

Hence, the IV characteristics for NMOS transistor have been analysed.


Experiment 2: CMOS power delay

Aim

To determine IV characteristics of CMOS inverter.


● DC characteristics with parametric analysis
● Noise margin
● Transient analysis with delay and power calculation

Schematic
Waveforms

Delay-Rising=9.862ps Falling=2.897ps
The power consumed is observed to be 680uW.

Inference

Hence the power delay has been seen and verified.


Experiment 3: NAND and NOR gates

Aim

To do the symbol creation, the transient analysis and the DC for NAND and NOR gates.

Schematic

NAND
NOR

Symbol

NAND
NOR

Waveform

NAND
Rising=9.365ps
Falling=6.875ps
The power consumed is observed to be 90μW.

NOR
Rising=3.05ps
Falling=8.64ps
The power consumption is observed to be 90μW.

Inference

Hence the output for the NAND gate and the NOR gate has been verified.
Experiment 4: Logical Expressions

Aim

To implement logical functions using CMOS logic and/or pre-defined gates and
appreciate their logical outputs

Logical Expressions

1. (AB+C)’

2. ((A+BC)+EFG)'

Schematic

Expression 1
Expression 2

Waveform

Expression 1
Expression 2

Inference

Hence the logical expressions and their inputs and outputs have been seen and analysed.

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