Engineering Computing Academy of

Science and Technology

ACCEE9 – Logic Circuits and Switching
Theory

Course Code ACEE 9

Course Description Logic Circuits and Switching Theory
Module No. and Title Introduction to Logic Circuits and
Switching Theory

I. Introduction: This module provides a comprehensive introduction to the fundamentals of logic circuits and
switching theory.
II. Learning Objectives: By the end of this module, students should be able to:
1. Understand the concepts and techniques of number systems and codes in representing numerical values in
various number systems and perform number conversions between different number systems and codes.
2. Apply the simplification methods to simplify the given Boolean function

III. Lesson 1: Computer Number System and Codes

Digital Systems
● Digital systems consider discrete amounts of data
Examples
26 letters in the alphabet
10 decimal digits
● Larger quantities can be built from discrete values:
Words made of letters
Numbers made of decimal digits (e.g. 239875.32)
● Computers operate on binary values (0 and 1)
● Easy to represent binary values electrically
Voltages and currents
Can be implemented using circuits
Create the building blocks of modern computers

Understanding Decimal Numbers

Decimal numbers are made of decimal digits:
(0,1,2,3,4,5,6,7,8,9) ⇒ Base = 10
How many items does decimal number 8653 represents?
1000 100 10 1 Weight
8653 = 8 x103 + 6 x102 + 5 x101 + 3 x100
Number = d3 x B3 + d2 x B2 + d1 x B1 + d0 x B0 = Value
What about fractions?
97654.35 = 9x104 + 7x103 + 6x102 + 5x101 + 4x100 + 3x10-1 + 5x10-2
In formal notation → (97654.35)10

Understanding Octal Numbers

Octal numbers are made of octal digits:
(0,1,2,3,4,5,6,7)
How many items does an octal number represent?
512 64 8 1 = Weights
(4536)8 = 4x83 + 5x82 + 3x81 + 6x80 = (2398)10
What about fractions?
(465.27)8 = 4x82 + 6x81 + 5x80 + 2x8-1 + 7x8-2
Octal numbers don’t use digits 8 or 9

Understanding Hexadecimal Numbers

Hexadecimal numbers are made of 16 digits:
(0,1,2,3,4,5,6,7,8,9,A, B, C, D, E, F)
How many items does a hex number represent?
4096 256 16 1 = Weights
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ACCEE9 – Logic Circuits and Switching
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(3A9F)16 = 3x163 + 10x162 + 9x161 + 15x160 = 1499910
What about fractions?
(2D3.5)16 = 2x162 + 13x161 + 3x160 + 5x16-1 = 723.312510
Note that each hexadecimal digit can be represented with four bits
(1110)2 = (E)16
Groups of four bits are called a nibble
(1110)2

Understanding Binary Numbers

Binary numbers are made of binary digits (bits):
0 and 1
How many items does a binary number represent?
8 4 2 1 = Weights
(1011)2 = 1x23 + 0x22 + 1x21 + 1x20 = (11)10
What about fractions?
(110.10)2 = 1x22 + 1x21 + 0x20 + 1x2-1 + 0x2-2
Groups of eight bits are called a byte
(11001001)2
Groups of four bits are called a nibble
(1101)2

Putting It All Together

Binary, octal, and
hexadecimal are similar

Easy to build circuits

to operate on these
representations

Possible to convert
between the three
formats

Why Use Binary Numbers?

Easy to represent 0 and 1
using electrical values
● Possible to tolerate noise
● Easy to transmit data
● Easy to build binary circuits
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ACCEE9 – Logic Circuits and Switching
Theory
Conversion Between Number Bases
Decimal (base 10)
Binary (base 2)
Hexadecimal (base 16)
●Learn to convert between bases
●Already demonstrated how to convert from binary to decimal

Convert an Integer from Decimal to Another Base

For each digit position:
1. Divide decimal number by the base (e.g. 2)
2. The remainder is the lowest-order digit
3. Repeat first two steps until no divisor remains
Example for (13)10:
Quotient Remainder Coefficient
13/2 = 6 + 1 a0 = 1
6/2 = 3 + 0 a1 = 0
3/2 = 1 + 1 a2 = 1
1/2 = 0 + 1 a3 = 1
Answer (13)10 = (a a a a )2 = (1101)2
3 2 1 0

MSB LSB

Convert a Fraction from Decimal to Another Base

For each digit position:
1. Multiply decimal number by the base (e.g. 2)
2. The integer is the highest-order digit
3. Repeat first two steps until fraction becomes zero
Example for (0.625)10:
Integer Fraction Coefficient
0.625 x 2 = 1 + 0.25 a-1 = 1
0.250 x 2 = 0 + 0.50 a-2 = 0
0.500 x 2 = 1 + 0 a-3 = 1
Answer (0.625)10 = (0.a a a )2 = (0.101)2
-1 -2 -3

MSB LSB
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The Growth of Binary Numbers

Convert an Integer from Decimal to Octal

For each digit position:
1. Divide decimal number by the base (8)
2. The remainder is the lowest-order digit
3. Repeat first two steps until no divisor remains
Example for (175)10:
Quotient
175/8 = 21 + 7 a0 = 7
21/8 = 2 + 5 a1 = 5
2/8 = 0 + 2 a2 = 2
Remainder Coefficient
Answer (175)10 = (a2 a1 a0)8 = (257)8

Convert a Fraction from Decimal to Octal

For each digit position:
1. Multiply decimal number by the base (e.g. 8)
2. The integer is the highest-order digit
3. Repeat first two steps until fraction becomes zero
Example for (0.3125)10:
Integer
0.3125 x 8 = 2 + 0.5 a-1 = 2
0.5000 x 8 = 4 + 0.0 a-2 = 4
Fraction Coefficient
Answer (0.3125)10 = (0.24)8

Lesson 2: Logic Gates and Truth Tables

These are devices that implement a Boolean function, that is they perform logical operations on one or
more logical inputs to produce a single logical output. Every terminal has one of the two binary conditions:
low (0) and high (1) represented by different voltage levels.
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ACCEE9 – Logic Circuits and Switching
Theory
AND Gates:
A dot (.) is used to show the AND
When at all inputs are high (1) the output will be high (1). operation i.e. A.B - Bear in mind
that this dot is sometimes omitted
Input X Input Y Output i.e. AB
1 1 1
1 0 0
0 1 0
0 0 0

NAND Gates:

“NOT AND”, hence when at least one input is high (1) the output is high(1). If both inputs are high (1) the
the output is low (0). It is represented as A.B (or AB)
Input X Input Y Output
with a bar over the top. In the
1 1 0
exam we put ¬ with the object
1 0 1
0 1 1 of interest in brackets AFTER
0 0 1 the
¬ instead of the bar. NOT is
This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. Or two NOT gates followed by an
applied after AND.
OR gate.

OR Gates:
When one or more of the inputs is high (1) the output will be high (1).
It is represented as A + B.
Input X Input Y Output
1 1 1 Be careful + means OR.
1 0 1
0 1 1
0 0 0

NOR Gates:

When any one of the inputs is high (1), the output will be low (0). If both inputs are low (0), the output is high (1).

Input X Input Y Output

1 1 0
It is represented as NOT(A
1 0 0
0 1 0 or B), hence ¬(A + B), or A
0 0 1 +B

Same as an OR gate with a NOT gate

XOR Gates:

`Exclusive Or gates’. These will only ever give an output that is high (1) when either, not both of the inputs is high
(1).
It is represented as A B.
Input X Input Y Output Where the encircled plus `
1 1 0 ’ is sued to show the XOR
1 0 1 operation.
0 1 1
0 0 0
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ACCEE9 – Logic Circuits and Switching
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XNOR:

`Exclusive NOT OR’, does the opposite to an XOR gate. It will give a low (0) output if either, but not both, of the
inputs is high (1). Only when the inputs are the same state (both 1 or both 0) will the output be high (1). If
only one input is high then the output will be low.
It is represented as
Input X Input Y Output ¬(A B). Where the XOR
1 1 1
function is applied
1 0 0
before the NOT
0 1 0
0 0 1 operation.
Sometimes = A.B + (¬A.¬B)
Same as an AND gate paralleled with an AND gate that has both inputs inverted by 2 NOT gates. This is then fed into
an OR gate.
NOT Gates:
It is represented as
Sometimes called an inverter. The output is the opposite to the input.
¬ followed by item(s) of
Input X Output interest in brackets. Or by
1 0 a bar drawn over items
0 1 being inverted.

A NOT gate can be created with NAND gate where the inputs are linked so identical. Therefore when the single
input is low (0), it creates two identical conditions - 2 low inputs (0). The output is high Since at least one low
input is required for a high output (1).

When the single input is high (1), two identical high inputs are created (1). The output is low since at least one
input needs to be low (0) for a high (1) output.

The exam board only ever uses:

 ^ = AND
 V = OR
 ¬ = NOT
 () = brackets
 ≡ means can be written as (identity)
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ACCEE9 – Logic Circuits and Switching
Theory
Lesson
Boolean algebra = The3:branch
Boolean Algebrawhere the values of the variables are the truth values of true (1) and
of algebra
false
(0). The main operations are addition and multiplication and the multiplicative inverse function.

+ or V means add (OR)

. or ^ Means multiply (AND)

¬ Means invert (raise by the power of -1) (multiplicative inverse function.)

Logic Gate Diagrams

Logic gates may be combined to form logic gate diagrams that perform more complicated logical
operations. Truth tables are used to show the states of each terminal and hence the logical operations.

e.g.

Inputs Intermediate outputs Output

A B C D E R
1 1 1 1 0 1
1 1 0 1 1 1
0 0 0 0 1 1
0 0 1 0 0 0
0 1 1 0 0 0
1 0 1 0 0 0
1 0 0 0 1 1
0 1 0 0 1 1
e.g. 2) What is the algebraic expression, where variables are denoted with Boolean logic for the
following logic gate diagram? Give the truth table for this.

Expression = ¬ [(A V B) ^ C]
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Inputs Intermediate outputs Output

A B C D E F G
1 1 1 1 0 0 1
1 1 0 1 1 1 0
0 0 0 0 1 0 1
0 0 1 0 0 0 1
0 1 1 1 0 0 1
1 0 1 1 0 0 1
1 0 0 1 1 1 0
0 1 0 1 1 1 0

Rules for simplifying Boolean Algebra

De Morgan’s Law:

Rule 1) Either logical function AND or OR may be replaced by the other, given certain changes to the
equation.

NOT (A OR B) is the same as (NOT A) AND (NOT B)

i.e. ¬(A V B) ≡ (¬A) ^ (¬B)
Likewise, NOT (A AND B) is the same as (NOT A) OR (NOT B)
i.e. ¬(A^B) ≡ (¬A) V (¬B)

An analogy in English is: It cannot be winter AND summer at any point in time which is the same as: At any point
in time, It is NOT winter OR it is NOT summer.
The Law of distribution:

Rule 2) This law allows for the multiplying or factoring out the common terms of an expression.

The OR distributive law: A AND (B OR C) is the same as (A AND B) OR (A AND C)

i.e. A^(B V C) ≡ (A^B) V (A ^ C)
The AND distributive law: A OR (B AND C) is the same as (A OR B) AND (A OR C)
i.e. A V (B^C) ≡ (A V B) ^ (A V C)

An analogy in English is:

You can choose 1 main course AND either a starter OR dessert. This is the same as you can choose 1 main AND 1
starter OR main AND 1 desert
You can choose a cake OR a biscuit AND a milkshake.
This is the same as you can choose a cake or a biscuit AND a cake or a milkshake.

The Law of association:

Rule 3) This law allows for the removal of brackets from an expression and regrouping of the variables.

The OR association law: A OR (B OR C) is the same as A OR B OR C

i.e. AV (B V C) ≡ A V B V C
The AND association law: A AND (B AND C) is the same as A AND B AND C
i.e. A ^ (B^C) ≡ A ^ B ^ C

The Law of commutation:

Rule 4) The order of application of two separate terms is not important so does not affect end result.

A OR B is the same as B OR A i.e. A V B ≡ B V A

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A AND B is the same as B AND A i.e. A ^ B ≡ B ^ A

The rule of double negation:

Rule 5) If a variable is reversed twice then it remains the same.
NOT NOT A is the same as A i.e. ¬(¬A) ≡ A
The rule of absorption:

Rule 6) The second term inside a bracket can always be eliminated (absorbed) by the term outside the
bracket i given results are met.
A OR ( A AND B) is the same as A i.e. A V (A ^ B) ≡ A
A AND(A OR B) is the same as A i.e. A ^ (A V B) ≡ A

- The operators inside and outside the brackets must be different.

- The term outside the brackets must also be included inside the brackets.
In addition to these 6 rules. There are also 8 general rules (for AND and OR gates) that can be applied very
quickly.

Simplifying Boolean algebra

Two important rules

1. Order of precedence (this is a rule)
If we have: (A^B) V ¬C
It is written in word form as: (A AND B) OR NOT C The order of precedence is not followed by and
followed by or.
2. Rules of Boolean algebra
A ^ ¬A = 0 (Because when A =1 Output = 0, A = 0 output = 0)
A V ¬A = 1 (Because one of the terms will always be a 1)

When a Boolean expression is not in the simplest form it can make it difficult to understand and the logical
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statement may require many logic gate components so it is not an efficient circuit.

Simplifying Boolean algebra

i) A ^ B V A ^ (BVC) V B ^ (B V C)
A AND B OR A AND (B OR C) OR B AND (B OR C) (Writing in letters and adding brackets) A AND B
OR (A AND B) OR (A AND C) OR B (Rule of absorption)
A AND B OR A AND C OR B (Removing repeated term)
B OR (A AND B) OR A AND C (Reordering and adding brackets)
B OR A AND C (Rule of absorption)
= B V A^C (This is the simplest form of the same original expression)
We can see how this would save on logic gate components making a circuit more efficient.

This saves money on components, makes circuits smaller, reduces energy consumption, reduces stock levels for
manufacturers.

Simplifying Boolean algebra

1. Simplify the expression (A^¬A)VB

= (A AND NOT A) OR B0 OR B (we can never get true from A)  B

2. Simplify the expression (A V B) V (A^C)

= (A OR B) OR (A AND C)  B OR A OR (A AND C)  B OR A  A V B

3. Simplify the expression ¬(A^¬B) V (¬A^B)

= NOT(A AND NOT B) OR (NOT A AND B) NOT A AND B OR NOT A AND B  NOT A AND B  ¬A ^ B

4. Simplify the expression (A^B) V (A^(B^C)) V (B^(BVC))

= A AND B OR A AND (B OR C) OR B AND B OR C  (A^B) V (A^(B^C)) V B  B V (A^B) V (A^(B^C)) 

B V (A^(B^C))  B V (A ^ B ^ C)  B

Simplify the expression ¬R = ¬(¬A^(BVC))

= ¬¬A V ¬(BVC) The and became or as it was inversed by the ¬, however, the sign within brackets has not
changed yet only the brackets have been inversed “¬(BVC)” Technically part of De
Morgan’s Law
= A V ¬B ^ ¬C Once again the NOT will inverse the OR sign to become an AND when expanding De Morgan’s Law
= This can’t be simplified further: A V ¬B ^ ¬C
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Class examples

2. (AVB) V (A^C) 1. (A^B) V A^(BVC)

= A V B V (A^C)  B V A V (A^C)  A V B = (A^B) V (A^B) V (A^C) = (A^B) V (A^C)

3. ¬A V ¬B V ¬(AVB)
= ¬A V ¬B V ¬A V ¬B = ¬A V ¬B
Lesson 4: K-Maps

KARNAUGH MAP MINIMIZATION

A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used,
will produce the simplest SOP or POS expression possible, known as the minimum expression. As you have
seen, the effectiveness of algebraic simplification depends on your familiarity with all the laws, rules, and
theorems of Boolean algebra and on your ability to apply them. The Karnaugh map, on the other hand,
provides a "cookbook" method for simplification.
A Karnaugh map is similar to a truth table because it presents all of the possible values of input variables
and the resulting output for each value. Instead of being organized into columns and rows like a truth
table, the Karnaugh map is an array of cells in which each cell represents a binary value of the input
variables. The cells are arranged in a way so that simplification of a given expression is simply a matter of
properly grouping the cells. Karnaugh maps can be used for expressions with two, three, four. and five
variables. Another method, called the Quine-McClusky method can be used for higher numbers of variables.
The number of cells in a Karnaugh map is equal to the total number of possible input variable
combinations as is the number of rows in a truth table. For three variables, the number of cells is 23 = 8. For
four variables, the
number of cells is 24 = 16.

The 3-Variable Karnaugh Map

The 3-variable Karnaugh map is an array of eight cells. as shown in Fig.(5- 1)(a). In this case, A, B, and C
are used for the variables although other letters could be used. Binary values of A and B are along the left
side (notice
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the sequence) and the values of C are across the top. The value of a given cell is the binary values of A and B
at the left in the same row combined with the value of C at the top in the same column. For example, the cell
in the upper left corner has a binary value of 000 and the cell in the lower right corner has a binary value of
101. Fig.(5-1)( b) shows the standard product terms that are represented by each cell in the Karnaugh
map.

(a) (b) Fig.(5-1) A 3-variable Karnaugh map showing product terms.

The 4-Variable Karnaugh Map

The 4-variable Karnaugh map is an array of sixteen cells, as shown in Fig.(5- 2)(a). Binary values of A and
B are along the left side and the values of C and D are across the top. The value of a given cell is the binary
values of A and B at the left in the same row combined with the binary values of C and D at the top in the
same column. For example, the cell in the upper right corner has a binary value of 0010 and the cell in the
lower right corner has a
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binary value of 1010. Fig.(5-2)(b) shows the standard product terms that are represented by each cell in
the 4-variable Karnaugh map.

(a) (b)
Fig.(5-2) A 4-variable Karnaugh map.

Cell
Adjacency
The cells in a Karnaugh map are arranged so that there is only a single- variable change between adjacent
cells. Adjacency is defined by a single- variable change. In the 3-variable map the 010 cell is adjacent to the
000 cell, the 011 cell, and the 110 cell. The 010 cell is not adjacent to the 001 cell, the 111 cell, the 100 cell,
or the 101 cell.
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KARNAUGH MAP SOP MINIMIZATION
For an SOP expression in standard form, a 1 is placed on the Karnaugh map for each product term in the
expression. Each 1 is placed in a cell corresponding to the value of a product term. For example, for the
product term ABC, a 1 goes in the 10l cell on a 3-variable map.

Example
Map the following standard SOP expression on a Karnaugh map: see Fig.(5-4).

Example
Map the following standard SOP expression on a Karnaugh map:

See Fig.(5-5).
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Example

Map the following SOP expression on a Karnaugh map: Solution

The SOP expression is obviously not in standard form because each product term does not have three
variables. The first term is missing two variables, the second term is missing one variable, and the third
term is standard. First expand the terms numerically as follows:

Example
Map the following SOP expression on a Karnaugh map:

Solution
The SOP expression is obviously not in standard form because each product term does not have four
variables.
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Map each of the resulting binary values by placing a 1 in the appropriate cell of the 4- variable Karnaugh
map.

Karnaugh Map Simplification of SOP Expressions

Grouping the 1s, you can group 1s on the Karnaugh map according to the following rules by enclosing those
adjacent cells containing 1s. The goal is to maximize the size of the
groups and to minimize the number of groups.
A group must contain either 1, 2, 4, 8, or 16 cells, which are all
powers of two. In the case of a 3-variable map, 23 = 8 cells is the maximum group.
Each cell in a group must be adjacent to one or more cells in that same group.
Always include the largest possible number of 1s in a group in accordance with rule 1.
Each 1 on the map must be included in at least one group. The 1s already in a group can be included in
another group as long as the overlapping groups include noncommon 1s.
Example:
Group the 1s in each of the Karnaugh maps in Fig.(5-6).

Fig.(5-6)
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Solution:
The groupings are shown in Fig.(5-7). In some cases, there may be more than one way to group the 1s to
form maximum groupings.

Fig.(5-7)
Determine the minimum product term for each group.
a. For a 3-variable map:
(1) A l-cell group yields a 3-variable product term
(2) A 2-cell group yields a 2-variable product term
(3) A 4-cell group yields a 1-variable term
(4) An 8-cell group yields a value of 1 for the expression

b. For a 4-variable map:

(1) A 1-cell group yields a 4-variable product term
(2) A 2-cell group yields a 3-variable product term
(3) A 4-cell group yields a 2-variable product term
(4) An 8-cell group yields a 1-variable term
(5) A 16-cell group yields a value of 1 for the expression Example:
Determine the product terms for each of the Karnaugh maps in Fig.(5-7) and
write the resulting minimum SOP expression.

Fig.(5-8)

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Solution:
The resulting minimum product term for each group is shown in Fig.(5-8). The minimum SOP expressions
for each of the Karnaugh maps in the figure are:

(a) AB+BC+ABC (C) AB + AC + ABD

(b) B + A C + AC (d) D + ABC + BC

Example: Use a Karnaugh map to minimize the following standard SOP expression:
ABC + ABC + ABC + ABC + ABC

Example: Use a Karnaugh map to minimize the following SOP expression:

"Don't Care" Conditions

Sometimes a situation arises in which some input variable combinations are not allowed. For example,
recall that in the BCD code there are six invalid combinations: 1010, 1011, 1100, 1101, 1110, and 1111.
Since these unallowed states will never occur in an application involving the BCD code, they can be treated
as "don't care" terms with respect to their effect on the output. That is, for these "don't care" terms either a
1 or a 0 may be assigned to the output: it really does not matter since they will never occur.
The "don't care" terms can be used to advantage on the Karnaugh map. Fig.(5-9) shows that for each
"don't care" term, an X is placed in the cell. When grouping the 1 s, the Xs can be treated as 1s to make a
larger grouping or as 0s if they cannot be used to advantage. The larger a group, the simpler the resulting
term will be.
The truth table in Fig.(5-9)(a) describes a logic function that has a 1 output only when the BCD code for
7,8, or 9 is present on the inputs. If the "don't cares" are used as 1s, the resulting expression for the function
is A + BCD, as indicated in part (b). If the "don't cares" are not used as 1s, the resulting

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expression is ABC + ABCD: so you can see the advantage of using "don't care" terms to get the simplest
expression.
Fig.(5-9)

KARNAUGH MAP POS MINIMIZATION

In this section, we will focus on POS expressions. The approaches are much the same except that with POS
expressions, 0s representing the standard sum terms are placed on the Karnaugh map instead of 1s.

For a POS expression in standard form, a 0 is placed on the Karnaugh map for each sum term in the
expression. Each 0 is placed in a cell corresponding to the value of a sum term. For example, for the sum
term A + B + C, a 0 goes in the 0 1 0 cell

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on a 3-variable map.

When a POS expression is completely mapped, there will be a number of 0s on the Karnaugh map equal to
the number of sum terms in the standard POS expression. The cells that do not have a 0 are the cells for
which the expression is 1. Usually, when working with POS expressions, the 1s are left off. The following
steps and the illustration in Fig.(5-10) show the mapping process.
Step 1. Determine the binary value of each sum term in the standard POS expression. This is the binary
value that makes the term equal to 0.
Step 2. As each sum term is evaluated, place a 0 on the Karnaugh map in the corresponding cell.

Fig.(5-
10)

Example of mapping a standard POS expression.

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Example:
Map the following standard POS expression on a Karnaugh map: Solution:

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Karnaugh Map Simplification of POS Expressions

The process for minimizing a POS expression is basically the same as for an SOP expression except that you
group 0s to produce minimum sum terms instead of grouping 1s to produce minimum product terms. The
rules for grouping the 0s are the same as those for grouping the 1s that you learned before.
Example:
Use a Karnaugh map to minimize the following standard POS expression: Also, derive the equivalent SOP
expression.
Solution:

Example: Use a Karnaugh map to minimize the following POS expression:

Example: Using a Karnaugh map, convert the following standard POS expression into a minimum POS
expression, a standard SOP expression, and

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a minimum SOP expression.

DSD UNIT 2 NOTES

 Engineering-Computing
Academy of Science and Technology
(E-CoAST)

IV. ASSESSMENT
1. Students will be given a seat work on number conversion.
2. Students will be given a problem solving assignment regarding boolean simplification.

V. REFERENCES:

Textbooks:

 Digital Design: Principles and Practices by John F. Wakerly: This is a classic textbook that
provides a comprehensive introduction to digital logic, including logic gates, Boolean algebra, and
K-maps.
 Computer Organization and Design: The Hardware/Software Interface by David A. Patterson
and John L. Hennessy: While primarily focused on computer architecture, this book also covers
the fundamentals of digital logic, including logic gates, Boolean algebra, and K-maps.
 Fundamentals of Digital Logic Design by Charles H. Roth: This textbook offers a detailed
exploration of digital logic concepts, with a strong emphasis on Boolean algebra and K-maps.

Online Resources:

 TutorialsPoint: https://web.stanford.edu/class/archive/engr/engr40m.1178/reader/chapter4.pdf
Provides tutorials on various digital logic concepts, including logic gates, Boolean algebra, and K-
maps.
 W3Schools: https://www.geeksforgeeks.org/digital-electronics-logic-design-tutorials/ Offers a
basic introduction to digital logic, including logic gates and Boolean algebra.
 All About Circuits: https://www.allaboutcircuits.com/ A comprehensive website covering
electronics and electrical engineering, with detailed explanations of logic gates, Boolean algebra,
and K-maps.
 Engineering-Computing
Academy of Science and Technology
(E-CoAST)

 Khan Academy: https://www.khanacademy.org/computing/computer-science/how-computers-

work2/v/khan-academy-and-codeorg-circuits-logic Provides video tutorials on digital logic
concepts, including logic gates and Boolean algebra.
 Coursera: https://www.coursera.org/learn/digital-systems Offers online courses on digital logic,
often including topics like logic gates, Boolean algebra, and K-maps.

Prepared by: Reviewed by: Recommending Approval: Approved:

Ariel Y. Leonin Virgo C. Lopez

Jane M. Fernandez, DIT Director for Curriculum VP for Academics
Armie Q. E-CoAST, Dean & Instruction
Valencia
E-CoAST