Experiment 1

Aims & Objectives:

(a) Design and implement an inverting amplifier using Op Amp 741 for the given gain.
(b) Design and implement a non-inverting amplifier using Op Amp 741 for the given gain.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Multimeter, Bread Board, and CRO probes.
Components Required: Resistors, Op Amp IC 741.
Inverting Amplifier:
The inverter is the basic building block of any circuit. This is perhaps the most widely used of all the
Op Amp circuits. The circuit of inverting amplifier is shown in Fig.1.1. The output voltage 𝑣𝑜 is
feedback to the inverting input terminal through the resistor 𝑅𝐹 and 𝑅1 network. Input signal 𝑣𝑖 (ac)
is applied to the inverting input terminal through R1 and non-inverting input terminal of Op Amp is
grounded. For simplicity let us assume an ideal Op Amp. As 𝑣𝑑 = 0, node ‘a’ is at virtual ground
potential. Writing nodal equation at point ‘a’ yields;
𝑣 𝑣
𝑖𝑖 + 𝑖𝑓 = 0, 𝑅𝑖 + 𝑅𝑜 = 0
1 𝐹
𝑅𝐹
𝑣𝑜 = − 𝑅 𝑣𝑖 RF (1)
1
𝑖𝑓
R1 2 +VCC=15V
a - 7
𝑖1 𝑖𝑖 = 0 6
Vi A VO
+ 4
3
-VEE= -15V
Fig. 1.1 Inverting Amplifier

Vi

VO
𝑡

Fig.1.2 Input & Output waveforms

1
Non-inverting Amplifier:

If a signal (ac) is applied to the non-inverting input terminal and feedback is given as shown in
Fig.1.3, the circuit amplifies the input signal without inverting it. Such a circuit is called non-inverting
amplifier. It may be noted that it is also a negative feedback system as output is being fed back to the
inverting input terminal.

As the differential input voltage 𝑣𝑑 at the input terminal of Op Amp is zero, the voltage at node ‘a’
in Fig.1.3 is 𝑣𝑖 , same as the input voltage applied to non-inverting input terminal. Now 𝑅𝐹 and 𝑅1
forms a potential divider. Writing nodal equation at point a yields;
𝑣 𝑣 −𝑣 𝑣 𝑣 𝑣
𝑖1 = 𝑖𝑓 , 𝑅𝑖 = 𝑜𝑅 𝑖, 𝑅𝑖 + 𝑅 𝑖 = 𝑅𝑜
1 𝐹 1 𝐹 𝐹
𝑅𝐹
𝑣𝑜 = {1 + 𝑅 } 𝑣𝑖 (1)
1

RF 𝑖𝑓
R1 a 2 +VCC=15V
- 7
𝑖1 𝑖𝑖 = 0
A 6
VO
+ 4
3
Vi -VEE= -15V

Fig. 1.3 No-inverting Amplifier

Vi
t

VO
t

Fig.1.4 input & output Waveforms

Procedure:
1. Rig up the circuit on the breadboard.
2. Apply the given inputs and observe the corresponding output voltages on CRO, keeping the
Frequency of the input signal fixed.
3. Draw the input and output waveforms on tracing paper.
4. Change the practical values of resistors R1 & RF for variable the gain and observe the output.
5. Calculate the gain for various values of R1 & RF.
6. Plot the outputs waveform for various values of RF on the graph paper for a fixed value of R1.

2
Observations:
Inverting Amplifier:
S No. Resistors Input Output Gain Comment
R1 RF Voltage Frequency Voltage
1. 1k 1k 10mV 1kHz
2. 1k 2.2k 20mV 1kHz
3. 1k 3.0k 30mV 1kHz
4. 1k 5.1k 40mV 1kHz
5. 1k 6.2k 50mV 1kHz
6. 1k 8.2k 60mV 1kHz
7. 1k 10k 70mV 1kHz

Non-inverting Amplifier
S No. Resistors Input Output Gain Comments
R1 RF Voltage Voltage
1. 1k 1k 10mV
2. 1k 2.2k 20mV
3. 1k 3.0k 30mV
4. 1k 5.1k 40mV
5. 1k 6.2k 50mV
6. 1k 8.2k 60mV
7. 1k 10k 70mV
Calculations:

Gain Calculation: Inverting Amplifier:

Non Inverting Amplifier

Comments and Discussions:

QUESTIONS:
1. What do you mean by an Operational Amplifier?
2. How do you differentiate between an ideal Op Amp from a Practical Op Amp?
3. Why the pin no.1 & 5 N.C. for 741 IC?
4. How the circuit behaves if RF = R1 in a non-inverting configuration?

3
4
 Experiment 2
Aims & Objectives:
(a) Implement a voltage follower circuit using Op Amp 741 and calculate its voltage gain.
(b) Design and implement a summing amplifier (adder circuit) for at least three inputs using
Op Amp 741 for the given gain.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Multimeter, Bread Board, and CRO probes.
Components Required:
Resistors, Op Amp IC 741.

(a) Voltage follower:

A voltage follower is a circuit which uses Op Amp in non-inverting configuration with gain equal to
unity. The circuit is as shown in Fig. 2.1.
𝑣
𝑣𝑖 − 𝑣𝑜 = 0 ≅ 0 as A→∞
𝐴
𝑣𝑜 = 𝑣𝑖 (1)

2 +VCC=15V
− 7
A 6
3 VO
+ 4
-VEE=-15V
Vi

Fig.2.1 Voltage follower

This circuit turns out to be a very useful service, because the input impedance of the op amp is very
high, giving effective isolation of the output from the signal source. We draw very little power from
the signal source, avoiding "loading" effects. The voltage follower is often used for the construction
of buffers for logic circuits.

Vi
t

VO
VO=Vi
t

Fig. 2.2 Input & Output waveforms for voltage follower

5
 (b) Summing Amplifier:
Op Amp may be used to design a circuit whose output is the sum of several input signals. Such a
circuit is called a Summing Amplifier.
Inverting Summing Amplifier:
A typical summing amplifier with three input voltages 𝑣1 , 𝑣2 and 𝑣3 , three input resistors 𝑅1 , 𝑅2 , 𝑅3
and a feedback resistor 𝑅𝐹 is shown in Fig.2.3 The following analysis is carried out assuming that
the Op Amp is an ideal one, that is, AOL = ∞ and 𝑅𝑖 = ∞. Since the input bias current is assumed to
be zero, there is no voltage drop across the resistor Rcomp and hence the non-inverting input terminal
is at ground potential. Writing nodal equation at the summing point ‘S’ yields;
𝑣1 𝑣 𝑣 𝑣
+ 𝑅2 + 𝑅3 + 𝑅𝑜 = 0
𝑅
1 2 3 𝐹
𝑅𝐹 𝑅𝐹 𝑅𝐹
𝑣𝑜 = − { 𝑣1 + 𝑣2 + 𝑣3 } = −{𝑣1 + 𝑣2 + 𝑣3 }, For RF = R1 = R2 = R3. (1)
𝑅1 𝑅2 𝑅3

RF
S
R1 R2 R3
𝑖1 𝑖2 𝑖3 +VCC=+15V
𝑖𝑓
2 − 7 6
V1 V2 V3 𝑣𝑂
A
3
+ 4
V1
R4 -VEE=-15V

Fig.2.3 Summing Amplifier

Vi
t
10mV
20mV
30mV
60mV
VO 60mV

-60mV
Fig. 2.4 Input and Output waveforms
Procedure:
For Summing Amplifier:
1. Rig up the circuit as shown in the Fig.2.3 on the breadboard.
2. Apply the given inputs and observe the output on CRO.
3. Calculate the amplitude & frequency of the output and draw it using graph paper.
4. Vary the values of inputs to vary the gain and observe the output.
5. Calculate the gain for various values of inputs.
6
6. Draw inputs and output waveforms for various inputs on the tracing paper as in Fig.2.4.
For Slew Rate:
1. Rig up the circuit as shown in the Fig.2.3 on the breadboard.
2. Apply the sine input and increase the frequency.
3. Trace the output and input voltage to indicate different rate in the output voltage.
3. Calculate the gain.
4. Vary the inputs (square & triangular wave) and observe the frequency & amplitude.

Observation Table:
For Summing Amplifier: R1 = R2 = R3 = RF and fixed frequency of 1kHz.

S No. Input Voltage Frequency Output Voltage Gain

1.
2.
3.
4.
:

For Voltage Follower:

S No. Resistors Input Output

R1 RF Voltage Frequency Voltage Frequency

1.
2.
3.
Gain Calculation:
Inverting Summing Amplifier:
Gain = - RF (V1/R1+V2/R2+V3/R3) = - (V1+V2+V3) for RF = R1 = R2 = R3.
For Voltage follower
Gain= Output voltage/input voltage = 1.

Comments and Discussions:

Questions:
1. What is slew rate? What will be the value of slew rate for ideal Op Amp?
2. What do you mean by CMRR & PSRR?
3. What is the operating temperature of 741 IC for Military & Industrial Applications?
4. What are the different applications of summing amplifier?
5. What is the practical value of Slew Rate for 741 IC?

7
8
 Experiment 3
Aims & Objectives:
(a) Design and implement a scalar circuit using Op Amp 741.
(b) Design and implement an averager circuit using Op Amp 741 for the given gain.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, and CRO probes.
Components Required: Resistors, Op Amp IC 741.
Scalar:
Voltages are summed by applying the signals to the same input of the amplifier. Amplifying,
averaging, etc., may be accomplished by input resistor scaling. Inputs are effectively isolated from
each other. Any number of inputs may be used in each of these circuits.
Refer to the circuit made for summing amplifier in experiment 2. If the values of resistances R1,
R2, R3 and RF are chosen such that,
𝑅𝐹 𝑅 𝑅
= 𝐴1 , 𝑅𝐹 = 𝐴2 , and 𝑅𝐹 = 𝐴3 , then
𝑅 1 2 3

The output voltage will be the scaled sum of the input voltages,
𝑅 𝑅 𝑅
𝑣𝑜 = − {𝑅𝐹 𝑉1 + 𝑅𝐹 𝑉2 + 𝑅𝐹 𝑉3 } = −{𝐴1 𝑉1 + 𝐴2 𝑉2 + 𝐴3 𝑉3 }
1 2 3

Here input voltage V1, V2, and V3 are multiplied by scales 𝐴1 , 𝐴2 , and 𝐴3 .
S
R1 R2 R3
𝑖1 𝑖3 +VCC=+15V
𝑖2 𝑖𝑓
2 − 7 6
V1 V2 V3 𝑣𝑂
A
3
+ 4
R4 -VEE=-15V

Figure 3.1 Scalar and average circuit

Averager:
If we take three equal resistors and connect one end of each to a common point, then apply three
input voltages (one to each of the resistors’ free ends), the voltage seen at the common point will be
the mathematical average of the three. Output is inverted average of input signals. Ground unused
inputs to preserve scale.
Refer to the circuit made for summing amplifier in Experiment 2.
𝑅 𝑅 𝑅
𝑣𝑜 = − {𝑅𝐹 𝑣1 + 𝑅𝐹 𝑣2 + 𝑅𝐹 𝑣3 }, If R1 = R2 = R3 = R, then
1 2 3
𝑅𝐹
𝑣𝑜 = − {𝑣1 + 𝑣2 + 𝑣3 }, Now if and RF = R/n, where n = number of inputs, then
𝑅
𝑅
𝑛 {𝑣1 +𝑣2 +𝑣3 } {𝑣 +𝑣 +𝑣 }
1 2 3
𝑣𝑜 = − 𝑅 {𝑣1 + 𝑣2 + 𝑣3 } = − = − 3 (𝑓𝑜𝑟
𝑛 3𝑖𝑛𝑝𝑢𝑡𝑠)
The output voltage will be the mathematical average of the input voltages.

9
 scale of V1=10
scale of V2=10/2.1=4.76
Vi scale of V3=10/3.1=3.23
t

V1 = V2= V3 = 50mV

VO VO1 = 500mV 50mV

VO2 = 238mV
VO2 = 161.5mV
t
VO= 500+238+161.5 = 899.5mV

-50mV

Vi
t
50mV
50mV
50mV
50mV
VO 50mV

-50mV
Fig. 3.2 input and output waveforms of Averager

Observation Table:
For Scalar: Input (V1 =V2 =V3 = 50mV & Fixed Frequency = 1kHz)
S. Resistors (k ) Gains Output Voltages Sum of outputs
No.
R1 R2 R3 RF A1 A2 A3 VO1 VO1 VO1 VO1+VO2+VO3 = VO
1 1.0 2.1 3.1 10.0 10 4.76 3.23 500mV 238mV 161.5mV 899.5V
2 1.0 2.1 3.1 12k
3 1.0 2.1 3.1 15k

For Averager: Input (V1 =V2 =V3 = 50mV & Fixed Frequency = 1kHz)
S.No. Resistors (k ) Input (mV) Output
R1 R2 R3 RF V1 V2 V3 VO
1 3.1 3.1 3.1 1.0 50 50 50 -150/3.1= -48.4mV
2
3

Calculations:
10
Calculate the theoretical output for scalar for different values of scale assumed.
𝑣𝑜 = −(𝐴1 𝑣1 + 𝐴2 𝑣2 + 𝐴3 𝑣3 )
Calculate the theoretical output for Averager for equal values of all resistors used.
𝑣𝑜 = −(𝑣1 + 𝑣2 + 𝑣3 )/3
Comments and Discussions:
Questions:
1. How does an adder differ from a scalar circuit?
2. How do you reduce and adder circuit to an average circuit?
3. Comment on the wave shape of the output signal for an average and scalar circuit.

11
12
 Experiment 4
Aims & Objectives:
(a) Design and implement a difference amplifier (Subtractor) circuit using Op Amp 741 for
the given gain.
(b) Design and implement a comparator using Op Amp 741 and verify the output.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, and CRO probes
Components Required: Resistors, Op Amp IC 74.
Difference Amplifier:
A difference amplifier or subtractor circuit is shown in Fig.4.1. Here, input signals can be scaled to
the desired values by selecting appropriate values for the resistors. When this is done, the circuit is
referred to as scaling amplifier. However, in this circuit all external resistors are of equal value. So
the gain of amplifier is equal to one. The output voltage 𝑣𝑜 is equal to the voltage applied to the non-
inverting terminal minus the voltage applied to the inverting terminal; hence the circuit is called a
subtractor.
𝑅3 𝑣2
𝑣+ = 𝑅 𝑣2 = for R2 = R3.
2 +𝑅3 2
Writing node equation at the inverting input terminal yields;
𝑣1 −𝑣− 𝑣 −𝑣 𝑣
+ 𝑜𝑅 − = 0, 2𝑣− = 𝑣0 + 𝑣1 , 𝑣0 + 𝑣1 = 2𝑣+ = 2 22 = 𝑣2 for R1 = RF.
𝑅1 𝐹
𝑣0 = 𝑣2 − 𝑣1 (1)
RF

R1 +VCC=+15V
𝑣1 − 7 𝑖𝑓
𝑖1 2
𝐴 𝑣𝑂
R2 6
𝑣2 3 + 4
𝑖2 -VEE=-15V
R3

Fig. 4.1 Difference amplifier

Comparator:
A comparator finds its importance in circuits where two voltage signals are to be compared and to be
distinguished on which is stronger and in the design of non-sinusoidal waveform generators as
relaxation oscillators. In an Op Amp with an open loop configuration having a differential or single
input signal greater than 0V, the high gain which goes to infinity drives the output of the Op Amp
into saturation. Thus, an Op Amp operating in open loop configuration will have an output that goes
to positive saturation or negative saturation level or switch between positive and negative saturation
levels and thus clips the output above these levels. This principle is used in a comparator circuit with
two inputs and an output. The 2 inputs, out of which one is a reference voltage (Vref) is compared
with each other.
A non-inverting 741 IC Op Amp comparator circuit is shown in the figure below with the input and
output waveforms.
13
 Protection Diodes +VCC
+
R1 A Vout

- RL
Vi
R -VEE
Vref = 1V

Fig. 4.2 Comparator Circuit

Vin
Vin +Vp
+Vp
VREF 1V t
t 0
0 -VREF -1V
-Vp
-Vp Vin>VREF
Vin>VREF +VAST
+VAST
VOUT 0 t
VOUT 0 t
-VAST -VAST
Vin<VREF Vin<VREF
Fig. 4.3 Input and output Waveform

Procedure:
1. Connect the circuit as per the diagram.
2. Apply the supply voltages of +15V to pin7 and -15V to pin4 of IC741 respectively.
3 Apply the inputs V1 and V2.
4. Apply two different signals to the inputs.
5. Vary the input voltages and note output at pin 6 of the IC 741 subtractor circuit.
6. Notice that the output is equal to the difference of the two inputs.

Calculations:
Comments and Discussions:
Questions:
1. Reduce a comparator to zero crossing detector.
2. What is the expected output wave shape if the input is a triangular wave?

14
 Experiment 5
Aims and Objectives:
Design and implement an integrator using op-amp 741 and verify the output for the given
wave shapes: (i) Triangular (ii) Square (iii) Sinusoidal.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, Connecting wires and
CRO probes.
Components Required: Resistors, Capacitors, Op-Amp IC 741.
Integrator: Writing node equation at inverting input of the Op. amp yields;
𝑣𝑖 𝑑𝑣𝑜 𝑑𝑣𝑜 𝑣𝑖 𝑡 𝑑𝑣𝑜 𝑡 𝑣𝑖
+ 𝐶𝐹 = 0, = −𝑅 , ∫𝑡 2 𝑑𝑡 = − ∫𝑡 2 𝑅 𝑑𝑡 + 𝑘
𝑅1 𝑑𝑡 𝑑𝑡 1 𝐶𝐹 1 𝑑𝑡 1 1 𝐶𝐹
1 𝑡1
𝑣𝑜 = − 𝑣 [𝑡]𝑡1 + 𝑘, k = initial charge on the capacitor =0 (1)
𝑅1 𝐶𝐹 𝑖
Eq.(1) indicates that the circuit of Fig.5.1 works as integrator.

CF
𝑖𝑓
R1
vi −
𝑖1 vO
A
+

Figure 5.1 Ideal Integrator

Taking Laplace transform of Eq.(1) yields

𝑣𝑜 (𝑠) 1 1 1 1
= − 𝑠𝑅 = 𝑗 𝜔𝑅 = 𝜔𝑅 ∠900 = 𝜔/𝜔 ∠900 (2)
𝑣𝑖 (𝑠) 1 𝐶𝐹 1 𝐶𝐹 1 𝐶𝐹 𝑎

Equation (1) is plotted as in Fig. 5.2

dB
𝑣𝑜 (𝑠)
𝑣𝑖 (𝑠)

10a
1=0dB 
a

-20dB
𝑣𝑜 (𝑠)
Figure 5.2 Logarithmic plot of versus frequency
𝑣𝑖 (𝑠)
𝑣𝑜 (𝑠)
| = 1 = 0𝑑𝐵,
𝑣𝑖 (𝑠) 𝜔=𝜔
𝑎
𝑣𝑜 (𝑠) 1 1
| = 20𝑙𝑜𝑔 𝜔/𝜔 = 20𝑙𝑜𝑔 10 = 20𝑙𝑜𝑔0.1 = 20(−1) = −20𝑑𝐵
𝑣𝑖 (𝑠) 𝜔=10𝜔 𝑎
𝑎
15
Hence, the response of such a simple circuit of the integrator goes on decreasing at -20dB/decade
with increasing value of frequency as shown in Fig. 5.3.

The disadvantage of such a simple circuit of integrator is that at significantly low frequencies, the
feedback capacitor CF will behave an open circuit and the close loop gain of the circuit will become
extremely large to drive the circuit into unstable condition. Hence, a feedback resistor (RF) is
connected in parallel to the feedback capacitor (CF) to provide finite amount of the close loop gain as
in Fig.5.3 at low frequencies.

RF

CF
R1
Vi - 𝑖𝑓
𝑖1 VO
A
+

Figure 5.3 Practical Integrator

How does this circuit of Fig.5.3 works as integrator? At low frequency the impedance offered by the
feedback capacitor CF (ZC) is much higher than the value of RF. Hence, the parallel path of CF is
assumed as open circuit and the gain is set to –RF/R1. In this frequency range the integrator circuit of
Fig.5.3 works simply as an inverting amplifier. In the significantly high frequency range, ZC becomes
much less than the value of RF, In this frequency range, RF is assumed to open circuited and the circuit
of Fig.5.3 works as integrator.
𝑅
The impedance offered by feedback circuit is 𝑍𝐹 = 1+𝑠𝐶𝐹 𝑅 . Now, the close loop gain of the circuit
𝐹 𝐹
is;
𝑅𝐹
𝑣𝑜 𝑍𝐹 = 𝑅 1 𝑅 1
1+𝑠𝐶𝐹 𝑅𝐹
=− = − { 𝑅𝐹} {1+𝑠𝐶 } = − { 𝐹} { 𝜔 }, where 𝜔𝑏 = 1/𝐶𝐹 𝑅𝐹
𝑣𝑖 𝑅1 1 𝐹 𝑅𝐹 𝑅1 1+𝑗
𝜔𝑏

𝑅 1 𝜔 𝑅 𝜔 2
= { 𝑅𝐹} ∠1800 − 𝑡𝑎𝑛−1 (𝜔 ) = 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√1 + (𝜔 ) (3)
1 2 𝑎 1 𝑏
√1+( 𝜔 )
𝜔𝑏

Above statement is proved by substituting  = 0 (low frequency value) in Eq. (3) that yields;
𝑣𝑜 𝑅 0 2 𝑅 𝑅
= 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√1 + (𝜔 ) = 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√1 = 20𝑙𝑜𝑔 { 𝑅𝐹} − 20log (0)
𝑣𝑖 1 𝑏 1 1

𝑣𝑜 𝑅
| = 20𝑙𝑜𝑔 { 𝑅𝐹} (4)
𝑣𝑖 𝜔=0(𝑣𝑒𝑟𝑦 𝑙𝑜𝑤 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦) 1

𝑣𝑜 𝑅 𝑅
| = 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√2 = 20𝑙𝑜𝑔 { 𝑅𝐹} − 3𝑑𝐵 (5)
𝑣𝑖 𝜔=𝜔 1 1
𝑏

16
 𝑣𝑜 𝑅 𝑅
| = 20𝑙𝑜𝑔 {𝑅𝐹} − 20𝑙𝑜𝑔√1 + 100 = 20𝑙𝑜𝑔 {𝑅𝐹} − 20𝑑𝐵 (6)
𝑣𝑖 𝜔=10𝜔 1 1
𝑏
Equations (4) and (5) indicate that the gain will go down by 3dB at a frequency 𝜔𝑏 = 1/𝐶𝐹 𝑅𝐹 . For
more than this frequency, the gain starts decreasing with increasing value of frequency at
20dB/decade as in Fig.5.4. The circuit integrates from 𝜔𝑏 to 𝜔𝑎 .

dB
Ideal Integrator
𝑣𝑜 (𝑠)
Practical Integrator
𝑣𝑖 (𝑠)

3dB
20dB
-20dB/decade

1=0dB 
b 10b 𝜔𝑎

Figure 5.4 Frequency response of ideal and practical Integrator

The circuit, thus provides an output voltage which is proportional to the time integral of the input and
𝑅1 𝐶𝐹 is the time constant of the integrator. It may be noted that there is a negative sign in the output
voltage, and therefore, this integrator is also known as an inverting integrator. A simple low pass RC
circuit can also work as an integrator when time constant is very large. This requires very large values
of R & C. The components R & C cannot be made infinitely large because of practical limitations.
The highest frequency of the input signal is treated as a, the cut-off frequency while designing an
integrator.
Example:
For a rectangular wave of amplitude 1V and ON and OFF duration of 0.5ms as in Fig. 5.5, the
integrated wave shape with the time constant of 𝜏= RC= 1kx1F = 1ms.
1 0.5𝑚𝑠 1 0.5𝑚𝑠 1
𝑣𝑜 = − 𝑅 ∫0𝑚𝑠 𝑣𝑖 𝑑𝑡 + 𝑘 = − 1𝑘𝑥1µ ∫0𝑚𝑠 (1𝑉)𝑑𝑡 + 0 = − 1𝑚𝑠 [1 − 0.5]𝑚𝑠 = −0.5𝑉
𝐶
1 𝐹
1 1𝑚𝑠 1 1𝑚𝑠 1
𝑣𝑜 = − 1𝑚𝑠 ∫0.5𝑚𝑠 𝑣𝑖 𝑑𝑡 − 0.5 = − 1𝑚𝑠 ∫0.5𝑚𝑠(−1𝑉)𝑑𝑡 − 0.5𝑉 = 1𝑚𝑠 (0.5𝑚𝑠) − 0.5𝑉
= 0.5𝑉 − 0.5𝑉 = 0𝑉
If the time constant is made equal to 0.5ms, then
1 0.5𝑚𝑠 1 0.5𝑚𝑠 1
𝑣𝑜 = − 5𝑘𝑥0.1µ ∫0𝑚𝑠 𝑣𝑖 𝑑𝑡 + 𝑘 = − 0.5𝑚𝑠 ∫0𝑚𝑠 (1𝑉)𝑑𝑡 + 0 = − 0.5𝑚𝑠 [1 − 0.5]𝑚𝑠 = −1.0𝑉
1 1𝑚𝑠 1 1𝑚𝑠 1
𝑣𝑜 = − 0.5𝑚𝑠 ∫0.5𝑚𝑠 𝑣𝑖 𝑑𝑡 − 1.0 = − 0.5𝑚𝑠 ∫0.5𝑚𝑠(−1𝑉)𝑑𝑡 − 1.0𝑉 = 0.5𝑚𝑠 (0.5𝑚𝑠) − 1.0𝑉
= 1-1 = 0V

Vin
1V
17
t(ms)
0.5 1.0 1.5 2.0 2.5
-1V
 VO
𝑣𝑜 t(ms)

-0.5V
VO
t(ms)

-1V

Fig.5.5 Input & Output waveforms

PROCEDURE:
1. Rig up the circuit as shown in the Fig. 5.3 on the breadboard.
2. Apply the given inputs and observe the output on CRO.
3. Calculate the amplitude & frequency of the output and draw it using graph paper.
4. Vary the inputs to and observe the output.
5. Plot the inputs and outputs waveforms for various inputs on the graph paper.

Observation Table:
S. No. Inputs Outputs
Wave shape Voltage Frequency Wave Voltage Frequency
shape

Calculations:
Comments and Discussions:
Questions:
1 What is roll off frequency?
2. What is the difference between the practical and ideal integrator?
3. What is the common applications of an integrator?
4. Under what condition an integrator circuit will integrate properly?

18
 Experiment 6
Aims & Objectives:
Design and implement a differentiator using Op Amp 741 and verify the output for the given wave
shapes: (i) Triangular (ii) Square (iii) Sinusoidal.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, and CRO probes.
Components Required: Resistors, Capacitors, Op Amp IC 741.
Differentiator:
One of the simplest of the Op Amp circuits that contain capacitor is the Differentiating Amplifier,
or Differentiator. As the name suggests, the circuit performs the mathematical operation of
differentiation, that is, the output waveform is the derivative of input waveform. A differentiator
circuit is shown in Fig. 6.1
The non-inverting terminal is at virtual ground. Hence, writing the KCL at this terminal yields;
𝑑𝑣𝑖 𝑣
𝑖𝑖 + 𝑖𝑓 = 0, 𝑖1 = 𝐶1 , 𝑖𝑓 = 𝑅𝑜 , then
𝑑𝑡 𝐹
𝑑𝑣𝑖
𝑣𝑜 = −𝐶1 𝑅𝐹 (1)
𝑑𝑡
Equation (1) indicates that it differentiates the input voltage.
𝑅𝐹
𝑖𝑓
𝐶1
𝑣𝑖
−𝐴
𝑖𝑖 𝑣𝑂

Figure 6.1 Ideal Differentiator

The Laplace transform of Eq.(1) yields;

𝑣𝑜 (𝑠)
𝑣𝑖 (𝑠)
= −𝐶1 𝑅𝐹 𝑠 = −𝑗𝜔𝐶1 𝑅𝐹 = 𝜔𝐶1 𝑅𝐹 ∠1800 + 900 = 𝜔𝐶1 𝑅𝐹 ∠2700 = 𝜔/𝜔𝑎 ∠2700 (2)
𝑣𝑜 (𝑠) 𝜔 𝜔
= 20 log 𝜔 = 20 log 𝜔𝑐 = 20 log 1 = 0𝑑𝐵 (3)
𝑣𝑖 (𝑠) 𝑐 𝑐
𝑣𝑜 (𝑠) 𝜔 10𝜔𝑐
= 20 log 𝜔 = 20 log = 20 log 10 = 20𝑑𝐵 (4)
𝑣𝑖 (𝑠) 𝑐 𝜔𝑐
Equations (3) and (4) indicate that the output increases linearly with increasing frequency. At
frequency 𝜔 = 𝜔𝑐 , the numerical value of the gain of the circuit becomes 1 (0dB) and for 𝜔 = 10𝜔𝑐 ,
the gain becomes 20dB. Hence, the response increases with increasing value of frequency at
20dB/decade.
The main disadvantage of such a simple differentiator lies in the fact that at significantly low
frequency it starts behaving as open circuit and hence the gain goes down to fractional value. In order
to avoid this, resistance 𝑅1 is connected in series with this capacitor 𝐶1 as in Fig. 6.3.
1 1 1
𝑍1 = 𝑅1 + 𝑠𝐶 = 𝑅1 {1 + 𝑠𝐶 } = 𝑅1 {1 + }
1 1 𝑅1 𝑠/𝜔𝑐

19
 dB
20dB
𝑣𝑜 (𝑠)
𝑣𝑖 (𝑠)

1=0dB 
c 10𝜔𝑐

Figure 6.2 Response of Ideal Differentiator.

RF 𝑖𝑓
R1 C1
𝑣𝑖 −
𝑖1 𝐴 𝑣𝑂
+

Fig.6.3 Practical Differentiator

𝑣𝑜 (𝑠) 𝑅𝐹 𝑅 1 𝑅 1 𝜔
=− = − { 𝑅𝐹} = = { 𝑅𝐹} ∠1800 + 𝑡𝑎𝑛−1 ( 𝜔𝑐) (5)
𝑣𝑖 (𝑠) 1 1 1 𝜔 2
1
𝑅1 {1+ 𝑗𝜔 } {1−𝑗 𝜔 } {√1+( 𝑐 ) }
𝜔
𝜔𝑐
𝜔𝑐

𝑣𝑜 (𝑠) 𝑅 𝜔 2 𝑅 𝜔 2 𝑅
= 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√1 + ( 𝜔𝑐) = 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√1 + ( ∞𝑐) = 20𝑙𝑜𝑔 { 𝑅𝐹}
𝑣𝑖 (𝑠) 1 1 1

𝑣𝑜 (𝑠) 𝑅𝐹 𝜔𝑐 2 𝑅𝐹 𝑅𝐹
= 20𝑙𝑜𝑔 { } − 20𝑙𝑜𝑔√1 + ( ) = 20𝑙𝑜𝑔 { } − 20𝑙𝑜𝑔√2 = 20𝑙𝑜𝑔 { } − 3𝑑𝐵
𝑣𝑖 (𝑠) 𝑅1 𝜔𝑐 𝑅1 𝑅1
𝑣𝑜 (𝑠) 𝑅 𝜔 2 𝑅
= 20𝑙𝑜𝑔 { 𝑅𝐹 } − 20𝑙𝑜𝑔√1 + (0.1𝜔𝑐 ) = 20𝑙𝑜𝑔 { 𝑅𝐹} − 20𝑙𝑜𝑔√1 + 100
𝑣𝑖 (𝑠) 1 𝑐 1
𝑅𝐹
= 20𝑙𝑜𝑔 { } − 20𝑑𝐵 (6)
𝑅1
Procedure:
1. Rig up the circuit as shown in the Fig. 6.3 on the breadboard.
2. Apply the given inputs and observe the output on CRO.
3. Calculate the amplitude & frequency of the output.
4. Vary the inputs to and observe the output.
5. Plot the inputs and outputs waveforms for various inputs on the graph paper.

20
 dB
𝑣𝑜 (𝑠) 𝑅𝐹
3dB 20𝑙𝑜𝑔 { }
𝑣𝑖 (𝑠) 𝑅1
20dB
10𝜔𝑎

1=0dB 
0.1c c
Figure 6.4 Frequency response of practical differentiator

T/2 T
Vi t
-at +at
+a
VO
t

-a
Fig. 6.5 Input & Output waveforms of Differentiator

Observation Table:

S. Inputs Outputs
No.
Wave shape Voltage Frequency Wave shape Voltage Frequency
1
2
3
Calculation:
Comments and Discussions:
Questions:
1. What is the difference between a practical differentiator and an ideal differentiator?
2. Give any application of a differentiator.
3. The frequency at which the gain is 0 dB is given by…………..
4. What is the condition for which the input signal will be differentiated properly?

21
 Experiment 7
Aims & Objectives:
(a) Design and implement a Butterworth Low Pass Filter using Op Amp 741 for the given
cut-off frequency and obtain its frequency response.
(b) Design and implement a second order Butterworth High Pass Filter using Op Amp 741
for the given cut-off frequency and obtain its frequency response.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, Connecting wires, and
CRO probes.
Components Required:
Resistors, Capacitors, Op Amp IC 741.
Theory:
A filter segregates between two types of matters. Similarly, electric filter segregates the voltage
between different ranges of frequencies. A low-pass filter allows low-frequency signal components
(including direct current) to be transmitted, while high-frequency components up to definite range
(including infinite ones) are blocked. The range of low frequencies, which are passed, is called
the pass band or the bandwidth of the filter. The sharpness of the transition from stop band to pass
band can be controlled to some degree during the design.
The ideal low-pass filter response can be approximated by a rational function approximation scheme
such as the Butterworth response. The Butterworth filter is also called maximally flat or flat-flat filter.

Active Filters employ transistors, more appropriately Op – Amps in addition to that of resistors and
capacitors. Active filters have the following advantages over passive filters: (1) Flexible gain and
frequency adjustment, (2) No loading problem (because of high input impedance and low output
impedance), and (3) More economical than passive filters. A Second Order Low Pass Butterworth
filter uses RC networks for filtering. Note that the Op Amp is used in the non-inverting configuration;
hence it does not load down the RC network. Resistors RF and R1 determine the gain of the filter. Fig.
7.1 shows a second order LPF with a roll off of -40dB/decade.

dB
𝑣𝑜 (𝑠)
3dB
𝑣𝑖 (𝑠)
40dB/decade

1=0dB 
0.1c c

Fig. 7.1 10dB/decade and 20 dB/decade Roll off of LPF

22
 C4
𝑣𝑖 +
𝑣1 K 𝑣𝑜
R1 R2 C3
−

R RF RL

Fig. 7.2 second order Butterworth LPF

The gain magnitude equation of the Low Pass filter can be obtained by converting equation into its
equivalent polar form, as follows.
2
𝐾𝜔𝑝
𝑣𝑜
= 𝑠2 +𝑠(3−𝐾)𝜔 2
𝑣𝑖 𝑝 +𝜔𝑝
1 1 𝜔𝑝 1 𝑅𝐹
𝜔𝑝 = 𝜔𝐻 = 𝑅𝐶 = 𝑅 , 𝑄𝑝 = (3−𝐾)𝜔 = (3−𝐾), 𝐾 = 1 +
1 𝑅2 𝐶3 𝐶4 𝑝 𝑅
𝑣𝑜 𝐴𝑜
= 𝑠2 +𝜔2 for k = 3, and 𝐾𝜔𝑝2 = 𝐴𝑜
𝑣𝑖 𝐻
The operation of the low – pass filter can be verified from the gain magnitude equation.
𝑣
At very low frequencies, that is f < fH, | 𝑣𝑜 | = 𝐴𝑜
𝑖

𝑣 𝐴𝑜
At f = fH, | 𝑣𝑜 | = = 0.707𝐴𝑜
𝑖 √2
𝑣
At f > fH, | 𝑣𝑜 | < 𝐴𝑜
𝑖

Thus the Low Pass filter has a constant gain 𝐴𝑜 from 0 Hz to the almost high cut-off frequency,
fH, it has the gain 0.707𝐴𝑜 at exactly fH, and after fH, it decreases at a constant rate with an
increase in frequency. The gain decreases 40 dB (= 20𝑙𝑜𝑔102 ) each time the frequency is increased
by 10. Hence, the rate at which the gain rolls off after fH is 40 dB/decade. The frequency f = fH
is called the cut-off frequency because the gain of the filter at this frequency is down by 3 dB
(=20log 0.707) from 0 Hz. Other equivalent terms for cut-off frequency are -3dB frequency, break
frequency, or corner frequency.

C1 C2 R4
𝑣𝑖 𝑣1 +
K 𝑣𝑜
R3
−

R RF RL

Fig. 7.3 second order Butterworth HPF

Second Order High Pass Filter consists of RC networks for filtering. Second Order High Pass filter
can be constructed from a Second Order Low Pass filter simply by interchanging frequency
23
determining components R & C. The operation of the high–pass filter can be verified from the gain
magnitude equation.
𝑣
1. At very low frequencies, that is f < fL, | 𝑣𝑜 | < 𝐴𝑜
𝑖
𝑣𝑜 𝐴𝑜
2. At f = fL, | 𝑣 | = = 0.707𝐴𝑜
𝑖 √2
𝑣
3. At f > fL, | 𝑣𝑜 | = 𝐴𝑜
𝑖

Procedure:
1. Connect the components/equipment as shown in the circuit diagram.
2. Set Vi = 1V & fi =50Hz using function generator.
3. Vary the input frequency in regular intervals, note down the output voltage.
4. Calculate the gain (Vo/Vin) and Gain in dB = 20 log (Vo/Vin) at every frequency.
5. Plot the frequency response curve (taking frequency on X-axis & Gain in dB on Y-axis)
using Semi log Graph.
6. Find out the high cut-off frequency, fH (at Gain= Constant Gain, Ao – 3 dB) from the
frequency response plotted.
7. Repeat steps 1 to 5 for high pass filter and find out the high cut-off frequency, fH (at
Gain= Constant Gain, Af – 3 dB) from the frequency response plotted.

S. Frequency Input Output Voltage gain Gain in dB

No. (Hz) Voltage (Vi) voltage (Vo) Av=Vo/Vi = 20 log (Av)
1 1.0V
2 1.0V
3 1.0V
4 1.0V
5 1.0V

High Pass Filter:

S. Frequency Input Output Voltage gain Gain in dB

No. (Hz) Voltage (Vi) voltage (Vo) Av=Vo/Vi = 20 log (Av)
1 1.0V
2 1.0V
3 1.0V
4 1.0V
5 1.0V
Calculations:
Let C2 = C3 = C as 0.1f, thus calculate R2=R3=R.
Gain, {1+(RF/R1)} = 1.586 to get Butterworth response. Hence choose a value of R1  100k and
calculate the value of RF.

Error in cut-off frequency = (theoretical cutoff- practical cutoff)/ theoretical cutoff

24
Comments and Discussions:

Questions:
1. How filters are classified? Give one example for each classification.
2. What is an active filter and why it is called so?
3. How an active filter differs from a passive filter?
4. What are the advantages of active filters over passive filters?

25
 Experiment 8
Aims & Objectives:
Design and implement a Butterworth Band Pass Filter using Op Amp 741 for the given cut-
off frequencies and obtain its frequency response.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, Connecting wires and
CRO probes
Components Required: Resistors, Capacitors, Op Amp IC 741,
Theory:
Simple Active Band Pass Filter can be easily made by cascading together a single Low Pass Filter
with a single High Pass Filter as shown. The cut-off or corner frequency of the low pass filter (LPF)
is higher than the cut-off frequency of the high pass filter (HPF) and the difference between the
frequencies at the -3dB point will determine the “bandwidth” of the band pass filter while attenuating
any signals outside of these points.
10k 10k

R1 R2 R1 R2
− −
2 2
1k K 1k K 𝑣𝑜
V+1 𝑣𝑜1 V+2
+ +
3 1k 3
𝑣𝑖
1V, 1kHz 0.1µF 100k 0.1µF

Fig. 8.1 Band pass filter circuit

Ao Ao

0.707Ao 0.707Ao

 
CH CL
Figure 8.2 High and Low pass frequency responses
𝑅 𝑠𝐶𝑅 𝑠
𝑣+1 = 𝑣𝑖 1 = 𝑣𝑖 𝑠𝐶𝑅+1 = 𝑣𝑖 𝑠+1/𝐶𝑅
+𝑅
𝑠𝐶
10 𝑠
𝑣𝑂1 = {1 + } 𝑣+1 = 11𝑣𝑖
1 𝑠+66.67𝑥103
𝑣𝑂1 11𝑠
= 𝑠+66.67𝑥103
𝑣𝑖

26
𝑣𝑜1 11𝑅 11𝑠𝐶𝑅 11𝑠
= 1 = 1+𝑠𝐶𝑅 = 𝑠+1/𝑅𝐶; It has a zero at s = 0 (origin) and a pole at s = -1/RC. The Bode plot
𝑣𝑖 𝑅+
𝑠𝐶

is shown in Fig. 8.3. After 1 = 1/RC, the positive and negative slope cancel each other and the
response becomes horizontal. Hence, for higher  > 2, it passes all frequency and is called HP
filter.

20dB/decade 𝑣𝑜
𝑣𝑜 𝑣𝑖
20 log
𝑣𝑖 11

CH=1/RC
o x  
CH=1/RC

-20dB/decade

Figure 8.3 Pole zero plot of High pass Filter

𝑣𝑜 𝜔 2 𝜔 2
= 20𝑙𝑜𝑔1 − 20𝑙𝑜𝑔√1 + ( 𝜔𝐻) = −20𝑙𝑜𝑔√1 + ( 𝜔𝐻) = −20𝑙𝑜𝑔√2 = −3𝑑𝐵 For  = 𝜔𝐻
𝑣𝑖
1
𝑠𝐶 1 1/𝐶𝑅
𝑣+2 = 𝑣𝑂1 1 = 𝑣𝑂1 𝑠𝐶𝑅+1 = 𝑣𝑂1 𝑠+1/𝐶𝑅
𝑅+
𝑠𝐶
10 1/𝐶𝑅
𝑣𝑂 = {1 + } 𝑣+2 = 11𝑣𝑂1
1 𝑠+1/𝐶𝑅
𝑣𝑂 1/𝐶𝑅 66.67𝑥103
= 11 𝑠+1/𝐶𝑅 = 11 𝑠+66.67𝑥103
𝑣𝑂1
It has a pole only at s = -1/RC.

11

-20dB/decade

x 
CL =1/RC
Figure 8.4 Pole-zero plot of Low pass Filter

1
𝑣𝑂 𝑗𝜔𝐶 11 𝜔 2
= 11 1 = 1+𝜔𝐶𝑅 = 20𝑙𝑜𝑔11 − 20𝑙𝑜𝑔√1 + (𝜔 )
𝑣𝑂1 𝑅+ 𝐿
𝑗𝜔𝐶
27
 𝜔 2
= 20.83𝑑𝐵 − 20𝑙𝑜𝑔√1 + (𝜔 ) = 20.83𝑑𝐵 − 20𝑙𝑜𝑔√2 = 17.8𝑑𝐵
𝐿

For  = 𝜔𝐿
If we adjust that 𝜔𝐿 > 𝜔𝐻 , then cascading these filters will yield the frequency response of a Band
pass Filter as in Fig. 8.3.
Example: R = 100kΩ, C= 0.1µF,  = RC = 100kΩx0.1µF= 0.01s, fH =100Hz
R = 1kΩ, C= 0.1µF,  = RC = 1kΩx0.1µF= 0.1ms, fL =10kHz
BW = 10kHz-100Hz = 9.9kHz

Ao Ao

0.707Ao 0.707Ao

Band Width


CH CL
Fig. 8.3 Frequency response of BPF
Procedure:
1. Connect the components/equipment as shown in the circuit diagram.
2. Set Vin = 1V & fi = 50Hz using function generator.
3. Vary the input frequency in regular intervals, note down the output voltage.
4. Calculate the gain (Vo/Vin) and Gain in dB = 20 log (Vo/Vin) at every frequency.
5. Plot the frequency response curve (taking frequency on X-axis & Gain in dB on Y-axis)
using Semi log Graph.
6. Find out the cut-off frequencies, fH and fL(at Gain= Constant Gain, Af – 3 dB) from the
frequency response plotted.

Observation Table:
Low pass filter:
Input voltage = …… V
S. Frequency Output Voltage gain Gain in dB
No. (Hz) voltage (Vo) Av=Vo/Vi = 20 log (Av)

High Pass Filter:

Input voltage = …… V
28
 S.No. Frequency Output Voltage gain Gain in dB
(Hz) voltage (Vo) Av=Vo/Vi = 20 log (Av)

Calculations:

Error in cut-off frequency = (theoretical cutoff- practical cutoff)/ theoretical cutoff

Comments and Discussions:
Questions:
1. Draw the frequency response of all filters (LPF, HPF, BPF, BRF and All-pass).
2. What is the gain roll off rate for a 1st order and 2nd order filter?
3. What is a 3 dB frequency and why it is called so?
4. What are the other names for 3 dB frequency?

29
 Experiment 9
Aims & Objectives: Design a Schmitt Trigger using Op Amp 741 and verify its output.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, Connecting wires and
CRO probes.
Components Required: Resistors, Capacitors, Op Amp IC 741.
Schmitt Trigger:
Theoretically, if the loop gain - βAOL is adjusted to unity, then the gain with feedback, 𝐴𝑣𝑓 becomes
infinite. In practical circuits, however, it may not be possible to maintain loop-gain exactly equal to
unity for a long time because of supply voltage and temperature variations. So a value greater than
unity is chosen. This also gives an output waveform virtually discontinuous at the comparison
voltage. This circuit, however, now exhibits a phenomenon called hysteresis or backlash. Fig 9.1
shows a regenerative comparator. The circuit is also known as Schmitt trigger. The input voltage is
applied to the (-) input terminal and the feedback to the (+) input terminal. The input voltage Vi
triggers the output Vo every time it exceeds certain voltage levels. These voltage levels are called
upper threshold voltage (VUT) and lower threshold voltage (VLT). The hysteresis voltage (Vhy) is the
difference between these two threshold voltages i.e. VUT - VLT. These threshold voltages are calculated
as follows.
Upper threshold voltage, VUT = {R1 / (R1 + RF)} (+Vsat)
Lower threshold voltage, VLT = {R1 / (R1 + RF)}(-Vsat)
Hysteresis voltage, Vhy = VUT - VLT = {R1 / (R1 + RF)}(+Vsat-(-Vsat)

RF

R1 +VCC=+15V
− 7 𝑖𝑓
2
𝐴 𝑣𝑂
R2 6
𝑣𝑖 3 + 4
𝑖𝑖 -VEE=-15V

Fig.9.1 Schmitt Trigger

VO VO
VOH Vi VOH
VTH

0 t VI
VIL VIH
VTL
VOL
VOL
Fig.9.2 Input & Output waveforms

PROCEDURE:
1. Rig up the circuit as shown in the Fig.9.1 on the breadboard.
30
2. Apply the input & observe the output on CRO.
3. Calculate the amplitude & frequency of the output.
4. Plot the outputs waveforms on the graph paper.

Observation Table
S. No. Input voltage R1 R2 Output voltage
VLT VUT
1.
2.

Calculation:
Calculate the values of R1 and R2 using the relationships as follows:
VUT = {R1 / (R1 + RF)} (+ Vsat)
VLT = {R1 / (R1 + RF)} (- Vsat)

Calculate the hysteresis voltage using

Vhy = VUT - VLT = {R1 / (R1 + RF)}( (+Vsat -(-Vsat))

Comments and Discussions:

Questions:
1 What is the other name of Schmitt trigger?
2 Schmitt trigger is which type of comparator?
3 What is the maximum output voltage values?
4 What do you mean by hysteresis loop?

31
 Experiment 10
Aims & Objectives:
Design & implement a square wave generator using Op Amp 741 for given frequency.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Multimeter, Connecting wires and
CRO probes.
Components Required: Resistors, Op Amp IC 741, and capacitor.
Theory:
The non-sinusoidal waveform generators are also called relaxation oscillators. The Op Amp
relaxation oscillator shown in figure is a square wave generator. The comparator uses positive
feedback that increases the gain of the amplifier. In a comparator circuit this offer two advantages.
First, the high gain causes the Op Amp’s output to switch very quickly from one state to another and
vice-versa. Second, the use of positive feedback gives the circuit hysteresis.
Calculate the hysteresis voltage using

RF=220k

+VCC=+15V
− 7 𝑖𝑓
VC + 𝐴 VO
0.00F C 6
- + 4 R2 220k
-VEE=-15V

𝑅3 R3 10k
𝑣 = 𝛽𝑣𝑜
𝑅2 + 𝑅3 0

Figure 10.1 Square wave Generator

VOUT
+VSA

VSA

0V t
T/2 T 3T/2 2T
-VSAT
-VSAT
T1 T2
T
Fig. 10.2 Output and capacitor voltage waveform

Procedure:
1. Connect the circuit as shown in the Fig.10.1 on the breadboard.
32

VO
2. Observe and sketch the capacitor voltage waveform at pin-6 and output waveform at pin-3.
3. Measure the frequency and duty cycle of the output waveform.
4. Plot the output on the graph/tracing paper.

Observation Table:

S.No. R2 R3 TON TOFF Duty Cycle

Calculations:
For the given duty cycle calculate the value of R2 & R3 using the formula,

Comments and Discussions:

Questions:
1. Explain the function of reset in 555 timer IC.
2. What are the other modes of operation of timer?
3. Discuss some applications of timer in Astable mode.
4. Define duty cycle
5. How is an Astable multivibrator connected into a pulse position modulator?

33
 Experiment 11
Aims & Objectives:
Design and implement Astable Multivibrator using Timer IC 555 for the given time period.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Digital Multimeter, Connecting
wires and CRO probes.
Components Required: Resistors, Op Amp IC 741,
Theory:
For the circuit shown in Fig. 11.1, if the diode is not connected, the discharging time period for the
capacitor is given as;
T1 = 0.693 R2C
And the charging time period of the capacitor is
T2 = 0.693 (R1+R2)C
Thus the total time period of the output wave is T = T1 + T2.

+5V
8 4
R1 Reset
VCC
7
Discharge 3
Output
R2 6 Threshold
555
Trigger
2
C Ground Control
1 5 0.01F

Fig. 11.1 Astable Multivibrator Circuit

VC

(2/3)VCC

(1/3)VCC
t

VO
VCC

th tL
t
T
Fig. 11.2 output waveforms

To reduce the output to a square wave with T1 =T2, the diode is connected with R1 = R2. The diode
34
remainsshort resulting in the charging time of T2 = 0.693 R1C.
Thus for different duty cycles, the following relationships between the resistances R1 and R2 should
be achieved:
T1 < T2 if R1 < R2
T1 > T2 if R1 > R2
T1 = T2 if R1 = R2
Procedure:
1. Connect the circuit as shown in the Fig.11.1 on the breadboard.
2. Observe and sketch the voltage waveform at pin-3 and that across the capacitor.
3. Measure the frequency and duty cycle of the output waveform.
4. Plot the output on the graph/trace paper.

Observation Table:

tON tOFF
Theoretical
Observed

Calculations:
For the given duty cycle calculate the value of R1 & R2 using the formula,
Toff = 0.69 R2C
Ton = 0.69 R1C
T =Ton+ Toff = 0.69 (R1+R2).C
And duty cycle, D = R1/R1+R2

Comments and Discussions:

Reference:
Questions:
1. Explain the function of reset in 555 timer IC.
2. What are the other modes of operation of timer?
3. Discuss some applications of timer in Astable mode.
4. Define duty cycle.
5. How is an Astable multivibrator connected into a pulse position modulator?

35
 Experiment 12
Aims & Objectives:
Design and implement Monostable Multivibrator using Timer IC 555 for the given pulse width.
Equipment & Accessories Required:
CRO, Function Generator, Power Supply, Bread Board, Digital Multimeter, Connecting
wires and CRO probes.
Components Required: Resistors, Timer IC 555, and capacitors.
Theory:
When the circuit needs to work for a fixed length of time, one-shot or monostable multivibrators are
used. When a negative going pulse is applied at pin 2, the output goes high and the capacitor C starts
to charge. The rate of charging is determined by R and C. as soon as the voltage grows above 2VCC/3,
the output is switched to low. Thus, the pulse duration
𝑡𝑝 = 1.1𝑅𝐶
The diode, resistance R2 and capacitor C2 are added to obtain a single pulse output for one input
pulse.

+5V
0.001F R2 8 4
2VCC/3 2 7 R

0 C2 555 6 C
5
0.01F 1 3 Output

Fig. 12.1 Monostable multivibrator circuit

VC
Triggering i/p pin 2

(1/3)VC
t
VCC
(2/3)VC VCC(𝑒 𝑡/𝑅𝐶 − 1)
pin 6, 7 & GND, VC(t)
t
VC
Tp pin 3 & GND, VO(t)
t
Fig. 12.2 output waveform
Procedure:
1. Connect the circuit as shown in the Fig.12.1 on the breadboard.
2. Observe and sketch the voltage waveform at pin-3 and that across the capacitor.
3. Measure the frequency and duty cycle of the output waveform.
4. Plot the output on the graph/trace paper.
36
Observation Table:

Pulse width
Theoretical
Observed

Calculations:
For the given pulse width assume some value of capacitor and find the resistance using the
relationship
𝑡𝑝 = 1.1RC
Find the percentage error in the theoritical and observed pulse width.

Comments and Discussions:

Questions:
1. Explain the function of reset in 555 timer IC.
2. What is the need of diode, C2 and R2 in the circuit?
3. Discuss some applications of timer in monostable mode.
4. Why is IC 555 called a timer IC?
5. How is a monostable multivibrator used as frequency divider?

37