0% found this document useful (0 votes)
11 views9 pages

MCR8DSM D

Uploaded by

kevinpintos9519
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
11 views9 pages

MCR8DSM D

Uploaded by

kevinpintos9519
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 9

MCR8DSM, MCR8DSN

Preferred Device

Sensitive Gate
Silicon Controlled Rectifiers

Reverse Blocking Thyristors


Designed for high volume, low cost, industrial and consumer
applications such as motor control; process control; temperature, light http://onsemi.com
and speed control.
• Small Size SCRs
• Passivated Die for Reliability and Uniformity 8 AMPERES RMS
• Low Level Triggering and Holding Characteristics 600 thru 800 VOLTS
• Available in Two Package Styles
Surface Mount Lead Form — Case 369A
Miniature Plastic Package — Straight Leads — Case 369
• Device Marking: Device Type, e.g., for MCR8DSM: CR8DSM, G
A K
Date Code

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)


Rating Symbol Value Unit 4
Peak Repetitive Off–State Voltage(1) VDRM, Volts
(TJ = –40 to 110°C, Sine Wave, VRRM 1 2
50 to 60 Hz, Gate Open) 3
MCR8DSM 600
MCR8DSN 800
D–PAK
On–State RMS Current IT(RMS) 8.0 Amps CASE 369A
(180° Conduction Angles; TC = 90°C) STYLE 4
Average On–State Current IT(AV) 5.1 Amps
(180° Conduction Angles; TC = 90°C) PIN ASSIGNMENT
Peak Non-Repetitive Surge Current ITSM 90 Amps 1 Cathode
(1/2 Cycle, Sine Wave, 60 Hz, 2 Anode
TJ = 110°C)
3 Gate
Circuit Fusing Consideration I2t 34 A2sec Anode
4
(t = 8.3 msec)
Forward Peak Gate Power PGM 5.0 Watts
(Pulse Width ≤ 10 msec, TC = 90°C) ORDERING INFORMATION
Forward Average Gate Power PG(AV) 0.5 Watt Device Package Shipping
(t = 8.3 msec, TC = 90°C)
MCR8DSMT4 DPAK 369A 16mm Tape
Forward Peak Gate Current IGM 2.0 Amps
and Reel
(Pulse Width ≤ 10 msec, TC = 90°C)
(2.5K/Reel)
Operating Junction Temperature Range TJ – 40 to 110 °C
MCR8DSNT4 DPAK 369A 16mm Tape
Storage Temperature Range Tstg – 40 to 150 °C and Reel
(1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings (2.5K/Reel)
apply for negative gate voltage; positive gate voltage shall not be applied
concurrent with negative potential on the anode. Blocking voltages shall not
Preferred devices are recommended choices for future use
be tested with a constant current source such that the voltage ratings of the
and best overall value.
device are exceeded.

 Semiconductor Components Industries, LLC, 2000 1 Publication Order Number:


May, 2000 – Rev. 2 MCR8DSM/D
MCR8DSM, MCR8DSN

THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance — Junction to Case RqJC 2.2 °C/W
Thermal Resistance — Junction to Ambient RqJA 88
Thermal Resistance — Junction to Ambient(1) RqJA 80
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds TL 260 °C

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)


Characteristics Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Peak Repetitive Forward or Reverse Blocking Current IDRM mA
(VAK = Rated VDRM or VRRM; RGK = 1.0 KW)(2) TJ = 25°C IRRM — — 10
TJ = 110°C — — 500
ON CHARACTERISTICS
Peak Reverse Gate Blocking Voltage VGRM Volts
(IGR = 10 mA) 10 12.5 18
Peak Reverse Gate Blocking Current IRGM mA
(VGR = 10 V) — — 1.2
Peak Forward On–State Voltage(3) VTM Volts
(ITM = 16 A) — 1.4 1.8
Gate Trigger Current (Continuous dc)(4) IGT mA
(VD = 12 V, RL = 100 W) TJ = 25°C 5.0 12 200
TJ = –40°C — — 300
Gate Trigger Voltage (Continuous dc)(4) VGT Volts
(VD = 12 V, RL = 100 W) TJ = 25°C 0.45 0.65 1.0
TJ = –40°C — — 1.5
TJ = 110°C 0.2 — —
Holding Current IH mA
(VD = 12 V, Initiating Current = 200 mA, Gate Open) TJ = 25°C 0.5 1.0 6.0
TJ = –40°C — — 10
Latching Current IL mA
(VD = 12 V, IG = 2.0 mA) TJ = 25°C 0.5 1.0 6.0
TJ = –40°C — — 10
Total Turn–On Time tgt ms
(Source Voltage = 12 V, RS = 6.0 KW, IT = 16 A(pk), RGK = 1.0 KW) — 2.0 5.0
(VD = Rated VDRM, Rise Time = 20 ns, Pulse Width = 10 ms)
DYNAMIC CHARACTERISTICS
Characteristics Symbol Min Typ Max Unit
Critical Rate of Rise of Off–State Voltage dv/dt V/ms
(VD = 0.67 X Rated VDRM, Exponential Waveform, 2.0 10 —
RGK = 1.0 KW, TJ = 110°C)
(1) Surface mounted on minimum recommended pad size.
(2) Ratings apply for negative gate voltage or RGK = 1.0 KW. Devices shall not have a positive gate voltage concurrently with a negative voltage
on the anode. Devices should not be tested with a constant current source for forward and reverse blocking capability such that the voltage
applied exceeds the rated blocking voltage.
(3) Pulse Test; Pulse Width ≤ 2.0 msec, Duty Cycle ≤ 2%.
(4) RGK current not included in measurements.

http://onsemi.com
2
MCR8DSM, MCR8DSN

Voltage Current Characteristic of SCR


+ Current
Anode +

Symbol Parameter VTM


VDRM Peak Repetitive Off State Forward Voltage
on state
IDRM Peak Forward Blocking Current
IRRM at VRRM IH
VRRM Peak Repetitive Off State Reverse Voltage
IRRM Peak Reverse Blocking Current
VTM Peak On State Voltage + Voltage
IH Holding Current Reverse Blocking Region IDRM at VDRM
(off state) Forward Blocking Region
(off state)
Reverse Avalanche Region
Anode –

110 12

P(AV) , AVERAGE POWER DISSIPATION (WATTS)


TC , MAXIMUM ALLOWABLE CASE TEMPERATURE (°C)

10
105
a a 180°
a = Conduction 8.0
a = Conduction 90°
120°
100
Angle Angle dc
6.0 60°
a = 30°
95
dc 4.0

90
2.0
a = 30° 60° 90° 120° 180°
85 0
0 1.0 2.0 3.0 4.0 5.0 6.0 0 1.0 2.0 3.0 4.0 5.0 6.0
IT(AV), AVERAGE ON–STATE CURRENT (AMPS) IT(AV), AVERAGE ON–STATE CURRENT (AMPS)

Figure 1. Average Current Derating Figure 2. On–State Power Dissipation

http://onsemi.com
3
MCR8DSM, MCR8DSN

100 1.0
I T, INSTANTANEOUS ON–STATE CURRENT (AMPS) TYPICAL @ TJ = 25°C

r(t) , TRANSIENT THERMAL RESISTANCE


MAXIMUM @ TJ = 110°C

10

(NORMALIZED)
0.1
MAXIMUM @ TJ = 25°C ZqJC(t) = RqJC(t)Sr(t)
1.0

0.1 0.01
0 1.0 2.0 3.0 4.0 5.0 0.1 1.0 10 100 1000 10 K
VT, INSTANTANEOUS ON–STATE VOLTAGE (VOLTS) t, TIME (ms)

Figure 3. On–State Characteristics Figure 4. Transient Thermal Response

1000 1.0

VGT, GATE TRIGGER VOLTAGE (VOLTS)


I GT, GATE TRIGGER CURRENT (m A)

RGK = 1.0 KW
100

GATE OPEN
10

1.0 0.1
–40 –25 –10 5.0 20 35 50 65 80 95 110 –40 –25 –10 5.0 20 35 50 65 80 95 110
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

Figure 5. Typical Gate Trigger Current versus Figure 6. Typical Gate Trigger Voltage versus
Junction Temperature Junction Temperature

10 10
RGK = 1.0 KW RGK = 1.0 KW
IH , HOLDING CURRENT (mA)

IL, LATCHING CURRENT (mA)

1.0 1.0

0.1 0.1
–40 –25 –10 5.0 20 35 50 65 80 95 110 –40 –25 –10 5.0 20 35 50 65 80 95 110
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

Figure 7. Typical Holding Current versus Figure 8. Typical Latching Current versus
Junction Temperature Junction Temperature

http://onsemi.com
4
MCR8DSM, MCR8DSN

10 1000
TJ = 25°C

8.0
IH, HOLDING CURRENT (mA)

70°C

STATIC dv/dt (V/m s)


100
6.0
90°C
IGT = 25 mA
4.0 TJ = 110°C
10

2.0 IGT = 10 mA

0 1.0
100 1000 10 K 100 1000
RGK, GATE–CATHODE RESISTANCE (OHMS) RGK, GATE–CATHODE RESISTANCE (OHMS)

Figure 9. Holding Current versus Figure 10. Exponential Static dv/dt versus
Gate–Cathode Resistance Gate–Cathode Resistance and Junction
Temperature

1000 1000
TJ = 110°C VD = 800 V
400 V TJ = 110°C
STATIC dv/dt (V/ ms)

STATIC dv/dt (V/ ms)

100 100
600 V IGT = 25 mA

VPK = 800 V
IGT = 10 mA
10 10

1.0 1.0
100 1000 100 1000
RGK, GATE–CATHODE RESISTANCE (OHMS) RGK, GATE–CATHODE RESISTANCE (OHMS)

Figure 11. Exponential Static dv/dt versus Figure 12. Exponential Static dv/dt versus
Gate–Cathode Resistance and Peak Voltage Gate–Cathode Resistance and Gate Trigger
Current Sensitivity

http://onsemi.com
5
MCR8DSM, MCR8DSN

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the interface between the board and the package. With the
total design. The footprint for the semiconductor packages correct pad geometry, the packages will self align when
must be the correct size to insure proper solder connection subjected to a solder reflow process.

0.165 0.118
4.191 3.0
0.100
2.54
0.063
1.6
0.190 0.243
4.826 6.172

inches
mm
DPAK

http://onsemi.com
6
MCR8DSM, MCR8DSN

PACKAGE DIMENSIONS

D–PAK
CASE 369A–13
ISSUE Z

NOTES:
–T– SEATING 1. DIMENSIONING AND TOLERANCING PER ANSI
PLANE Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
B C
INCHES MILLIMETERS
V R E DIM MIN MAX MIN MAX
A 0.235 0.250 5.97 6.35
B 0.250 0.265 6.35 6.73
4 C 0.086 0.094 2.19 2.38
Z D 0.027 0.035 0.69 0.88
A E 0.033 0.040 0.84 1.01
S F 0.037 0.047 0.94 1.19
1 2 3 G 0.180 BSC 4.58 BSC
U H 0.034 0.040 0.87 1.01
K J 0.018 0.023 0.46 0.58
K 0.102 0.114 2.60 2.89
L 0.090 BSC 2.29 BSC
F J R 0.175 0.215 4.45 5.46
L S 0.020 0.050 0.51 1.27
H U 0.020 ––– 0.51 –––
V 0.030 0.050 0.77 1.27
D 2 PL Z 0.138 ––– 3.51 –––
G 0.13 (0.005) M T STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE

http://onsemi.com
7
MCR8DSM, MCR8DSN

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION


NORTH AMERICA Literature Fulfillment: CENTRAL/SOUTH AMERICA:
Literature Distribution Center for ON Semiconductor Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
P.O. Box 5163, Denver, Colorado 80217 USA Email: ONlit–[email protected]
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support
Email: [email protected] Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada Toll Free from Hong Kong & Singapore:
001–800–4422–3781
N. American Technical Support: 800–282–9855 Toll Free USA/Canada Email: ONlit–[email protected]

EUROPE: LDC for ON Semiconductor – European Support JAPAN: ON Semiconductor, Japan Customer Focus Center
German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time) 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Email: ONlit–[email protected] Phone: 81–3–5740–2745
French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse Time) Email: [email protected]
Email: ONlit–[email protected]
English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time) ON Semiconductor Website: http://onsemi.com
Email: [email protected]

EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781 For additional information, please contact your local
*Available from Germany, France, Italy, England, Ireland Sales Representative.

http://onsemi.com MCR8DSM/D
8
This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

You might also like