0% found this document useful (0 votes)
36 views1 page

Microprocessors and Microcontrollers 52

Uploaded by

harrymainah9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
36 views1 page

Microprocessors and Microcontrollers 52

Uploaded by

harrymainah9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

Dr. N. Karuppiah & Dr. S.

Ravivarman

 Accepts IRQ, determines priority, checks whether incoming priority


> current level being serviced, issues interrupt signal.
 In 8085 mode, provides 3-byte CALL instruction. In 8086 mode,
provides 8-bit vector number.
 Polled and vectored mode.
 Starting address of ISR or vector number is programmable.
 No clock required.

Pin Diagram

Fig. 2.7 8259 Pin Diagram

Bi-directional, tristate, buffered data lines. Connected to data


D0-D7
bus directly or through buffers
RD-bar Active low read control
WR-bar Active low write control
A0 Address input line, used to select control register
CS-bar Active low chip select
Bi-directional, 3-bit cascade lines. In master mode, PIC places
slave ID no. on these lines. In slave mode, the PIC reads slave ID
CAS0-2
no. from master on these lines. It may be regarded as slave-
select.
SP-bar Slave program / enable. In non-buffered mode, it is SP-bar
/ EN- input, used to distinguish master/slave PIC. In buffered mode, it
bar is output line used to enable buffers

52

You might also like