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VLSI Unit-5 2marks

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VLSI Unit-5 2marks

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Anitha S
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DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

ACADEMIC YEAR 2023-24

REGULATION 2021

SUB CODE/NAME: EC3552 – VLSI AND CHIP DESIGN

YEAR/SEM: III/V

TWO MARKS

UNIT- V ASIC DESIGN AND TESTING

1. What is the Full custom ASIC design?

ASIC stands for Application Specific Integrated Circuit


A chip is designed to perform a particular operation as opposed to general purpose
integrated circuits.
An ASIC is generally NOT Software programmable to perform a wide variety of
different tasks.
ASICs are silicon chips that have been designed for a specific application.
2. What are the special features of ASICs?

● High reliability
● Better performance
● Tighter security
● Lower power dissipation
● Cheaper cost
● Faster turn-around time
● Lower non-recurring cost
3. What is the Semi custom ASIC design?

Semi-custom IC design is a methodology for making an integrated circuit in which


a portion of the circuit function is predefined and unalterable, while other portions
can be configured to meet the designer's specific needs.
4. Give the different types of ASIC.

● Full custom ASICs


● Semi-custom ASICs
● Standard cell based ASICs
● Gate-array based ASICs
● Programmable ASICs
● Programmable Logic Device (PLD)
● Field Programmable Gate Array (FPGA).
5. What is FPGA?
A Field Programmable Gate Array (FPGA) is a programmable logic device that
supports implementation of relatively large logic circuits. FPGA can be used to
implement a logic circuit with more than 20,000 gates whereas a CPLD can
implement circuits of upto about 20,000 equivalent gates.

6. What is Programmable Array Logic?


The PAL is similar to PLA but in a PAL device only AND gates are
programmable. The OR array is fixed by the manufacturer in PAL.

This makes the PAL device easier to program and less expensive than PLA.
7. What is an antifuse?
An antifuse is normally high resistance (>100MΩ). on application of appropriate
programming voltages, the antifuse is changed permanently to a low-resistance
structure (200-500Ω) .

8. What is Programmable Logic Array?


A programmable logic array (PLA) is a programmable device used to implement
combinational logic circuits.

The PLA has a set of programmable AND planes, which link to a programmable
OR planes, which can then be conditionally complemented to produce an output.

This layout allows for a large number of logic functions to be synthesized in the
sum of products (sometimes product of sums) canonical forms.

9. What is meant by Programmable Logic Devices?


The logic devices other than TTL, CMOS families whose logical operation is
specified by the user through a process called programming and it is called
programmable logic devices. The programmable logic device is the IC that contain
digital logic cells and programmable interconnect.
10. What are macros?
The logic cells in a gate-array are often called macros.
11. What are programmable Interconnects?
In a PAL, the device is programmed by changing the characteristics if the
switching element. An alternative would be to program the routing.

12. What are the types of programmable devices?


Types of programmable devices are
● Programmable logic structure

● Programmable Interconnect

● Reprogrammable Gate Array

13. What is meant Gate array based ASIC?


A gate array or unlimited logic array (ULA) is an approach to the design and
manufacture of application specific integrated circuits (ASICs).

Gate array designs are slower than cell-based designs but the implementation time
is faster as less time must be spend in the factory.

14. What are the different types of Gate arrays?


The types of MGAs are given as
● Channeled Gate Array

● Channel less Gate Array

● Structured Gate Array

15. What are the disadvantages of Standard cell based ASIC?


● Costs in additional mask-making, software, and workstation resources

● Wasted chip area will be high due to the area occupied by the wiring channels
can exceed 50% of the internal chip.
● No saving in fabrication time due to prefabricated cells.
16. What are the advantages of Standard cell based ASIC?
● More flexible to include digital as well as analog functions

● More compact design (less routing area, improve speed).


17. What is standard cell-based ASIC design?

A cell-based ASIC (CBIC) uses predefined logic cells known as STANDARD


CELLS. The standard cell areas are also called flexible block in a CBIC are built of
rows of standard cells.
18. What are the different levels of design abstraction at physical design?

● Architectural or functional unit


● Register Transfer-level (RTL)
● Logic level
● Circuit level
19. What is meant by Standard cell library?

The Standard cell library contains a collection of logic gates over a range of fan-in
and fan-out. Besides the basic logic functions, such as inverter, NAND, NOR,
XOR and flip-flops. A typical library also contains more complex functions such
as multiplexers, full adder, comparator etc......
20. What is FPGA?
A Field Programmable Gate Array (FPGA) is a programmable logic device that
supports implementation of relatively large logic circuits

FPGA can be used to implement a logic circuit with more than 20,000 gates
whereas a CPLD can implement circuits of upto about 20,000 equivalent gates.

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