2020 IEEE International Conference for Convergence in Engineering

Timing Signal Generator for High Frequency Radar

Jasmin B. Mulla Ajay Khandare Rupali P. Patil
KJSCE, Vidyavihar SAMEER, IIT-Mumbai KJSCE, Vidyavihar
Mumbai, India Mumbai, India Mumbai, India
[email protected] [email protected] [email protected]

Abstract— In a radar application, Time Signal Generator more than the threshold, it is clear that the object is detected.
(TSG) is used to generate timing and control signals which These results are applied tracking algorithm which is used
helps radar to operate in different functions. The functions for further analysis [1].
include tracking, detection, and hold mode. Timing Signal
Generator is the heart of radar applications. Timing Signal Frequency Modulated Continuous Wave (FMCW) is one
Generator is the main part of radar application, which is of the special kind of radar sensor which transmits
responsible for synchronization between Transmitter and continuous wave-like continuous wave radar system. In the
receiver for the transmitted signal. In this work, an FWCM Radar system, during measurement, it can change
implementation of timing signal using a Hardware Description its operating frequency. In this system, the transmitted
Language (HDL) language-based state machine which is signal is a frequency modulated signal. It can measure a
responsible for enabling Direct Digital Synthesis and Analog to short ranges object and its relative velocity. Frequency
Digital Converter in the Transmitter and receiver window. Modulated Continuous Wave (FMCW) or Doppler radar
Timing Signal Generator implementation on Field contactless sensor system is introduced for slow-moving
Programmable Gate Array is preferred as the entire Timing object detection[2]. In this monostatic radar with single-
signal generator unit can be assembled on a single Field antenna, twice down-conversion and DFT algorithms are
programmable gate array chip, and conditional modification used to improve the detection accuracy which is operated on
can be performed remotely, which is cost-effective. Timing 5.8-GHz, 10 MHz bandwidth.
signal generator generation begins by providing an arbitrary The accuracy of the range measurement of FMCW is
frequency and phase signal configuration to DDS-AD9854 very high. Without the need for high peak transmitters and
from Field programmable gate array. Direct digital synthesis short pulses, FMCW gives good range resolution. Linearly
block generates a single-tone signal and Binary Phase Shift swept-frequency modulated continuous wave is highly and
Keying signal and a chirp signal based on an input arbitrary
widely used in a radar system. By using the architecture of
signal sent by ZYBO-7010 FPGA.
Direct Digital Synthesis (DDS) [3] and Phase-Locked Loop
(PLL) swept generator is synthesized, which generates a
Keywords—Frequency Modulated Continuous Wave
(FMCW), Field Programmable gate Array (FPGA), Digital
swept-frequency rate up to 1 KHz having deviation 1.5GHz.
Direct Synthesis(DDS), Phase Locked Loop (PLL), Voltage In range detection Radar system application accuracy is
controlled Oscillator (VCO), Hardware Description Language calculated on modulated radar signal that is how linear
(HDL). modulating signals are. To achieve this requirement digitally
generated reference signals are used in Phase-Locked Loop.
I. INTRODUCTION Linear frequency sweeps are generated by using DDS which
As there are many areas of technology are depend upon is controlled by FPGA.
radar application. These applications are related to medical, To detect closed multiple objects in a small displacement
space, military, autonomous vehicles and air traffic control, environment, 2.4GHz band FMCW radar system is
etc. Researchers are using it for medical tumor detection. developed [7]. Computer simulation is used to observe its
Automobile radar is used for V2V (vehicle to vehicle) performance. The detection method includes differential
communication and also driverless car. Autonomous detection as well as tunable FIR filter which detects objects
underwater vehicles (AUVs) are using a radar-based system separated by distance 0.5m and above from each other. To
to control direction and speed. As radar technology is monitor several objects at the same time, IOT based
continuously developing and responsible for revolutionizing application is also developed.
the concept of the radar system. This will open a door for
new concepts of radar systems as well as signal processing. In this paper, we are implementing a radar sub-system
using an FPGA. This system uses FPGA for controlling the
A radar that operates in a pulse-Doppler mode like High- transmitter and receiver by means of high-speed timing
Frequency Surface Radar (HFSWRs) are used in long-range signals. HF radar waveform generator is designed by using
vessel tracking. In this system, coherent pulses are emitted DM (digital modulation), which is based on direct digital
by radar. These pulses are reflected to radar by vessels. synthesis [6]. It is possible to generate signals whose
Which are within the area transmitted by the radar. These parameters like frequency, phases, and amplitude are
pulses are received by a receiver antenna. This received controlled by the description words (Registers), configured
signal is then applied to some digital process, thus the signal- by FPGA. This radar system overcomes the working
to-interference ratio enhances, interference by means of all capability of other systems in a high-frequency due use of
unwanted signals like external noise, sea clutter, and FPGA. This system has high accuracy due to the signal
ionospheric reflection. Then these returned signals are generation from DDS by mean of I and Q data samples. In
processed and according to velocity and range, it will be short, this system processes the ability to work on the high
arranged. To get a predetermined constant-false-alarm-rate frequency with high accuracy.
(CFAR), the received signals are compared with the
detection threshold. If the magnitude of the received signal

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II. METHODOLOGY Fig. 2 shows the plot of the transmitted and received
signal. In this plot, the x-axis represents the time and y-axis
A. Radar System represents frequency quantity of the saw-tooth modulation-
Fig.1 shows a basic block diagram of the FMCW radar based system. This plot shows how a beat signal is produced
system. It consists of TX (transmitter), a TX antenna, and using transmitted and received signals. Beat signal is pulse
receiving FMCW signals with a chirp signal. signal generated using the difference between transmitted
and received signal.
This difference signal is used to detect the object from
LPF which is used to filter the output signal. This signal is
then passed to the FFT transform. The FFT transforms result
shows the peak frequency spectrum concerning object
reflection. The peak frequency compared to noise margin.

Fig. 1. Block diagram of the FMCW Radar System.

The initial synchronization of frequency sweep time is

controlled by the controller. A transmitter of this radar
system is consists of an oscillator, VCO, and frequency
synthesizer. The frequency synthesizer controls the input
voltage of the VCO to generate the FMCW source. Power
divider is used to spread an RF signal to the transmitter Fig. 2. Fast chirp FMCW radar using saw tooth wave modulation.
antenna and receiver.
If multiple objects detected with different peak
The receiver consists of a Low Noise Amplifier, a
frequencies. These frequencies to peak use to identify the
mixer, HPF and LPF. By using a mixer, the RF signal is
object. The frequency and beat signal to objects is used to
down-converted for generating a beat signal. As in this
calculate the velocity. To calculate the distance and velocity
system, the reference signal is directly used as a transmitted
of multiple objects following formulae is used: -
signal which is applied through the mixer. Through this, it
shows a very high accuracy of detection of the received (1)
signal. ∆
∆
B. Chirp generation and Detection = (Ri - Ri+1)/T (2)
Transmitted and delayed received chirp signal is shown where,
in Fig.2. To extract, beat signal received signal is mixed R - Relative distance,
down with transmitted signal which frequency is c - Speed of light.
proportional to the distance of the target. Before that ADC ∆ - Frequency bandwidth of chirp signal.
processing and FFT transformation of the beat, signals are - Beat frequency.
detected, and then a distance of the object is calculated as v- the relative speed.
from the peak of the frequency spectrum. In radar systems
Δ R- Measured distance difference between Ri and
generally, two types of modulation are used, those are saw-
Ri+1.
tooth and triangular wave modulation. The received signal
T-Chirp duration.
peak frequencies are used to calculate the speed and distance
of an object in down-chirp or up-chirp. If too many targets to Wideband obstruction in the fast chirp of the FMCW
be detected, the peak matching of both chirp becomes system is shown in Fig. 3. As we are generating high-
difficult. As saw-tooth modulation is a concern, it is mainly frequency signals it easy to filter out a high low-frequency
used to detect multiple objects with high speed for both the signal by using LPF. As shown in the figure, the interference
chirp method [4]. In this method, each peak is tracked as an signal is eliminated from the chirp signal and able to support
object in the fast chirp radar. The main concept of distance a high noise environment for radar systems.
calculation is done on the bases of peak frequency detection
and their respective time of observation. This time and peak
frequency used to calculate the velocity of the object.

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 2020 IEEE International Conference for Convergence in Engineering

Fig. 5. TS signal of the radar system.

III. BLOCK DIAGRAM OF SYSTEM

Fig. 6 shows a complete block diagram of the radar system,
in which transmitter and receiver are implemented using
Fig. 3. Wideband interference in Fast Chirp FMCW radar. DDS and ADC respectively. The Zybo FPGA board is used
as a main central processing unit (CPU). The FPGA is used
C. Flow Chart
to control the timing window between TX and RX systems
by generating timing signals (TS). This timing signal
includes enabling pulse and clock signals for transmitter and
receiver.

Fig. 6. Block diagram of a system.

In this system, FPGA is used to configure DDS through

the SPI protocol. This configuration is done through writing
a particular value on resistor. This configuration is
application dependent and varies according to the need
(BPSK, QPSK, etc.). MODE resistor is responsible for
Fig. 4. Flow chart of Basic Radar System.
selection of signal modulation i.e. FSK, BSPK, single–tone
Fig. 4 shows the flow chart of the basic radar system. and Chirp signal. The FPGA is also responsible for the
The transmitter generates a high frequency (HF) configuration of ADC by mean of parallel data
transmission signal for a 2msec window as shown in Fig.5. communication protocol.
The transmission process is followed by a 2msec receiving As we are implementing FMCW radar, which uses the
process. In which receiver try to detect the transmitted transmitted signal as a reference signal, the reference signal
frequency and its time of detection. As ADC is acting on the is taken from DDS output and applied to the ADC reference
receiver side. ADC is supplied with a sampling clock with R pin. As we can see from fig 6 FPGA is responsible for
or RX window. generation signal with required frequency and modulation
This timing and frequency information is used to (by mean of DDS resistor). As TSG signal acting has main
calculate the distance of the detecting object. This basic control signal for complete radar system. These signals are
process is continuously performed to monitor and the used for synchronization between transmitter and receiver.
updated position of an object and speed of an object in the This is done through enable signal which keep DDS on for
radar area. transmitter window and vice–versa for ADC in receiver
window. ADC is reasonable for sample and converting
received signal digital value. The values are used for
calculating the object distance.

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 2020 IEEE International Conference for Convergence in Engineering

A. SPI Protocol As shown in the above Fig. 9, FPGA configuring DDS

Communication between the two devices can be achieved register by SPI protocol. SDI, SDO, SCK, and CS signal are
by using the SPI protocol. These two devices can be named repenting the SPI protocol in the above figure.
as Master and Slave. The clock signal (CLK or SCK) is TSG signals are generated using HDL coding shown in
generated by a master device to initiate communication. This Fig.10. Where TX and RX enable signal is represented by
SPI protocol, multiple, and the single master system are d_out [1] signal. ADC clock is sync with the RX window of
supported. Master based selection of slaves is done by CS 2msec represent by d_out[2] signal. Async is used for
wire. Master based data is transfer done using MOSI (master initialization as d_out[0].
out slave in) or SDO. The data from the slave to master is
done using MISO (master in slave in) or SDI. SPI is mainly
used for data transfer between sensors, ADC, DAC, etc.
IV. EXPERIMENTAL SETUP
Fig. 7 shows the experimental setup of the system, in
which the Zed board is used as the controller and it is
connected to DDS. The DDS output is monitor using DSO.
As FPGA is configuring DDS in single tone mode and
setting the frequency to 5 KHz. The output of DDS is 5 MHz
single-tone signal is observe on DSO.
Fig. 10. Time signal FPGA simulation result.

VI. CONCLUSION
In this system, we have implemented an HF radar’s
main control unit which includes TSG (timing signal
generator). Through FPGA we can implement a high-
frequency system. As we are using high accurate frequency
generator which processes I and Q samples as compare to
traditional DAC. This makes the system high precise for
frequency generation and accurate for distance detection.
Fig. 7. Block diagram of a system. The radar system is based on the FMCW model which uses
the transmitted signal as a reference signal. FMCW
Fig. 8 shows the output of DDS in BPSK mode. In this architecture makes is highly accurate even in low SNR
mode transmitted signal is modulated using BPSK conditions or noise conditions.
modulation. We can see the binary phase shift in signal,
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Fig. 9. The waveform of DDS and FPGA simulation.

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