SE-212L COA Lab Manual (Updated)
SE-212L COA Lab Manual (Updated)
Name:______________________________
Roll No.: ___________________________
Section: ____________________________
Lab Teacher:________________________
TABLE OF CONTENT
Lab Objective Signature Remarks
No.
1 To Understand and explore Visible Virtual Machine
(VVM).
2 To learn VVM Programming and simulate VVM
program using Basic I/O instructions.
3 To Perform basic Arithmetic Operations (Add and Sub)
using Visible Virtual Machine) VVM
4 To understand Branching and simulate VVM
Programs using ”BRP” , “BRZ” & “BR” instructions.
5 To introduce MIPS Assembly Language Programming
using MARS Software (MIPS simulator).
6 To get familiar with addressing modes of MIPS
architecture.
7 To Study and implement basic MIPs Arithmetic
Instructions (add,Sub,Mul and Div) using MARS
Simulator.
8 To Implement MIPS conditional instructions using
MARS Simulator
9 To Study and simulate MIPS bit manipulation
instructions OR & AND .
10 To Learn to use MIPS bit manipulation instructions
XOR.
11 To Study how to implement translation of“if then else”
control structures in MIPS assembly language.
12 To Study how to implement translation of“for
loop”control structures in MIPS assembly language.
13 To introduce how to implement array as an abstract data
structure in MIPS assembly language.
14 To Study how to implement translation of a “switch”
control structure in MIPS assembly language.
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LAB # 1
OBJECTIVE
To Understand and explore Visible Virtual Machine (VVM).
THEORY
Visible Virtual Machine (VVM)
The Visible Virtual Machine (VVM) is based on a model of a simple computer device
called the Little Man Computer which was originally developed by Stuart Madnick in
1965, and revised in 1979. The revised Little Man Computer model is presented in
detail in "The Architecture of Computer Hardware and System Software" (2'nd), by Irv
Englander (Wiley, 2000).
VVM is a 32-bit application for use on a Windows platform. The application adheres
to the Windows style GUI guidelines and thus provides a short learning curve for
experienced Windows users. Online context-sensitive help is available throughout the
application.
VVM includes a fully functional Windows-style VVM Program Editor for creating and
manipulating VVM programs. The editor provides a program syntax validating facility
which identifies errors and allows them to be corrected. Once the program has been
validated, it can be loaded into the VVM Virtual Hardware.
For simplicity, VVM works directly with decimal data and addresses rather than with
binary values. Furthermore, the virtual machine works with only one form of data:
decimal integers in the range ± 999. This design alleviates the need to interpret long
binary strings or complex hexadecimal codes.
When using VVM, the user is given total control over the execution of his or her
program. Execution speed of the program can be increased or decreased via a
mousedriven speed control. The program can be paused and subsequently resumed at
any point, at the discretion of the user. Alternatively, the user can choose to step
through the program one statement at a time. As each program instruction is executed,
all relevant hardware components (e.g., internal registers, RAM locations, output
devices, etc.) are updated in full view of the user.
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Hardware Components
• I/O Log. This represents the system console which shows the details of relevant
events in the execution of the program. Examples of events are the program begins,
the program aborts, or input or output is generated.
• Accumulator Register (Accum). This register holds the values used in arithmetic
and logical computations. It also serves as a buffer between input/output and
memory. Legitimate values are any integer between -999 and +999. Values outside
of this range will cause a fatal VVM Machine error. Non integer values are
converted to integers before being loaded into the register.
• Instruction Cycle Display. This shows the number of instructions that have been
executed since the current program execution began.
• Instruction Register (Instr. Reg.). This register holds the next instruction to be
executed. The register is divided into two parts: a one-digit operation code, and a
two digit operand. The Assembly Language mnemonic code for the operation code
is displayed below the register.
• Program Counter Register (Prog. Ctr.). The two-digit integer value in this
register "points" to the next instruction to be fetched from RAM. Most instructions
increment this register during the execute phase of the instruction cycle. Legitimate
values range from 00 to 99. A value beyond this range causes a fatal VVM Machine
error.
• RAM. The 100 data-word Random Access Storage is shown as a matrix of ten
rows and ten columns. The two-digit memory addresses increase sequentially
across the rows and run from 00 to 99. Each storage location can hold a three-digit
integer value between -999 and +999.
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Trace View
The Trace View window provides a history of the execution of your program. Prior to
the execution of each statement, the window shows:
• Data value out of range. This condition occurs when a data value exceeds the
legitimate range -999 - +999. The condition will be detected while the data
resides in the Accumulator Register. Probable causes are an improper addition or
subtraction operation, or invalid user input.
• Program counter out of range. This occurs when the Program Counter Register
is incremented beyond the limit of 99. The likely cause is failure to include a Halt
instruction in your program, or a branch to a high memory address.
• User cancel. The user pressed the "Cancel" button during an Input or Output
operation.
LAB TASKS:
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LAB # 2
OBJECTIVE
To learn VVM Programming and simulate VVM program using Basic I/O instructions.
THEORY
VVM Programming
VVM has its own simple Programming Language which supports such operations as
conditional and unconditional branching, addition and subtraction, and input and
output, among others. The language allows the student to create reasonably complex
programs, and yet the language is quite easy to learn and to understand -- only eleven
unique operations are provided. When VVM programs go awry, as in the case of
endless loops or data overflows, VVM (virtual) system errors are triggered before the
user's eyes.
Following the automatic syntax validation process, VVM programs are converted to
machine language format and loaded into the 100 data-word virtual RAM which is
fully visible to the user during program execution.
o Output (902) [OUT] (or [PRN]) The content of the Accumulator Register is
output to the user. The current content of the register remains unchanged. The
Program Counter Register is incremented by one.
o Halt (0nn) [HLT] (or [COB]) Program execution is terminated. The operand
value nn is ignored in this instruction and can be omitted in the Assembly
Language format.
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A simple VVM Assembly Language program which takes an input value and then
display it.
// A sample VVM Assembly program
IN Input number to be added
OUT Output result
HLT Halt (program ends here)
This same program could be written in VVM Machine Language format as follows:
// The Machine Language version
901 Input number to be added
902 Output result
000 Halt (program ends here)
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STEP2: Copy the code and paste in the blue editor window.
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OUTPUT
Hardware View
Trace View
LAB TASK
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LAB # 3
OBJECTIVE
To Perform basic Arithmetic Operations (Add and Sub) using Visible Virtual Machine)
VVM
THEORY
The Language Instructions
The eleven operations of the VVM Language are described below. The Machine
Language codes are shown in parentheses, while the Assembly Language version is in
square brackets.
o Store Accumulator (3nn) [STO nn] (or [STA nn]) The content of the
Accumulator Register is copied to RAM address nn, replacing the current
content of the address. The content of the Accumulator Register remains
unchanged. The Program Counter Register is incremented by one.
o Add (1nn) [ADD nn] The content of RAM address nn is added to the content
of the Accumulator Register, replacing the current content of the register. The
content of RAM address nn remains unchanged. The Program Counter
Register is incremented by one.
o Subtract (2nn) [SUB nn] The content of RAM address nn is subtracted from
the content of the Accumulator Register, replacing the current content of the
register. The content of RAM address nn remains unchanged. The Program
Counter Register is incremented by one.
o No Operation (4nn) [NOP] (or [NUL]) This instruction does nothing other
than increment the Program Counter Register by one. The operand value nn is
ignored in this instruction and can be omitted in the Assembly Language
format. (This instruction is unique to the VVM and is not part of the original
Little Man Model.)
Data values used by a program can be loaded into memory along with the
program. In Machine or Assembly Language form simply use the format
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"snnn" where s is an optional sign, and nnn is the three-digit data value. In
Assembly Language, you can specify "DAT snnn" for clarity.
A simple VVM Assembly Language program which adds an input value to the constant
value -1 is shown below (note that lines starting with "//" and characters to the right of
program statements are considered comments, and are ignored by the VVM machine).
This same program could be written in VVM Machine Language format as follows:
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LAB TASKS
1. Take an integer as input and another integer is predefined in any memory
location. Subtract them.
2. Take your Roll no. and Date of birth (day only in integer) as input and subtract
them.
3. Add the first three digits of your Roll no.
4. Solve: 25-15+38-20+21
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LAB # 4
OBJECTIVE
To understand branching and simulate vvm programs using ”brp” , “brz” & “br” instructions.
THEORY
BRP nn
Branch if Positive or Zero (8nn) [BRP nn] This is a conditional branch instruction.
If the value in the Accumulator Register is positive or zero, then the Program Counter
Register is replaced by the operand value nn. The result is that the next instruction to
be executed will be taken from address nn rather than from the next sequential address.
Otherwise (Accumulator < 0), the Program Counter Register is incremented by one,
and the next sequential instruction is executed.
BRZ nn
Branch if Zero (7nn) [BRZ nn] This is a conditional branch instruction. If the value
in the Accumulator Register is zero, then the Program Counter Register is replaced by
the operand value nn. The result is that the next instruction to be executed will be taken
from address nn rather than from the next sequential address. Otherwise (Accumulator
<> 0), the Program Counter Register is incremented by one, and the next sequential
instruction is executed.
BR nn
Branch (6nn) [BR nn] (or [BRU nn] or [JMP nn]) This is an unconditional branch
instruction. The current value of the Program Counter Register is replaced by the
operand value nn. The result is that the next instruction to be executed will be taken
from address nn rather than from the next sequential address. The value of the
Program Counter Register is not incremented with this instruction.
VVM Program # 3 Jump to top of
loop hlt [10]
Simple looping example. Done Equivalent
to the following
BASIC
In Input A sto 99 Store A brp program:
04 [02] If A >= 0 then skip next br 10 INPUT A
Jump out of loop (Value < 0) brz 10 DO WHILE A > 0
[04] If A = 0 jump out of loop lda 99
PRINT A
Load value of A (don't need to)
out Print A in INPUT A
Input new A sto 99 Store LOOP
new value of A br 02 END
Sample program to print the square of any integer in the range 1-31.
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LAB TASKS:
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LAB # 5
OBJECTIVE
To introduce MIPS Assembly Language Programming using MARS Software (MIPS
simulator).
THEORY
Types of Storage:
To a programmer, storage in MIPS is divided into two main categories. The first
category, memory that exists in the Central Processing Unit (CPU) itself, is called
register memory or more commonly simply registers. Register memory is very limited
and contained in what is often called a register file on the CPU. This type of memory
will be called registers.
The second type of memory is what most novice programmers think of as memory and
is often just called memory. Memory for the purposes is where a programmer puts
instructions and data. So from a programmer's point of view, anything stored on a
computer is stored in memory.
The following diagram shows a simple design for a 3-Address Load/Store computer,
which is applicable to a MIPS computer.
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All CPU architectures contain 3 main units. The first is the ALU, which performs all
calculations such as addition, multiplication, subtraction, division, bit-shifts, logical
operations, etc. Except for instructions which interface to units not on the CPU, such as
memory access or interactions with the user of disks, all operations use the ALU.
Registers are a limited amount of memory which exists on the CPU. No data can be
operated on in the CPU that is not stored in a register. Data from memory, the user, or
disk drives must first be loaded into a register before the CPU can use it. In the MIPS
CPU, there are only 32 registers, each of which can be used to store a single 32 bit
values. Because the number of these registers is so limited, it is vital that the
programmer use them effectively.
In order to use data from memory, the address and data to be read/written is placed on
the system bus using a load/store command and transferred to/from the memory to the
CPU. The data and address are normally placed on the system bus using a Load Word,
lw, or Store Word, sw, operation. The data is then read/written from/to memory to/from
a register. To use more than 32 data values in a program, the values must exist in
memory, and must be loaded to a register to use.
There is a second way to read/write data to/from a register. If the data to be accessed is
on an external device, such as a user terminal or disk drive, the syscall operator is used.
The syscall operator allows the CPU to talk to an I/O controller to retrieve/write
information to the user, disk drive, etc.
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The final part of a CPU is the Control Unit (CU). A CU controls the mechanical settings
on the computer so that it can execute the commands. The CU is the focus of a class
which is often taught with assembly language, the class being Computer Architecture.
This class will not cover the CU in anything but passing detail.
MIPS Registers:
The MIPS registers are arranged into a structure called a Register File. MIPS comes
with 32 general purpose registers named $0. . . $31. Registers also have symbolic names
reflecting their conventional use:
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# Title: Filename:
# Author: Date:
# Description:
# Input:
# Output:
################# Data segment #####################
.data
...
...
################# Code segment #####################
.text
.global main
main:
... # main program entry
...
li $v0, 10 # Exit program
Assembly language programs are not compiled, they are assembled. So a program does
not consist of statements and blocks of statements as in a HLL, but a number of
instructions telling the computing machine how to execute. Assembly language source
code lines follow this format:
Labels: Labels are nothing more than names used for referring to numbers and
character strings or memory locations within a program. Labels let you give names to
memory variables, values, and the locations of instructions. The label main is equivalent
to the address of the first instruction in program1.
Top-level Directives:
.text: indicates that following items are stored in the user text segment, typically
instructions.
.data: indicates that following data items are stored in the data segment.
Defines the data segment of a program containing data
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.DATA
First: .space 100 Second:
.word 1, 2, 3
Third: .byte 99, 2, 3
.globl sym: declare that symbol sym is global and can be referenced from other files.
Pseudo-instructions:
MIPS Instructions:
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• Data Transfer
• Arithmetic and Logical
• Control
• Floating Point
Load and store instructions are the only instructions that can access memory. Their
purpose is to move data between a memory location and a CPU register. They are not
interchangeable with the move instruction. Load and store instructions take one register
operand and one memory address or immediate operand.
Instructions Description
la Rdest, var Load Address. Loads the address of var into Rdest.
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Input and output in MIPS is performed by system calls, which are calls to operating
system kernel subprograms. To initiate a system call, we load the system call
function code into $v0. If the function requires arguments, they go into the
argument registers, starting with $a0. The system call function codes are as follows:
Code in
Service $v0 Argument(s) Result(s)
$a0 = number to be
Print integer 1 printed
$a0 = address of string
Print String 4
in memory
Number returned in
Read Integer 5
$v0.
$a0=address of input
buffer in memory.
Read String 8 $a1 = length of buffer
(n)
Exit 10
Print Char 11 $a0 =character to print
Introduction to MARS:
MARS, the Mips Assembly and Runtime Simulator, will assemble and simulate the
execution of MIPS assembly language programs. It can be used either from a command
line or through its integrated development environment (IDE).
MARS is the easiest to use, and provides the best tools for explaining how MIPS
assembly and the MIPS CUP work. MARS is an executable jar file, so you must have
the Java Runtime Environment (JRE) installed to run MARS. A link to Java is on the
MARS download page, so you should install Java if it is not on your computer. When
it is started, a page which is similar to the following should come up.
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• Menus and Toolbar: Most menu items have equivalent toolbar icons. If the
function of a toolbar icon is not obvious, just hover the mouse over it and a tool
tip will soon appear. Nearly all menu items also have keyboard shortcuts. Any
menu item not appropriate in a given situation is disabled.
• Editor: MARS includes two integrated text editors. The default editor, new in
Release 4.0, features syntax-aware color highlighting of most MIPS language
elements and popup instruction guides. The original, generic, text editor without
these features is still available and can be selected in the Editor Settings dialog.
It supports a single font which can be modified in the Editor Settings dialog.
The bottom border of either editor includes the cursor line and column position
and there is a checkbox to display line numbers. They are displayed outside the
editing area. If you use an external editor, MARS provides a convenience setting
that will automatically assemble a file as soon as it is opened. See the Settings
menu.
• Message Areas: There are two tabbed message areas at the bottom of the screen.
The Run I/O tab is used at runtime for displaying console output and entering
console input as program execution progresses. You have the option of entering
console input into a pop-up dialog then echoes to the message area. The MARS
Messages tab is used for other messages such as assembly or runtime errors and
informational messages. You can click on assembly error messages to select the
corresponding line of code in the editor.
• MIPS Registers: MIPS registers are displayed at all times, even when you are
editing and not running a program. While writing your program, this serves as
a useful reference for register names and their conventional uses (hover mouse
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over the register name to see tool tips). There are three register tabs: the Register
File (integer registers $0 through $31 plus LO, HI and the Program Counter),
selected Coprocessor 0 registers (exceptions and interrupts), and Coprocessor 1
floating point registers.
• Assembly: Select Assemble from the Run menu or the corresponding toolbar
icon to assemble the file currently in the Edit tab. Prior to Release 3.1, only one
file could be assembled and run at a time. Releases 3.1 and later provide a
primitive Project capability. To use it, go to the Settings menu and check
Assemble operation applies to all files in current directory. Subsequently, the
assembler will assemble the current file as the "main" program and also
assemble all other assembly files (*.asm; *.s) in the same directory. The results
are linked and if all these operations were successful the program can be
executed. Labels that are declared global with the ".globl" directive may be
referenced in any of the other files in the project. There is also a setting that
permits automatic loading and assembly of a selected exception handler file.
MARS uses the MIPS32 starting address for exception handlers: 0x80000180.
• Execution: Once a MIPS program successfully assembles, the registers are
initialized and three windows in the Execute tab are filled: Text Segment, Data
Segment, and Program Labels. The major execution-time features are described
below.
• Labels Window: Display of the Labels window (symbol table) is controlled
through the Settings menu. When displayed, you can click on any label or its
associated address to center and highlight the contents of that address in the Text
Segment window or Data Segment window as appropriate.
The assembler and simulator are invoked from the IDE when you select the Assemble,
Go, or Step operations from the Run menu or their corresponding toolbar icons or
keyboard shortcuts. MARS messages are displayed on the MARS Messages tab of the
message area at the bottom of the screen. Runtime console input and output is handled
in the Run I/O tab.
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STEP#1: Load mars simulator, copy this code to the editor and save file with .asm
extension.
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STEP# 3
Execute program by pressing F5.
Type any integer number for input.
LAB TASKS
1. Write an assembly program that Read and Print your Roll No.
2. Write an assembly program that Read and Print Last Alphabet of your Name.
3. Write an assembly program that Read and Print Your Full Name.
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LAB # 6
OBJECTIVE
To get familiar with addressing modes of MIPS architecture.
THEORY
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In base register addressing we add a small constant to a pointer held in a register. The
register may point to a structure or some other collection of data, and we need to load a
value at a constant offset from the beginning of the structure. Because each MIPS
instruction fits in one word, the size of the constant is limited to 16 bits.
Example: lw $t1,4($t0)
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LAB # 7
OBJECTIVE
To Study and implement basic MIPs Arithmetic Instructions (add,Sub,Mul and Div)
using MARS Simulator.
THEORY
Most MIPS operators take 3 registers as parameters, which is the reason it is called a
3-address machine. They are: the first input to the ALU, always Rs (the first source
register); the second input to the ALU, either Rt (the second source register) or an
immediate value; and the register to write the result to, Rd (the destination register).
ARITHMETIC INSTRUCTIONS
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Addition Operators:
There are 4 real addition operators in MIPS assembly. They are:
add operator, which takes the value of the Rs and Rt registers containing integer
numbers, adds the numbers, and stores the value back to the Rd register. The format and
meaning are:
format: add Rd, Rs, Rt meaning:
Rd <- Rs + Rt
addi operator, which takes the value of Rs and adds the 16 bit immediate value in the
instruction, and stores the result back in Rt. The format and meaning are:
format: addi Rt, Rs, Immediate
meaning: Rt <- Rs + Immediate
addu operator, which is the same as the add operator, except that the values in the
registers are assumed to be unsigned, or whole, binary numbers. There are no negative
values, so the values run from 0..232-1. The format and the meaning are the same as the
add operator above:
format: addu Rd, Rs, Rt
meaning: Rd <- Rs + Rt
addiu operator, which is the same as the addi operator, but again the numbers are
assumed to be unsigned8:
format: addiu Rt, Rs, Immediate
meaning: Rt <- Rs + Immediate
Subtraction in MIPS assembly
Subtraction in MIPS assembly is similar to addition with one exception. The sub, subu
and subui behave like the add, addu, and addui operators. The only major difference
with subtraction is that the subi is not a real instruction. It is implemented as a pseudo
instruction, with the value to subtract loaded into the $at register, and then the R
instruction sub operator is used. This is the only difference between addition and
subtraction.
sub operator, which takes the value of the Rs and Rt registers containing integer
numbers, adds the numbers, and stores the value back to the Rd register. The format and
meaning are:
format: sub Rd, Rs, Rt meaning:
Rd <- Rs - Rt
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sub pseudo operator, which takes the value of Rs, subtracts the 16 bit immediate value
in the instruction, and stores the result back in Rt. The format, meaning, and translation
are:
format: subi Rt, Rs, Immediate
meaning: Rt <- Rs - Immediate translation:
addi $at, $zero, Immediate
sub Rt, Rs, $at
subi pseudo operator, which takes the value of Rs, subtracts the 16 bit immediate value
in the instruction, and stores the result back in Rt. The format, meaning, and translation
are:
format: subi Rt, Rs, Immediate
meaning: Rt <- Rs - Immediate
translation: addi $at, $zero, Immediate
sub Rt, Rs, $at
subu operator, which is the same as the add operator, except that the values in the
registers are assumed to be unsigned, or whole, binary numbers. There are no negative
values, so the values run from 0..232-1. The format and the meaning are the same as the
add operator above:
format: subu Rd, Rs, Rt
meaning: Rd <- Rs + Rt
Multiplication and division are more complicated than addition and subtraction, and
require the use of two new, special purpose registers, the hi and lo registers. The hi
and lo registers are not included in the 32 general purpose registers which have been
used up to this point, and so are not directly under programmer control.
Since multiplication of two 32-bit numbers requires 64-bits, two 32-bit registers are
required. All computers require two registers to store the result of a multiplication,
though the actual implementation of those two registers is different. It MIPS, the hi
and lo registers are used, with the hi register being used to store the 32 bit larger part
of the multiplication, and the lo register being used to the store the 32 bit smaller part
of the multiplication.
In MIPS, all integer values must be 32 bits. So if there is a valid answer, it must be
contained in the lower 32 bits of the answer. Thus to implement multiplication in MIPS,
the two numbers must be multiplied using the mult operator, and the valid result moved
from the lo register. This is shown in the following code fragment which multiplies
the value in $t1 by the value in $t2, and stores the result in $t0.
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mult operator, which multiplies the values of Rs and Rt and saves it in the lo and hi
registers. The format and meaning of this operator is:
format: mult Rs, Rt meaning:
[hi,lo] <- Rs * Rt
mflo operator, which moves the value from the hi register into the Rd register. The
format and meaning of this operator is:
format: mflo Rd meaning:
Rd <- lo
mfhi operator, which moves the value from the hi register into the Rd register. The
format and meaning of this operator is:
format: mfhi Rd meaning:
Rd <- hi
mult operator, which multiples the values in Rs and Rt, and stores them in Rd. The
format and meaning of this operator is:
format: mult Rd, Rs, Rt
meaning: Rd <- Rs * Rt
Division, like multiplication requires two registers to produce an answer. The reason
for this has to do with how the hardware calculates the result, and is harder to explain
without considering the hardware used.
EXAMPLE PROGRAM #1
Sum of Two Integers ################# Data segment #####################
.data
prompt: .asciiz "Please enter two numbers: \n" sum_msg:
.asciiz "The sum is: "
################### Code segment ###################
.text
.globl main main: la$a0,prompt #
display prompt string
li $v0,4 syscall
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Example Program 3:
Divide instruction divides the 32-bit binary value in register $t0 by the 32- bit value
in register $t1. The quotient is stored in the Low register and the remainder is stored
in the High register. The following code segment shows how the quotient is moved
into $t2 and the remainder is moved into $t3:
div $t0, $t1 mflo $t2 # here lower register $t2 contain the quotient.
mfhi $t3 # here high register $t3 contain the remainder.
################# Data segment #####################
.DATA
prompt: .asciiz" Quotient is : " prompt1:
.asciiz"\nRemainder is: "
.text
.globl main # main program entry main:
li $t0,42 #$t0=42 li
$t1,2 #$t1=2
div $t0, $t1 mflo $t2 # here lower register $t2 contain
the quotient. mfhi $t3 # here high register $t3 contain
the remainder.
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LAB TASKS:
1. Write a MIPS Assembly program that Take three digits of your Roll Numbers
as inputs and add them.
2. Write a MIPS Assembly program that Take first and last digits of your Roll
Numbers and subtract them.
3. Write a MIPS Assembly program that takes an integer input and multiply that
number with last digit of your roll number.
4. Write a MIPS Assembly program that takes your three-digit roll number as input
and divide it with second digit of your roll number.
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LAB # 8
OBJECTIVE
To Implement MIPS conditional instructions. using MARS Simulator.
THEORY
Conditional Instructions
Unconditional Jumps:
blezRs, Label
Branch if Less Than or Equal to Zero.
if( Rs ≤ 0 ) go to Label.
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bnezRs, Label
Branch if Not Equal to Zero.
if(Rs != 0) go to Label
PROGRAM #1
Write a MIPS assembly language program that calculates the sum of all positive
integers less than or equal to N and displays the result.
end:
li $v0, 4 # system call code for Print String la
$a0, bye # load address of msg. into $a0 syscall
# print the string
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LAB TASKS:
1. Write a MIPS assembly language program that calculates the sum of all positive
even integers less than or equal to N and displays the result.
2. Write a MIPS Assembly program that takes an integer input and multiply that
number with last digit of your roll number. Display whether number is even or
odd.
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LAB # 9
OBJECTIVE
To Study and simulate MIPS bit manipulation instructions OR & AND.
THEORY
The main usage of bitwise logical instructions are: to set, to clear some selected bits in
the destination operand. To do this, a source bit pattern known as a mask is
constructed. The Mask bits are chosen based on the following properties of AND, OR,
and XOR with Z represents a bit (either 0 or 1):
AND OR
Z AND 0 = 0 Z OR 0 = Z
Z AND 1 = Z Z OR 1 = 1
AND instruction:
The AND instruction can be used to CLEAR specific destination bits while preserving
the others. A zero mask bit clears the corresponding destination bit; a one mask bit
preserves the corresponding destination bit.
OR instruction:
The OR instruction can be used to SET specific destination bits while preserving the
others. A one mask bit sets the corresponding destination bit; a zero mask bit
preserves the corresponding destination bit
EXAMPLE PROGRAM #1
Write a MIPS assembly program that take input value and perform bitwise AND
instruction with mask 1.
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OUTPUT:
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LAB TASKS:
1. Write a MIPS assembly program that take input value and perform bitwise AND
instruction with mask 0.
2. Write a MIPS assembly program that take input value and perform bitwise OR
instruction with mask 0.
3. Write a MIPS assembly program that take input value and perform bitwise OR
instruction with mask 1.
4. Clear the sign bit of $t0 while leaving the other bits unchanged?
5. Set the most significant and least significant bits of $t0 while preserving the
other bits?
6. Implement following circuit into MIPS Assembly Language using AND,OR
instructions.
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LAB # 10
OBJECTIVE
To Learn to use MIPS bit manipulation instructions XOR.
THEORY
BITWISELOGICALINSTRUCTIONS
Instructions Description
and rd, rs, rt rd = rs&rt
andi rt, rs, immediate rt = rs& immediate
or rd, rs, rt rd = rs | rt
ori rt, rs, immediate rd = rs | immediate
nor rd, rs, rt rd = ! ( rs | rt )
xor rd, rs, rt To do a bitwise logical Exclusive OR.
xori rt, rs, immediate
The main usage of bitwise logical instructions are:to set, to clear, to invert, and to
isolate some selected bits in the destination operand. To do this a source bit pattern
known as a mask is constructed. The Mask bits are chosen based on the following
properties of AND, OR, and XOR with Z represents a bit (either 0 or 1):
AND OR XOR
Z AND 0 = 0 Z OR 0 = Z Z XOR 0 = Z
Z AND 1 = Z Z OR 1 = 1 Z XOR 1 = ~Z
XOR instruction:
The XOR instruction can be used to INVERT specific destination bits while preserving
the others. A one mask bit inverts the corresponding destination bit; a zeromask bit
preserves the corresponding destination bit.
A. Example 1:
Change the sign bit of $t0?
Solution:
Use the XOR instruction with a mask of 80000000h. xori
$t1,$t0,0x80000000
EXAMPLE PROGRAM #1
Write a MIPS assembly program that take input value and perform bitwise XOR
instruction with mask 1.
############# DATA SEGMENT ##################
.data
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input: .asciiz "\n enter an integer value: " # VARIABLE DECLARATION result:
.asciiz "\n result is: "
.text
.globl main main:
li $t0,0xffffffff # 1 MASK
move $t1,$v0
OUTPUT:
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LAB TASKS:
1. Write a MIPS assembly program that take input value and perform bitwise XOR
instruction with mask 0.
2. Implement following circuits into MIPS Assembly Language using AND, OR
& XOR instructions.
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LAB # 11
OBJECTIVE
To Study how to implement translation of “if then else” control structures in MIPS
assembly language.
THEORY
TRANSLATION OF AN “IF THEN ELSE” CONTROL STRUCTURE
The “If (condition) then do {this block of code} else do {that block of code}” control
structure is probably the most widely used by programmers. Let us suppose that a
programmer initially developed an algorithm containing the following pseudocode.
When the time comes to translate this pseudo code to MIPS assembly language the
results could appear as shown below. (In MIPS assembly language, anything on a line
following the number sign (#) is a comment. Notice how the comments in the code
below help to make the connection back to the original pseudocode).
sll $t2,$v0,2 # set $t2 to result of shifting $v0 left by number specified by b
……………….immediate
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srl $t2,$v0,2 # set $t2 to result of shifting $v0 right by number specified by
………………immediate
Example Program#1:
Write a program in MIPS assembly language that translate IF-THEN ELSE control
structure.
################## DATA SEGMENT ########################
.data input: .asciiz "\n type any number"
rshift: .asciiz "\n number after right shift: "
lshift: .asciiz "\n number after left shift: "
################## TEXT SEGMENT ########################
.text
.globl main main: la $a0,input #
print input message
li $v0,4
syscall
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OUTPUT:
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LAB TASKS:
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LAB # 12
OBJECTIVE
To Study how to implement translation of “for loop” control structures in MIPS
assembly language.
THEORY
TRANSLATION OF A “FOR LOOP” CONTROL STRUCTURE
Obviously a “ for loop ” control structure is very useful. Let us suppose that a
programmer initially developed an algorithm containing the following pseudocode. In
one sentence, can you describe what this algorithm accomplishes?
$a0 = 0;
For ( $t0 =10; $t0 > 0; $t0 = $t0 -1)
do{$a0 = $a0 + $t0}
li $a0, 0 # $a0 = 0
li $t0, 10 # Initialize loop counter to 10
loop: add $a0,
$a0, $t0 addi
$t0, $t0, -1 # Decrement loop counter
bgtz $t0, loop # If ($t0 > 0) Branch to loop
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PROGRAM#1:
Write a program in MIPS assembly language that translateFOR LOOP control structure.
################## DATA SEGMENT ###################
.data counter: .asciiz"\n value of count,
$t0: " total: .asciiz"value of sum, $a0: "
tab: .asciiz"\t"
################## TEXT SEGMENT ###################
.text
.globl main main:
li $a2,0 # $a2=0
li $t0,10 # initiallize loop variable counter $t0=10
loop: add
$a2,$a2,$t0
end: li
$v0,10
syscall
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OUTPUT:
LAB TASKS:
1. Take any integer from user. If it’s positive, print the integer. Otherwise,
program should be closed. Repeat the task, the no. of times of the last digit of
your roll no.
2. Show the result of following expression: 2n , Where n is last digit of your Roll
No.
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LAB # 13
OBJECTIVE
To introduce how to implement array as an abstract data structure in MIPS assembly
language
THEORY
Implementing arrays in MIPS Assembly language involves several steps, including
declaring the array in memory, accessing individual elements, and performing
operations on the elements. Here's a step-by-step guide on how to implement and use
arrays in MIPS Assembly:
In the data section, you can declare an array and initialize it with values. For example:
.data
array: .word 10, 20, 30, 40, 50 # An array of 5 integers length:
.word 5 # Length of the array
To access an element in the array, you need to calculate the address of the element.
Each integer (word) in MIPS is 4 bytes, so you multiply the index by 4 and add it to
the base address of the array.
Let's create an example program that sums all the elements in the array.
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PROGRAM#1:
Write a program to implement array as an abstract data structure in MIPS assembly
language.
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LAB # 14
OBJECTIVE
To study how to implement translation of a “switch” control structure in MIPS assembly
language
THEORY
Implementing a switch-case structure in MIPS that includes printing a value requires
integrating the logic for the switch-case with the syscall for printing. Below is an
example MIPS program that demonstrates this.
PROGRAM#1:
Write a program to implement translation of a “switch” control structure in MIPS assembly
language.
################## DATA SEGMENT ###################
.data case1_msg: .asciiz "Case 1: Value is
10\n" case2_msg: .asciiz "Case 2: Value is
20\n" case3_msg: .asciiz "Case 3: Value is
30\n" default_msg: .asciiz "Default case: Value
is 0\n" prompt: .asciiz "Enter an integer: "
################## TEXT SEGMENT ###################
.text
.globl main main:
# Print prompt
la $a0, prompt # Load address of prompt message
li $v0, 4 # Syscall code for printing string
syscall # Print the prompt message
# Read integer
li $v0, 5 # Syscall code for reading integer
syscall # Read the integer
move $t0, $v0 # Move the read integer to $t0
# Switch-case implementation
li $t1, 1 # Load immediate value 1 into $t1
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