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TD 02

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9 views2 pages

TD 02

Uploaded by

numidianani
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© © All Rights Reserved
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COMPUTER ARCHITECTURE 2 ENSTA– MI2– 2024/2025

Set of exercises 02

Exercise 01:
Add the following positive integers directly in binary. Indicate which cases result in an overflow
in the 8-bit representation (Overflow: capacity exceeded). And discuss how swap memory could
be utilized to manage overflow situations.

(00101001)2 + (11001010)2 / (10101011)2 + (11001010)2 / (11111111)2 + (11111111)2

Exercise 02:
We want to create a monitoring system using a ROM to keep track of 5 rooms. This system
receives input signals from the 5 rooms (R0, R1, R2, R3, R4). The system operates as follows:

 If Ri=1, it indicates that there is activity in room i.


 The priority order of the signals is: R0>R1>R2>R3>R4.

The monitoring system has three outputs:

 An output Active that goes to 1 as soon as any of the Ri signals are active.
 Two output signals, Room1 and Room0 that provide the binary code representing the
highest-priority room with activity.

Task:

1. Create the truth table for this monitoring system.


2. Design the monitoring system using a single ROM circuit that accounts for the 5 input
signals and their priority levels.

Exercise 03:
Design a circuit that can perform both multiplication and division on two 2-bit numbers, A
(A1,A0) and B (B1, B0).

If C=0 → the circuit performs the multiplication A×B.

If C=1→ the circuit performs the division A/B.

Each operation’s result is represented on a 4-bit output.

Both multiplication and division are to be processed simultaneously, and the control C selects
which result to output based on the operation needed.

Task:

1. Create the truth table for this circuit.


2. Draw the circuit diagram, using a single ROM of minimum size and the fewest
additional components possible.

1
Exercise 04:

You have a RAM memory whose case features a 16-bit address bus and an 8-bit data bus.

Task:

1. What is the size of the RM (Memory Register) and RA (Address Register)?


2. What is the number of addressable locations in this memory?
3. What is the number of bits that make up a memory word if the size of a location is 4 bits?
(1 memory word = 2 × size of the memory location)

4. What is the size of this memory in bytes for each of the following cases:

a. The size of a memory location is 1 bit.


b. The size of a memory location is 2 bits.
c. The size of a memory location is 4 bits.

5. For memory locations of 2 bits:

a. What is the maximum size of this memory in bytes?


b. . What is the address in decimal and hexadecimal of the 15th memory word?
(Numbering starts from zero)
c. Calculate the address in decimal and then in hexadecimal of the 9th element of an
array whose first element's address is (34)₁₀ = (0022)₁₆, and where all elements
consist of 6 bits.
d. Calculate the number of elements in this array, knowing that the address of its last
element is (91)₁₀ = (005B)₁₆.
e. What is the size of this array in bytes?
f. . How many arrays can be loaded into this memory if the capacity of each array is 10
elements, each element is 4 bits, the memory location is 2 bits, the first address is 0,
and the last address is 100? Provide the address of each array.

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