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Digital Logic Unit 67 and 8. Full Note

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Digital Logic Unit 67 and 8. Full Note

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rozzanxettri
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© © All Rights Reserved
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Unit 6. Combinational Logic Circuits [8 Hrs.

Q. What is combinational logic circuit? What are the examples of combinational


logic circuits examples?

Ans→ Combinational logic circuits are fundamental building blocks in digital electronics that
produce an output based on the current input values, without considering any past
inputs.
In other words, the output of a combinational logic circuit depends only on the present
input conditions, with no memory elements involved.
Examples of combinational logic circuits include:
1)Adder 2) Subtractor 3) Encoder 4) Decoder 5) Multiplexer (MUX) 6) Demultiplexer (DE-MUX) etc..

6.1. Half Adder, Full Adder and Parallel Adder


Q. What is half adder? Design a circuit diagram of half adder.
Ans→ A half adder is a basic digital circuit for adding two single-bit binary (only 2 bit) numbers.
It has two inputs (A and B) and two outputs (Sum and Carry).
The sum output (S) is the result of XORing the inputs, and the carry output (C) is the result
of ANDing the inputs. It doesn't consider any carry from previous additions.

Here's the truth table for a half adder:

Sum (S)
A B (A+B) Carry (C)

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Here's the logic circuit for a half adder: Expression of sum(s)and carry(c):
Sum (S) = A XOR B

Carry (C) = A AND B

Q. What is full adder? Design a circuit diagram of full adder.


Ans→ A full adder is a basic digital circuit for adding three single-bit binary (only 3 bit) numbers.
It has three inputs (A,B and C) and two outputs (Sum and Carry).
The sum output (S) is the result of XORing the inputs, and the carry output (C) is the result
of ANDing the inputs. It doesn't consider any carry from previous additions.

The truth table of a full adder

Sum (S)
A B C(in) (A+B+C) Carry-out C(out)

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

Here's the logic circuit for a full adder:

Q. What is parallel adder?


Ans→ A parallel adder is a digital circuit that adds two or more binary numbers (2 or more binary
numbers-at a time) simultaneously.
It's designed to add corresponding bits of multiple binary numbers in parallel, which
means that all bits of the numbers are added simultaneously rather than sequentially.
The most common type of parallel adder is the ripple carry adder, which consists of multiple
full adders connected in cascade. Each full adder adds together the corresponding bits of
the input numbers along with any carry from the previous stage. The carry output from each
full adder serves as the carry input to the next full adder.

Circuit diagram of parallel adder is :

6.2. Half Subtractors and Full Subtractors

Q. What is half subtractor? Design a circuit diagram of half subtractor.


Ans→ It is a combinational circuit of two bits where subtracting one single-bit binary number
from another.
• It has two inputs: the minuend (A) and the subtrahend (B).
• It has two outputs: the difference (D) and the borrow (Bout).
• The difference output (D) represents the result of subtracting B from A.

Truth Table:

A B Difference (D) Borrow (B)(out)


0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Block Diagram of half subtractor:

Circuit diagram of half subtractor:

Q. What is full subtractor? Create a circuit diagram of full subtractor.


Ans→ It is also a combinational circuit where A full subtractor is used to subtract a single-bit binary
number from another single-bit binary number along with a borrow input from a previous
stage.
• It has three inputs: the minuend (A), the subtrahend (B), and the borrow input (B) (in).
• It has two outputs: the difference (D) and the borrow output (B)(out).
Truth Table:
A B Bin Difference (D) Borrow (B)(out)
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 1
1 1 1 1 0

Circuit Diagram:
6.3. Decimal to Binary Encoder and Decimal to BCD Encoder

Q. What is encoder?Write its example and draw the block diagram of encoder.
Ans→ An encoder is a digital circuit that converts input signals into a coded output,
usually in binary or Gray code format. It's used to represent a large number of
inputs with fewer output bits, saving space and improving efficiency in data
transmission and processing.

Block diagram of encoder is:

Examples of encoder are: priority encoders, decimal to BCD encoders, and binary to Gray
code encoders.

Decimal to binary encoder, truth table and circuit diagram.


Q.i Design Decimal to Binary Encoder.
ANS→
A decimal-to-binary encoder usually consists of 10 input lines and 4 output lines. Each input line
corresponds to a decimal digit from 0 to 9, and each output line corresponds to a bit in the BCD
code.

Block diagram of binary to decimal encoder

Encoders are used as code converters in computer systems. These are available as IC’s in the market.
To convert a decimal number into binary or Decimal to BCD Encoder is used. In the BCD system,
the decimal number is represented as the four-digit binary. It can convert the decimal numbers from
0 to 9 into the binary stream.
The encoder is a combinational logic circuit. The reverse of the encoder is a decoder that performs
the reverse action.
The truth table of Decimal to BCD encoder is given below.

Note: only see the 1 in A0, A1,A2,A3 vertically and add ----to get expression

From the truth table above form the equations for the words A3, A2, A1, A0.

Thus the logical equations are as below-


A3 = 8+9
A2 = 4+5+6+7
A1 =2+3+6+7
A0= 1+3+5+7+9
Now, considering the logic equations above, form the combinational circuit with OR gates.

Decimal-To-Binary-Encoder Circuit Diagram:


Decimal to BCD encoder, truth table and circuit diagram.
Q. ii Design Decimal to BCD Encoder
Ans→ The decimal-to-binary encoder usually consists of 10 input lines and 4 output lines. Each
input line corresponds to each decimal digit and 4 outputs correspond to the BCD code. This
encoder accepts the decoded decimal data as an input and encodes it to the BCD output which is
available on the output lines. The figure below shows the logic symbol of the decimal to BCD
encoder .

Block diagram of Decimal to BCD Encoder


The truth table for decimal to BCD encoder is as follows.

INPUTS(Decimal) OUTPUTS(BCD code)

Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 A3 A2 A1 A0

0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 0 0 1 0 0 0 0 1

0 0 0 0 0 0 0 1 0 0 0 0 1 0

0 0 0 0 0 0 1 0 0 0 0 0 1 1

0 0 0 0 0 1 0 0 0 0 0 1 0 0

0 0 0 0 1 0 0 0 0 0 0 1 0 1

0 0 0 1 0 0 0 0 0 0 0 1 1 0

0 0 1 0 0 0 0 0 0 0 0 1 1 1

0 1 0 0 0 0 0 0 0 0 1 0 0 0

1 0 0 0 0 0 0 0 0 0 1 0 0 1

Note: only see the 1 in A0, A1,A2,A3 vertically and add ----to get expression

Logical expression for A3, A2, A1, and A0.


A3 = Y9 + Y8
A2 = Y7 + Y6 + Y5 +Y4
A1 = Y7 + Y6 + Y3 +Y2
A0 = Y9 + Y7 +Y5 +Y3 + Y1
The above two Boolean functions can be implemented using OR gates.

Implementation using OR Gate

6.4. Binary to Decimal Decoder, BCD to Decimal Decoder and Seven Segment
Display Decoder

Q. a, What is decoder? Write its example and draw the block diagram of decoder.
Ans→ A decoder is a digital circuit (Combinational circuit) that converts coded inputs into coded
outputs where each output represents a unique combination of inputs. It's the opposite
of an encoder, which performs the reverse operation of encoder.
In simpler terms, a decoder takes a binary input and activates one of several outputs
based on the binary pattern it receives.

Block diagram of decoder is:

Examples of decoder are: Binary to Decimal Decoder, BCD to Decimal Decoder,


Seven Segment Display Decoder etc…
Q. b, Design 3 bit Binary to Decimal Decoder.
Ans→ In 3 to 8 decoder, it includes three inputs and eight outputs. Here the inputs are represented
through A, B & C whereas the outputs are represented through D0, D1, D2…D7.

The selection of 8 outputs can be done based on the three inputs. So, the truth table of this 3 line to
8 line decoder is shown below.

From the following truth table, we can observe that simply one of 8 outputs from DO – D7 can be
selected depending on 3 select inputs.

Truth table of 3 lines to 8 line decoder:

A B C D0 D1 D2 D3 D4 D5 D6 D7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0

1 1 0 0 0 0 0 0 0 1 0

1 1 1 1 0 0 0 0 0 0 1

Logical Expression of 3 to 8 decoder are:


D0 = A’B’C’
D1= A’B’C
D2 = A’BC’
D3 = A’BC
D4 = AB’C’
D5= AB’C
D6 = ABC’
D7 = ABC
From the above Boolean expressions, the implementation of 3 to 8 decoder circuit can be done with
the help of three NOT gates & 8-three input AND gates.

In the above circuit, the three inputs can be decoded into 8 outputs
The 3 inverters in the above logic circuit will provide the complement of the inputs & each one of
the AND gates will generate one of the midterms.

3 Line to 8 Line Decoder Block Diagram:

Fig: 3 to 8 Line Decoder Block Diagram

Circuit diagram of the 3 to 8 decoder is shown below:

Fig: 3 to 8 Decoder Circuit


Q. C, Design BCD to Decimal Decoder.
Ans→ A Binary-Coded Decimal (BCD) to decimal decoder is a specific type of decoder that converts
Binary-Coded Decimal input into a decimal output. BCD is a binary representation of decimal
numbers where each decimal digit is represented by a 4-bit binary code.
Here's a truth table for a 4-bit BCD to decimal decoder:

In BCD, each digit from 0 to 9 is represented by its corresponding 4-bit binary code. Therefore, the
input to the decoder ranges from 0000 to 1001, representing decimal digits 0 to 9.
BCD to Decimal Decoder Block Diagram:

Logical Expression of BCD to decimal decoder are:

D0 = A’B’C’D’ (0000)
D1= A’B’C’D (0001)
D2 = A’B’CD’ (0010)
D3= A’B’CD (0011)
D4= A’BC’D’ (0100)
D5 = A’BC’D (0101)
D6 = A’BCD’ (0110)
D7= A’BCD (0111)
D8 = AB’C’D’ (1000)
D9 = AB’C’D (1001)

Circuit diagram to BCD to Decimal decoder:

Q. D, Design Seven Segment Display Decoder.


Ans→This BCD to seven segment decoder has four input lines (A, B, C and D) and 7 output
lines (a, b, c, d, e, f and g), this output is given to seven segment LED display which displays
the decimal number depending upon inputs.
Truth Table – For common BCD to seven segment decoder:

No.
0
1
2
3
4
5
6
7
8
9
Note –(see only where 1 is available in truth table from horizontally)
• For Common Anode type seven segment LED display, we only have to
and solve using K-map.
• Output for first combination of inputs (A, B, C and D) in Truth Table
corresponds to ‘0’ and last combination corresponds to ‘9’.
• For combination where all the inputs (A, B, C and D) are zero (see Truth
Table), our output lines are a = 1, b = 1, c = 1, d = 1, e = 1, f = 1 and g =
0. So 7 segment display shows ‘zero’ as output.
Similarly, for combination where one of the input is one (D = 1) and rest
are zero,our output lines are a = 0, b = 1, c = 1, d = 0, e = 0, f = 0 and g
= 0. So only LEDs ‘b’ and ‘c’ (see diagram above) will glow and 7
segment display shows ‘one’ as output.
K-Maps:
#for d:
#for a:

#for b:
#for e:

#for c: #for f:

#for g:
6.5. Data Transmissions, 4-to-1 Multiplexer and 8-to-1 Multiplexer

Q.i, What is data transmissions?


Ans→Data transmission is the process of sending digital or analog data over a communication
channel.

It involves encoding the data into signals suitable for transmission, transmitting those signals
through a medium (such as cables or wireless connections), and decoding the signals back into
usable data at the receiving end.

This process is essential for communication between computers, devices, and networks.

Q.i, What is multiplexer?


Ans→ A multiplexer (often called as "MUX") is a digital circuit that selects one of several input
signals and forwards it to a single output line. It acts as a data selector.

Multiplexers are commonly used in digital systems for various purposes, including data routing,
signal selection, and data transmission.

It has the following components:

Inputs: A multiplexer has multiple input lines, typically labeled as D0, D1, D2, ..., Dn, where n is the
number of input lines.

Select Lines: A multiplexer has one or more select lines, often denoted as S0, S1, ..., Sm, where m is
the number of select lines. These select lines determine which input signal is to be transmitted to
the output.

Output: The output of the multiplexer is a single line that carries the selected input signal.

Fig: Block diagram of multiplexer

4-to-1 Multiplexer and 8-to-1 Multiplexer


A. 4-to-1 Multiplexer: A multiplexer (MUX) is a combinational circuit that selects one of several
input signals and forwards it to a single output line.

A 4-to-1 multiplexer has four data input lines, two selection line, and one output line. The
select input line determines which of the four data input lines gets transmitted to the output.
The number of select input lines determines the number of input lines the multiplexer can
handle.

Fig: Block diagram of 4x1 multiplexer

Truth table and circuit diagram of 4X1 multiplexer:

B. 8-to-1 Multiplexer: Similarly, an 8-to-1 multiplexer has eight data input lines, one select input
line, and one output line. It operates in the same way as the 4-to-1 multiplexer but with more
input lines, allowing it to select from eight different data sources.
Selection Inputs Output

S2 S1 S0 Y

0 0 0 I0

0 0 1 I1

0 1 0 I2

0 1 1 I3

1 0 0 I4

1 0 1 I5

1 1 0 I6

1 1 1 I7
We can implement 8x1 Multiplexer using lower order Multiplexers easily by considering the above
Truth table.

Note:…….Circuit diagram ………Draw yourself

--------

6.6. Demultiplexer and Decoder Relations


Q.i, What is demultiplexer(De-MUX)
Ans→ A demultiplexer (often called as "DEMUX") is the opposite of a multiplexer.
While a multiplexer selects one of several input lines and forwards it to a single output
line, a demultiplexer takes a single input line and routes it to one of several output lines
based on the control input/selection line.

Fig: Block diagram of demultiplexer


Difference between Decoder and Demultiplexer
The following table highlights all the points that differentiate a decoder from a demultiplexer −

Key Decoder Demultiplexer

A decoder decodes an encrypted input signal to multiple A demultiplexer routes an input signal to
Purpose
output signals from one format to another format. multiple output signals.

Input / A decoder has input lines and a maximum of {2} ^ {n} A demultiplexer has single input, selection
Output output lines. lines and maximum of {2} ^ {n} outputs.

Inverse Decoder's inverse is Encoder. Demultiplexer's inverse is Multiplexer.

Decoders are used to detect bits, encoding of data. Demultiplexers are used in switching, data
Usage
distribution.

Select Lines Decoders have no select lines. Demultiplexers contain select lines.

Decoders are heavily used in networking applications. Demultiplexers are employed in


Application
communication systems.

6.7. 1-to-4 Demultiplexer and 1-to- 16 Demultiplexer

1x4 De-Multiplexer:In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y0, Y1, Y2,
and Y3, 2 selection lines, i.e., S0 and S1 and single input, i.e., A. On the basis of the combination of
inputs which are present at the selection lines S0 and S1, the input be connected to one of the
outputs. The block diagram and the truth table of the 1×4 multiplexer are given below.
Block Diagram:
Truth Table:

The logical expression of the term Y is as follows:

Y0=S1' S0' A
y1=S1' S0 A
y2=S1 S0' A
y3=S1 S0 A

Logical circuit of the above expressions is given below:


1x16 De-Multiplexer

In 1×16 de-multiplexer, there are total of 16 outputs, i.e., Y0, Y1, …, Y16, 4 selection lines, i.e., S0,
S1, S2, and S3 and single input, i.e., A. On the basis of the combination of inputs which are present at
the selection lines S0, S1, and S2, the input will be connected to one of these outputs. The block
diagram and the truth table of the 1×16 de-multiplexer are given below.

Block Diagram:
Truth Table:

The logical expression of the term Y is as follows:

(Note: if you find the zero then put compliment sign otherwise no compliment sign)

Y0=A.S0'.S1'.S2'.S3' (0000)
Y1=A.S0'.S1'.S2'.S3 (0001)
Y2=A.S0'.S1'.S2.S3' (0010)
Y3=A.S0'.S1'.S2.S3 (0011)
Y4=A.S0'.S1.S2'.S3' (0100)
Y5=A.S0'.S1.S2'.S3 (0101)
Y6=A.S0'.S1.S2.S3' (0110)
Y7=A.S0'.S1.S2.S3 (0111)
Y8=A.S0.S1'.S2'.S3' (1000)
Y9=A.S0.S1'.S2'.S3 (1001)
Y10=A.S0.S1'.S2.S3' (1010)
Y11=A.S0.S1'.S2.S3 (1011)
Y12=A.S0.S1.S2'.S3' (1100)
Y13=A.S0.S1.S2'.S3 (1101)
Y14=A.S0.S1.S2.S3' (1110)
Y15=A.S0.S1.S2.S3 (1111)

Logical circuit of the above expressions is given below:

===================================================================
Unit 7. Sequential Logic Circuits [8 Hrs.]
Q.a, What is Sequential Logic Circuit ?
Ans→
A sequential circuit is a type of digital circuit that utilizes memory elements, such as flip-flops,
registers or Counters to store and process information. It produces outputs based on both current
inputs and the circuit's previous state, allowing it to perform tasks that require memory and time-
dependent processing.

Sequential logic circuits are widely used in digital systems such as:
-computers

-calculators, and
-control systems to perform complex operations and store data.
7.1 Flip-Flops
Flip-flops are fundamental building blocks of sequential logic circuits. They are electronic circuits
capable of storing a single bit of binary information (either a 0 ora 1).
Flip-flops have two stable states, typically labeled as "set" or “1” and "reset" or "0"
.
They can change their state based on control signals, clock pulses, or the state of other flip-flops
in the circuit.
Flip-flops serve as memory elements within sequential circuits, allowing for the storage and
manipulation of data and the implementation of sequential logic operations.

7.1.1 RS Flip-Flop and Its Truth Table


The RS flip-flop (Reset-Set flip-flop) is a basic type of flip-flop that stores one bit of binary
information.
It has two inputs: The Set (S) input and The Reset (R) input.
The RS flip-flop is known as an asynchronous sequential circuit because it can change its state
immediately upon input changes.

The symbol of the RS Flip-Flop is shown below:

The NOR Gate RS Flip Flop


7.1.2 D-Flip Flop
A D flip-flop is a sequential logic circuit that stores and outputs a single bit of data.
The output changes synchronously with a clock signal, following the input data (D) when the clock
transitions.

Block Diagram of D flip flop:

7.1.3 JK Flip-flops and its Truth Table

A JK flip-flop is a sequential logic circuit that stores and outputs a single bit ofdata. It has inputs
for both the present state (J) and the complement of the present state (K), allowing for flexible
operation and toggling behavior.
7.1.4 T-Flip-Flop and Truth Table The Truth Table of T flip-flop

A T flip-flop, also known as a toggle flip-flop, is a type of flip-flop circuit that changes its
output state based on the input T (toggle) signal. It is capable of toggling between two
states, either preserving the current state or changing it.

In the truth table:

• T represents the input signal.


• Q(t) represents the current state of the flip-flop.
• Q(t+1) represents the next state of the flip-flop.

7.1.5 Master Slave JK Flip Flop


Master Slave JK Flip Flop is a combination of two JK flip flops which are connected in the cascaded
manner as shown in Figure below

In this combination of two JK flip flop, one acts as a master flip flop and the other acts as a
slave flip flop. In this master-slave flip flop, the outputs of the master JK flip flop are
connected to the inputs of the slave JK flip flop. The outputs of the slave flip flop are fed
back to the inputs of the master JK flip flop.
In the master-slave JK flip flop, a NOT gate (Inverter) is also used which is connected to clock signal
in a manner that the inverted clock signal is applied to the slave flip flop.
Therefore, when clock signal to master flip flop is 0, then for slave flip flop the clocksignal is 1,
and if the clock signal to master flip flop is 1, then for the slave flip flop it 0.

Truth Table of Master-Slave JK Flip Flop

Inputs Output Comment

J K Qn+1

0 0 Qn No Change

0 1 0 Reset

1 0 1 Set

1 1 Qn' Toggle

7.1.6 Applications of Flip-Flops:


Here are some applications of flip-flops:

1. Memory Elements: Flip-flops are widely used as basic building blocks for creating
memory elements in digital systems. They can store and retain binary information, allowing
the system to remember and process data.
2. Counters and Timers: Flip-flops are utilized in counters and timers to keep track of events
or time intervals
3. State Registers: Flip-flops are used in state registers to store and represent the current state
of a system or a process.
4. Synchronization and Clocking: Flip-flops are employed in synchronization circuits to
control the flow of data between different components of a digital system.
5. Data Storage and Transfer: Flip-flops are essential in data storage and transferoperations,
such as shift registers. Shift registers are used to shift data in or out serially, making them
useful in applications like data communication, data serialization, and data buffering.
6. Frequency Division: Flip-flops can be used to divide the frequency of an inputsignal. By
toggling the flip-flop at a certain rate, enabling frequency division circuits.
7. Digital Logic Functions: Such as counters, registers, and state machines.
7.2. Shift-Registers
Question: What is shift Register?

Ans→ A group of flip flops which is used to store multiple bits of data and the data is
moved from one flip flop to another is known as Shift Register. The bits stored in registers
shifted when the clock pulse is applied within and inside or outside the registers.

To form an n-bit shift register, we have to connect n number of flip flops. So, the number
of bits of the binary number is directly proportional to the number of flip flops. The flip flops
are connected in such a way that the first flip flop's output becomes the input of the other
flip flop.

A Shift Register can shift the bits either to the left or to the right. A Shift Register, which
shifts the bit to the left, is known as "Shift left register", and it shifts the bit to the right,
known as "Right left register".

Initially, all the flip-flops are set in "reset" condition i.e. Y3 = Y2 = Y1 = Y0 = 0. If we pass the
binary number 1111, the LSB bit of the number is applied first to the Din bit. The D3 input
of the third flip flop, i.e., FF-3, is directly connected to the serial data input D3. The output
Y3 is passed to the data input d2 of the next flip flop. This process remains the same for the
remaining flip flops.

Types of Shift Registers


1) Serial In Serial Out shift register
2) Serial In parallel Out shift register
3) Parallel In Serial Out shift register
4) Parallel In parallel Out shift register
5) Bidirectional Shift Register
6) Universal Shift Register
7) Shift Register Counter

7.2.1. Flip-flop as a One-bit Memory Device


Q, Why is flip-flop called as 1 bit memory device?
A flip-flop is a digital memory circuit that stores one bit of data. They are the
primary blocks of the most sequential circuits. It is also called one-bit memory,
binary, or a bistable multivibrator. Flip-flops act as memory elements in a
sequential circuit so it is also called as 1 bit memory device.
One Bit memory cell is also called Basic Bistable element. It has two
cross-coupled inverters, 2 outputs Q and Q’. It is called “Bistable” as the
basic bistable element circuit has two stable states logic 0 and logic 1. The
following diagram shows the Basic Bistable element:
(A) when A=0,
(i) In inverter 1, Q = A'= B= 1
(ii)In inverter 2, Q' = B' = A = 0

(B) when A=1,


(i) In inverter1, Q = A'= B= 0
(ii)In inverter2, Q' = B' = A = 1

7.2.2. Arithmetic Right/Left Shift Registers


Arithmetic right/left shift registers perform shifts on binary numbers, preserving the sign bit
for signed numbers.
1) Arithmetic Right Shift: In an arithmetic right shift, the most significant bit (sign bit) is
duplicated to fill the vacant bit positions shifted right. This preserves the sign of the
number. It's used in division by powers of two, and in signed binary division.

2) Arithmetic Left Shift: In an arithmetic left shift, bits are shifted to the left, with the least
significant bit being shifted out. It's used for multiplication by powers of two in signed
binary multiplication.
7.2.3. Serial-in Serial-out (SISO) Shift Register

→The shift register, which allows serial input (one bit after the other through a single data line)
and produces a serial output is known as a Serial-In Serial-Out shift register. Since there is only
one output, the data leaves the shift register one bit at a time in a serial pattern, thus the name
Serial-In Serial-Out Shift Register.
The logic circuit given below shows a serial-in serial-out shift register. The circuit consists of
four D flip-flops which are connected in a serial manner. All these flip-flops are synchronous with
each other since the same clock signal is applied to each flip-flop.

Serial-In Serial-Out Shift Register (SISO)

7.2.4. Serial-in Parallel-out (SIPO)Shift Register


The shift register, which allows serial input (one bit after the other through a single data line) and
produces a parallel output is known as the Serial-In Parallel-Out shift register.
The logic circuit given below shows a serial-in-parallel-out shift register.
The circuit consists of four D flip-flops which are connected. The clear (CLR) signal is connected
in addition to the clock signal to all 4 flip flops in order to RESET them. The output of the first
flip-flop is connected to the input of the next flip flop and so on. All these flip-flops are
synchronous with each other since the same clock signal is applied to each flip-flop.

Serial-In Parallel-Out shift Register (SIPO)

The above circuit is an example of a shift right register, taking the serial data input from the left
side of the flip-flop and producing a parallel output. They are used in communication lines where
demultiplexing of a data line into several parallel lines is required because the main use of the
SIPO register is to convert serial data into parallel data.
7.2.5. Parallel-in Serial-out (PISO)Shift Register
The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and produces a serial output is known as a Parallel-In Serial-Out shift
register.
The logic circuit given below shows a parallel-in-serial-out shift register. The circuit consists of
four D flip-flops which are connected. The clock input is directly connected to all the flip-flops
but the input data is connected individually to each flip-flop.

Parallel-In Serial-Out Shift Register (PISO)

A Parallel in Serial Out (PISO) shift register is used to convert parallel data to serial data.

7.2.6. Parallel-in Parallel-out (PIPO)Shift Register


The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and also produces a parallel output is known as Parallel-In parallel-Out shift
register.
The logic circuit given below shows a parallel-in-parallel-out shift register. The circuit consists of
four D flip-flops which are connected. The clear (CLR) signal and clock signals are connected to
all 4 flip-flops.

Parallel-In Parallel-Out Shift Register (PIPO)

A Parallel in Parallel out (PIPO) shift register is used as a temporary storage device and like SISO
Shift register it acts as a delay element.
7.2.7. Applications of Shift Registers
1) Serial-to-Parallel and Parallel-to-Serial Conversion: Convert data between serial
and parallel formats efficiently.
2) Data Storage: Temporarily store data for buffering, delay, or memory purposes.
3) Serial Data Transmission: Serialize and deserialize data for communication over
serial channels.
4) Counting: Count clock pulses for applications like frequency dividers or digital
clocks.
5) Arithmetic Operations: Perform simple arithmetic operations like multiplication
and division.
6) LED Displays and Drivers: Control multiple LEDs with fewer pins in display
systems.
7) Test Pattern Generation: Generate test patterns for digital circuit testing.

7.3. Counters
Q,What is counter?
→ A Counter is a device which stores (and sometimes displays) the number of times a
particular event or process has occurred, often in relationship to a clock signal. Not only
counting, a counter can follow the certain sequence based on our design like any random
sequence 0,1,3,2… .They can also be designed with the help of flip flops.
Counters are sequential circuit that count the number of pulses can be either in binary code
or BCD form. The main properties of a counter are timing, sequencing, and counting.
There are two modes of counters they are:
• Up counter
• Down counter

7.3.1. Synchronous Counters

→ Synchronous counter is a type of digital counter circuit where all flip-flops (or stages)
within the counter change state simultaneously in response to a clock signal.
In other words, the flip-flops are clocked together, ensuring that each stage transitions at the
same time.
7.3.2. Ripple Counters

A ripple counter is a digital counter


circuit where each flip-flop triggers
the next one in sequence, causing a
ripple effect of state changes.
It operates sequentially and suffers
from propagation delays between
stages, making it simpler but
potentially slower than synchronous
counters.

Some of the features of ripple counter are:


• It is an asynchronous counter.
• Different flip-flops are used with a different clock pulse.
• All the flip-flops are used in toggle mode.
• Only one flip-flop is applied with an external clock pulse and another flip-flop clock
is obtained from the output of the previous flip-flop.
• The flip-flop applied with an external clock pulse act as LSB (Least Significant Bit) in
the counting sequence.
The sequence of counting usually gets repeated after a limit. When counting up, for the n-
bit counter the count sequence goes from 000, 001, 010, … 110, 111, 000, 001, … etc.

When counting down the count sequence goes in the opposite manner: 111, 110, … 010,
001, 000, 111, 110, … etc.

7.3.3. M-Modulus Counters


M-modulus counters are a type of digital counter circuit where the count sequence is
determined by a preset value, called the modulus (M).

Design a synchronous counter modulus-


5(MOD-5)
7.3.4. Decade Counters
Decade counters are a type of digital counter circuit that counts in decimal (base-10)
sequence, cycling through ten distinct states before resetting to zero.

7.3.5. Ring Counters

Ring counter is a type of digital counter circuit where the output of one flip-flop serves as the
input to the next, creating a closed loop or "ring" configuration. It facilitating unidirectional
counting with a single-bit change per clock pulse.

OR
7.3.6. Applications of Counters

1) Digital Clocks: Generating time signals in digital clocks and timers.


2) Frequency Dividers: Dividing input frequencies in electronics and communication systems.
3) Event Counting: Monitoring events in industrial automation and traffic systems.
4) Sequence Generation: Creating predefined patterns in control systems.
5) Address Generation: Generating memory addresses in microprocessors.
6) Measuring Instruments: Measuring time, frequency, and events in various instruments.
7) Signal Modulation: Synchronizing data transmission in communication systems.
8) Logic Design: Creating sequential circuits in digital logic design.
9) Testing: Verifying functionality in digital systems testing.

==================================================================

Unit 8. Digital Displays [2 Hrs.]


8.1. LED Display
8.2. 7-Segments Display

8.1 LED Display

Q. What Does LED Display Mean? What are the applications(uses) of LED Display?
Ans→ LED Display (light-emitting diode display) is a screen display technology that uses a panel
of LEDs as the light source.
Currently, a large number of electronic devices, both small and large, use LED display as a
screen and as an interaction medium between the user and the system.

Applications of LED display are:


1. Modern electronic devices such as mobile phones
2. TVs
3. Tablets
4. Computer monitors,
5. Laptops screens, etc. use a LED display to display their output.

8.2, Seven (7) Segment Display Decoder Circuit Design:


The 7 segment display has 7 inputs. So we need a decoder circuit for working the display. First we
make a table which show individual leds are ON for each BCD code. From this we find the leds
which are ON in each code. Now we use some mathematical procedure to find the Boolean equation
of each led. From the equation we realize the circuit.

The K-map method is used for circuit solving.


It is given in the figures. we use some techniques for reduce the hardware.
Truth Table :

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