TOGETHER WE CAN ACHIEVE MORE

COURSE NAME: ELECTRONIC DEVICES LAB

(STUDY OF JFET AND MOSFET
CHARACTERIZATION)

SOLVED BY

Christopher Andrew Guda

Abstract:
Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) and Bipolar Junction Transistors are the two
most popular types of transistor (BJT). In the 1960s and 1970s, BJT-based circuits dominated the electronics
industry. MOSFETs are now used in the majority of electronic circuits, especially integrated circuits (ICs). The
main applications of BJTs include analog circuits (such as amplifiers), high-speed circuits, and power electronics.
BJTs and FETs differ primarily in two ways. The first is that while BJTs are current-controlled devices, FETs are
charge-controlled. The input impedance of BJTs is relatively low compared to that of FETs, which is the second
difference.

Theory and Methodology:

Transistor is a kind of current-control device, and its generating current includes electron flow and hole
flow. The transistor is therefore referred to as bipolar junction transistor.
FET is a unipolar device, in which the current of n-channel FET is formed by electron flow and the
current of p-channel is formed by hole flow. FET is a kind of voltage-control device. FET can also
perform the functions that general transistors (BJT) do, with the only exception that the bias conditions
and characteristics are different. Their applications shall thus be chosen in accordance with related
advantages and drawbacks. I
The characteristics of FET are listed as follows:
• FET has very high input impedance, typically around 100 MΩ.
• When FET is used as switch, there is no offset voltage.
• FET is relatively independent of radiation, whereas BJT is very sensitive to radiation (β
value will be varied). •
Intrinsic noise of FET is lower than BJT, which makes FET suitable for the input stage of low-level amplifier
• During operation the thermal stability of FET is higher than that of BJT.
However, FET also has some drawbacks: comparing with BJT, its product of gain and bandwidth is
smaller and it is easier to be damaged by static electricity.

Figure-1: Internal structure of n-channel and p-channel JFETs

Figure 1 depicts the JFETs' internal structure. One pair of p-type regions are diffused into a slab of n-type material
to create the n-channel JFET. Instead, one pair of n-type regions are diffused into a slab of p-type material to
create the p-channel JFET.
 .
Figure 2: JFET symbols: (a) n-channel (b) p-channel
The p -channel JFET is constructed in the same manner as the n -channel device of but with a reversal of the p -
and n -type materials. The defined current directions are reversed, as are the actual polarities for the voltages VGS
and VDS. For the p -channel device, the channel will be constricted by increasing positive voltages from gate to
source and the double-subscript notation for VDS will result in negative voltages for VDS on the characteristics of
figure 3, which has an IDSS of 6 mA and a pinch off voltage of VGS = +6 V.

Figure 3: p-channel JFET drain -source characteristics with IDSS = 6 mA and VP = +6 V

Figure 4: Transfer characteristics of p-channel JFET with IDSS = 4 mA and VP = +3 V

MOSFETs Structure and Operation
The MOSFETs are the most widely used FETs. Strictly speaking, MOSFET devices belong to the group of
Insulated Gate Field Effect Transistor (IGFETs). As the name implies, the gate is insulated from the channel by
an insulator. In most of the cases, the insulator is formed by a silicon dioxide (SiO2), which leads to the term
MOSFET. MOSETs like all other IGFETs has three terminals, which are called Gate (G), Source (S), and Drain
(D). In certain cases, the transistors have a fourth terminal, which is called the bulk or the body terminal. In
PMOS, the body terminal is held at the most positive voltage in the circuit and in NMOS, it is held at the most
negative voltage in the circuit.
There are four types of MOSFETs: enhancement n-type MOSFET, enhancement p-type MOSFET, depletion n-
type MOSFET, and depletion p-type MOSFET. The type depends whether the channel between the drain and
source is an induced channel or the channel is physically implemented and whether the current owing in the
channel is an electron current or a hole current. If the channel between the drain and the source is an induced
channel, the transistor is called enhancement transistor. If the channel between the drain and source is physically
implemented, then the transistor is called depletion transistor. If the current owing in the channel is an electron
current, the transistor is called an n- type or NMOS transistor. If the current flow is a hole current, then the
transistor is called p-type or PMOS transistor. Throughout the handout, we will concentrate on analyzing the
enhancement type MOSFET. The cross section of an enhancement NMOS transistor is shown in figure 5. If we
put the drain and source on ground potential and apply a positive voltage to the gate, the free holes (positive
charges) are repelled

Figure 5: Schematic cross section of an enhancement-type NMOS transistor

from the region of the substrate under the gate (channel region) due to the positive voltage applied to the gate. The
holes are pushed away downwards into the substrate leaving behind a depletion region. At the same time, the
positive gate voltage attracts electrons into the channel region. When the concentration of electrons near the
surface of the substrate under the gate is higher than the concentration of holes, an n-region is created, connecting
the source and the drain regions.

Figure 6: Symbols for Enhancement NMOS and PMOS transistors

The induced n-region thus forms the channel for current flow from drain to source. The channel is only a few
nanometers wide. Nevertheless, the entire current transport occurs in this thin channel between drain and source.
Now if a voltage is applied between drain and source electrodes an electron current can flow through the induced
channel. Increasing the voltage applied to the gate above a certain threshold voltage enhances the channel. In the
case of an enhancement type NMOS transistor the threshold voltage is positive, whereas an enhancement type
PMOS transistor has a negative threshold voltage. So, in order for the current to flow from drain to source, the
condition that should be satisfied is VG > Vth, where VG is the gate voltage and Vth is the minimum voltage
required to form a channel between drain and source so that carriers can ow through the channel. By changing the
applied gate voltage, we can modulate the conductance of the channel.
Depletion type MOSFETs use a different approach. The channel is already conductive for gate voltages of
0V. Such kinds of MOS transistors are realized by the physical implantation of an n-type region between
the drain and the source.

Figure 7: Drain current ID vs gate to source voltage VGS graph of an enhancement type NMOS showing
threshold voltage Vtn

Figure 8: (a) an n-channel enhancement type MOSFET with vGS and vDS applied (b) the iD – vDS
characteristics of a device with k’n(W/L) = 1 mA/V2 showing the three operating region.
Apparatus:
(1) Multimeter
(2) J 176 (p-channel JFET)
(3) 2N7000 (n-channel enhancement type MOSFET)
(4) Connecting wires.
(5) Trainer Board

Experimental Procedure:
Transfer Characteristics of P-channel JFET (J176)

• The circuit was connected as shown in figure-9. Vs = 10V kept constant.

• 1kΩ resistor was used as load.
• Now the gate voltage VG varied from 10V to 20V in steps of 1V and corresponding current through the
resistor ID were measured.
• Thereafter the table-1 was completed.
• ID was VGS curve was plotted using the data table of table-1 and the pinch-off voltage VP were measured.

Figure 9: Circuit for plotting ID vs VD and transfer characteristics of p-channel JFET (J176)
ID vs VDS Characteristics of P-channel JFET (J 176)

• The circuit was connected as per the figure-9. VG = 15 V was kept constant.
• 1kΩ resistor was used as load.
• Now the gate voltage VG varied from 0V to 10V in steps of 1V and corresponding current through the
resistor ID were measured.
• Thereafter the table-2 was completed
• ID was VGS curve was plotted using the data table of table-2 and different operating point were indicating.
Transfer Characteristics of n-channel enhancement MOSFET (2N7000)

Figure 10: Circuit for plotting ID vs VD and transfer characteristics of p-channel JFET (J176)
 • The circuit was connected as per the figure-9. VDS = 15 V was kept constant.
• 1kΩ resistor was used as load.
• Now the gate voltage VGS varied from 0V to 10V in steps of 1V and corresponding current through the
resistor ID were measured.
• Thereafter the table-3 was completed.
• ID was VGS curve was plotted using the data table of table-3 and threshold voltage Vth was measured.
ID vs VDS Characteristics of n-channel enhancement MOSFET (2N7000)

• The circuit was connected as per the figure-10. VGS = 5 V was kept constant.
• 1kΩ resistor was used as load.
• Now the gate voltage VDS varied from 0V to 10V in steps of 1V and corresponding current through the
resistor ID were measured.
• Thereafter the table-4 was completed.
• ID was VDS curve was plotted using the data table of table-4 and different operating regions indicating.

Experimental Data:
Table-1 Table-2
VG (Volts) VGS (Volts) ID (mA) VS (Volts) VDS (Volts) ID (mA)
0 -0.686 8.92 0 0.0107 0.02
1 -0.604 8.47 1 -1.057 0.02
2 -0.469 7.69 2 -2.083 0.02
3 -0.3332 6.81 3 -3.033 0.02
4 -0.221 6.06 4 -4.02 0.09
5 -0.08 5.02 5 -4.43 0.72
6 0.0548 4.14 6 -4.59 1.49
7 0.216 3.29 7 -4.61 2.51
8 0.402 2.43 8 -4.57 3.61
9 0.582 1.57 9 -4.61 4.59
10 0.768 0.77 10 -4.8 4.9
11 1.121 0.13
12 1.981 0.01
13 3.054 0.01

Table-3 Table-4

VGS (Volts) ID (mA) VDS (Volts) ID (mA)

0 0 0 0.00111
1 0 1.1 0.152
2 0.7 2 0.790
3 10.05 3 1.122
4 10.12 4 1.468
5 10.12 5 1.840
6 10.12 6 2.165
7 10.12 7 2.486
8 2.848
9 3.150
 Transfer Characteristics of P - channel JFET (J176)
10
9
8
7
6
ID (mA)

5
4
3
2
1
0
-1 -0.5 0 0.5 1 1.5 2 2.5 3 3.5
VGS (V)

ID vs VDS Characteristics of P-channel JFET( J176)

5
4.5
4
3.5
3
ID (mA)

2.5
2
1.5
1
0.5
0
-5 -4 -3 -2 -1 0
VGS (V)

Transfer Characteristics of n-channel enhancement MOSFET (2N7000)

12

10

6
ID (mA)

0
0 1 2 3 4 5 6 7 8
-2
VGS (V)
 ID vs VDS Characteristics of n-channel enhancement MOSFET( 2N7000)
3.5

2.5
ID (mA)

1.5

0.5

0
0 1 2 3 4 5 6 7 8 9 10
VDS (V)

Simulation Data:
Table-1 Table-2
VG (Volts) VGS ID VS (Volts) VDS (Volts) ID (mA)
0 637.63 mV 9.362 mA 0 10.387 nV -10.387 pA
1 1.626 V 8.374 mA 1 999.99 mV 999.201 pA
2 2.614 V 7.386 mA 2 2V 1.998 nA
3 3.602 V 6.398 mA 3 2.935 V 65.397 uA
4 4.586 V 5.414 mA 4 3.552 V 447.765 uA
5 5.551 V 4.449 mA 5 4.025 V 1.579 mA
6 6.356 V 3.644 mA 6 4.421 V 1.579 mA
7 7.059 V 2.941 mA 7 4.769 V 2.231 mA
8 7.739 V 2.261 mA 8 5.083 V 2.917 mA
9 8.389 V 1.611 mA 9 5.37 V 3.63 mA
10 8.996 V 1.004 mA 10 5.551 V 4.449 mA
11 9.533 V 467.209 mA
12 9.93 V 70.192 mA
13 10 V 9.948 nA

Table-3 Table-4
VGS (Volts) ID VDS (Volts) ID (mA)
0 44.409 pA 0 4.899 pA
1 44.409 pA 1.1 0.152
2 44.409 pA 2 0.790
3 9.885 mA 3 1.122
4 9.938 mA 4 1.468
5 9.955 mA 5 1.840
6 9.963 mA 6 2.165
7 9.968 mA 7 2.486
8 2.848
9 3.150
Discussion:
1. JFET(Junction Gate Field-Effect Transistor) is a three-terminal semiconductor device. Whereas, a
MOSFET is a 4 terminal device.
2. MOSFETs offer much higher input impedance than JFETs.
3. MOSFETs are more fragile and easier to destroy than JFETs.
4. MOSFETs are more expensive than JFETs.
5. MOSFETS draw very low input current due to them having high input impedance.
6. The drain resistance of JFET is high and ranges from 105 Ω to 106 Ω, whereas the drain resistance of
MOSFET is low of the order of 1 Ω to 50 Ω.
7. JFET is mainly used in low noise applications, whereas, MOSFET is extensively used in high noise
applications.

References:
1. A.S. Sedra, K.C. Smith, Microelectronic Circuits, Oxford University Press (1998).
2. J. Keown, ORCAD PSpice and Circuit Analysis, Prentice Hall Press (2001).
3. P. Horowitz, W. Hill, The Art of Electronics, Cambridge University Press (1989).
4. David Comer & Donald Comer, "Fundamentals of Electronic Circuit Design".

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