DeMux & EC & DC Notes
DeMux & EC & DC Notes
In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y 0, Y1, Y2, and
Y3, 2 selection lines, i.e., S0 and S1 and single input, i.e., A. On the basis of
the combination of inputs which are present at the selection lines S 0 and S1,
the input be connected to one of the outputs. The block diagram and the
truth table of the 1×4 multiplexer are given below.
Note: Design Logic Gate for the above Expression
1×8 De-multiplexer
In 1 to 8 De-multiplexer, there are total of eight outputs, i.e., Y 0, Y1, Y2, Y3,
Y4, Y5, Y6, and Y7, 3 selection lines, i.e., S0, S1and S2 and single input, i.e., A.
On the basis of the combination of inputs which are present at the selection
lines S0, S1 and S2, the input will be connected to one of these outputs. The
block diagram and the truth table of the 1×8 de-multiplexer are given
below.
Y =S '.S '.S '.A
0 0 1 2
Y =S .S '.S '.A
1 0 1 2
Y =S '.S .S '.A
2 0 1 2
Y =S .S .S '.A
3 0 1 2
Y =S '.S '.S A
4 0 1 2
Y =S .S '.S A
5 0 1 2
Y =S '.S .S A
6 0 1 2
Y =S .S .S .A
7 0 1 3
Y0=A.S0'.S1'.S2'.S3'
Y1=A.S0'.S1'.S2'.S3
Y2=A.S0'.S1'.S2.S3'
Y3=A.S0'.S1'.S2.S3
Y4=A.S0'.S1.S2'.S3'
Y5=A.S0'.S1.S2'.S3
Y6=A.S0'.S1.S2.S3'
Y7=A.S0'.S1.S2.S3
Y8=A.S0.S1'.S2'.S3'
Y9=A.S0.S1'.S2'.S3
Y10=A.S0.S1'.S2.S3'
Y11=A.S0.S1'.S2.S3
Y12=A.S0.S1.S2'.S3'
Y13=A.S0.S1.S2'.S3
Y14=A.S0.S1.S2.S3'
Y15=A.S0.S1.S2'.S3
Encoders
The combinational circuits that change the binary information into N output
lines are known as Encoders. The binary information is passed in the form
of 2N input lines. The output lines define the N-bit code for the binary
information. In simple words, the Encoder performs the reverse operation
of the Decoder. At a time, only one input line is activated for simplicity. The
produced N-bit output code is equivalent to the binary information.
4 to 2 line Encoder:
In 4 to 2 line encoder, there are total of four inputs, i.e., Y 0, Y1, Y2, and Y3,
and two outputs, i.e., A0 and A1. In 4-input lines, one input-line is set to true
at a time to get the respective binary code in the output side. Below are the
block diagram and the truth table of the 4 to 2 line encoder.
A1=Y3+Y2
A0=Y3+Y1
8 to 3 line Encoder:
The 8 to 3 line Encoder is also known as Octal to Binary Encoder. In 8 to
3 line encoder, there is a total of eight inputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5, Y6,
and Y7 and three outputs, i.e., A0, A1, and A2. In 8-input lines, one input-line
is set to true at a time to get the respective binary code in the output side.
Below are the block diagram and the truth table of the 8 to 3 line encoder.
Block Diagram:
Decoder
The combinational circuit that change the binary information into 2 N output
lines is known as Decoders. The binary information is passed in the form
of N input lines. The output lines define the 2 N-bit code for the binary
information. In simple words, the Decoder performs the reverse operation
of the Encoder. At a time, only one input line is activated for simplicity. The
produced 2N-bit output code is equivalent to the binary information.
2 to 4 line decoder:
In the 2 to 4 line decoder, there is a total of three inputs, i.e., A 0, and A1 and
E and four outputs, i.e., Y0, Y1, Y2, and Y3. For each combination of inputs,
when the enable 'E' is set to 1, one of these four outputs will be 1. The
block diagram and the truth table of the 2 to 4 line decoder are given below.
Y =E.A .A
3 1 0
Y =E.A .A '
2 1 0
Y =E.A '.A
1 1 0
Truth Table:
Note: Find Boolean expression & for given truth table & design logic
Gate