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Digital Logic Design

logic gates and implementaton of logic gatesin multisim

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0% found this document useful (0 votes)
6 views

Digital Logic Design

logic gates and implementaton of logic gatesin multisim

Uploaded by

f23mmg18
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

Faculty of Artificial Intelligence & Multimedia Gamming

BS – Multimedia Gamming

Digital Logic Design Lab

Digital Logic Design Lab # 01:


NOT, AND, OR Gate

Instructor: Dr. Santosh Kumar Banbhrani

Lab Learning Objectives:

Upon successful completion of this experiment, the student will be able:


• To implement and verify AND gate operations using NI ELVIS III
• To implement and verify OR gate operations using NI ELVIS III
• To implement and verify NOT gate operations using NI ELVIS III

Lab Hardware and Software Required:


Platform: NI ELVIS III ✓ View User Manual:
http://www.ni.com/en-
us/support/model.ni-elvis-iii.html
✓ View Tutorials:
https://www.youtube.com/playlist?list=P
LvcPIuVaUMIWm8ziaSxv0gwtshBA2d
h_M

Hardware: Digilent Digital Electronics Board for ✓ View NI DSDB Board Manual:
NI ELVIS III http://www.ni.com/pdf/manuals/376
627b.pdf

Software: NI Multisim 14.0.1 Education Version ✓ Install Multisim:


or newer http://www.ni.com/gate/gb/GB_AC
ADEMICEVALMULTISIM/US
✓ View Help:
http://www.ni.com/multisim/technic
al-resources/

Software: NI LabVIEW FPGA Vivado 2014.4 ✓ Install:


http://www.ni.com/download/labvie
w-fpga-module-2015-sp1/5920/en/

Note: Digilent Driver (The installer above


automatically downloads the installer below
onto your computer)

✓ Navigate to:
C:\NIFPGA\programs\Vivado2014_
4\data\xicom\cable_drivers\nt64\digi
lent
✓ Install: install_digilent.exe

Background Theory:
Figure 1-1 Video. View the video here: https://youtu.be/PhlGDrqqmj8

Video Summary

• Logic gates are the building blocks of all digital electronics


• AND and OR gates have at least two inputs and only one output
• NOT gates have one input and one output
• Inputs and outputs are expressed in binary (0’s or 1’s)

Truth Tables

One common way to express the particular function of a logic circuit is called a truth table.
Truth tables show all permutations of the inputs with their corresponding output values in terms
of logic level states. Logic level states are typically expressed as:

• 1 and 0
• HIGH and LOW
• True and False
This is an example of a truth table for two inputs:

Figure 1-2 Truth table for two inputs

A gate or logic circuit’s truth table must have as many rows as there are possibilities of unique
input combinations. For a single-input gate, like the inverter, there are only two input
possibilities, namely 0 and 1. For a two-input gate there are four possibilities (00, 01, 10, and
11), and thus four rows for the corresponding truth table. For a three-input logic device, there
are eight possibilities and so forth. The input columns are typically written in binary order as
shown here:

Figure 1-3 Truth table for three inputs written in binary

Logic Gates

Logic gates are physical devices that implement the Boolean functions of truth tables. The
two most basic logic gates are the “AND” and the “OR”.

• In the “AND” logic gate, the output is 1 if both the inputs for A and B are also 1. If one
or all of the inputs for A and B are 0, then the resulting output is 0. This is summarized
in the truth table below.
• Generally, the “AND” logic gate outputs the minimum value between the two input
digits.
• The “AND” symbol is represented on the right. In this case, we can see two inputs (A
and B) and one output.
Fig 1-4 AND Truth Table Fig 1-5 AND Logic Gate

• In the “OR” logic gate, the output is 0 if both the inputs for A and B are also 0. If one
or all of the inputs for A and B are 1, then the resulting output is also 1. This is
summarized in the truth table below.
• The “OR” logic gate outputs the maximum value between the two input digits.
• The “OR” symbol is represented below. As above, there are two inputs and one output.

Figure 1-6 OR Truth Table Figure 1-7 OR Logic Gate

• In the “NOT” gate the out is invert of input

Input Output

A LED (on / off) Level ( 1 / 0 )

0 on 1

1 off 0

Figure 1-8 NOT Truth Table Figure 1-9 NOT Logic Gate
74LS08 2-input AND gate IC:

In order to implement the AND operation using IC, the TTL 74LS08 2-input AND gate IC can
be used. This IC contains four AND gates. It has 14 pin DIP configuration as shown in Fig
1.10:

Fig 1.10: 74LS08 2-input AND gate IC pin configuration

74LS32 2-Input OR Gate IC:

In order to implement the OR operation using IC, the TTL 74LS32 2-input OR gate IC can be
used. It has four OR gates with in the package. This IC has 14 pin DIP configuration as shown
in Fig 1.11.

Fig 1.11: 74LS08 2-input AND gate IC pin configuration

74LS04 Inverted IC:


In order to implement the NOT gate operation using IC, the TTL 74LS04 IC can be used. This
IC contains six inverters. It has 14pin Dual Inline Package (DIP) configuration as shown in Fig
1.12. The power supply connections are made to pin 7 and 14. This supply the operating voltage
for all six NOT gates on the IC. Pin 1 is identified by a small indented circle next to it or by a
notch cut out between pin 1and 14.

Fig 1.12: 74LS04 Inverter IC pin configuration


Lab Examples:

Build the following circuit using multiple AND/OR Gates in Multisim:

• Place an OR gate and two AND gates from the Misc Digital group.
• Place three INTERACTIVE_DIGITAL_CONSTANTs from the Sources group.
• Place one PROBE_DIG_RED from the Indicators group.
• Wire them as shown.

Figure 1-13 Circuit with AND OR Logic gates

• Click the Run button to begin simulating the circuit.

Figure 1-14 Run button

• Using the A, B, and C keys, vary the inputs into the circuit.
1-1 Record the results, as indicated by the probe, in the following truth table.

A B C O

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

• When you're done, stop the simulation by clicking the Stop button.

Figure 1-15 Stop button

Lab Activities:

• Perform the logic of all the three gates NI ELVIS III kit with NI ELVIS Launcher
installed in computer, and show the progress to your instructor.
• You are supposed to follow steps in link given below and observe the outputs.
https://www.youtube.com/watch?v=KqmY_Sx4Kik

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