Lab 17
Lab 17
1] Lab 17 (p1)
Be sure to save your circuits, you will need them in the next two labs!
Submission of the lab consists of:
1) (0pts) a cover sheet with you name and section
2) (82 pts total) a print out of the 6 sets of VHDL programs (all modules included)
20 pts (10 pts ea) parts A-B
45 pts (15 pts ea) part C-E
17 pts part F
3) (18 pts total) a print out of the constraints files (*.xdc) [Delete the unused sections
before printing.]
18 pts (3 pts ea) parts A-F
4) Demonstrate the working project (part F only) on the Digilab board to your
instructor.
Failure to demonstrate your project will cause your grade for the above to be discounted
by 50%. A circuit that does not meet the required specifications will result in your lab
being discounted by a minimum of 10%.
New in this lab are:
working with the 7-segment LED display
using toggle flip-flops
using multiplexers (muxes)
using decoders
working with hexadecimal (base 16) and binary (base 2) numbers
incorporating existing sources into the project (LF_clock_source.vhd,
nib2led_decoder.vhd)
These instructions give you a general guide to completing the lab assignment. However
some details are left for you to discover, such as implementing the toggle-flip flop, mux,
and decoder in VHDL and how to make all the components work correctly with your
digilab board. If your first try doesn’t work the way you expect, observe the behavior of
your circuit. Hypothesize why it is doing what it is doing. Make a plan to fix it and
implement the plan. Good designs are iterative.
Phys2303 L.A. Bumm [Basys3 1.2.1] Lab 17 (p2)
0 0 0 0 0000 0 0 0
0 0 0 1 0001 1 1 1
0 0 1 0 0010 2 2 2
0 0 1 1 0011 3 3 3
0 1 0 0 0100 4 4 4
0 1 0 1 0101 5 5 5
0 1 1 0 0110 6 6 6
0 1 1 1 0111 7 7 7
1 0 0 0 1000 8 8 8
1 0 0 1 1001 9 9 9
1 0 1 0 1010 A 10 A
1 0 1 1 1011 B 11 b
1 1 0 0 1100 C 12 C
1 1 0 1 1101 D 13 d
1 1 1 0 1110 E 14 E
1 1 1 1 1111 F 15 F
Phys2303 L.A. Bumm [Basys3 1.2.1] Lab 17 (p4)
Test your circuit. Try all 16 possible combinations of the slide switches. btnR will
activate the right most digit (digit 0), btnD, second digit (digit 1), and so on. The symbols
displayed should correspond to the table shown for the nib2LED_decoder. It is important
that the bits are in the correct order so that sw3 is the MSB and sw0 is the LSB. When no
button is pressed, no digits should light. The decimal point should be completely dark.
Part B) Testing the low frequency clock source.
Background. The Basys3 board has a 100 MHz system clock, which is way too fast for
our application. The “LF_clock_source.vhd” module takes the 100 MHz system clock as
an input and divides it by 105, 106, 107, and 108, providing those results as a 4-bit array
output of lower frequency clocks. These output clock frequencies are approximately 1
kHz, 100 Hz, 10 Hz, and 1 Hz, respectively.
Summary. Create a new project “LF_clock_test”. Add LF_clock_source to the project as
a module. Create top-level VHDL to use the LF_clock_source. Connect the inputs to the
system clock and the four outputs to led(0-3). Assign the LEDs in order of increasing
speed, led0 to 1 Hz through led3 to 1 kHz.
Test your circuit: led0 should flash at approximately 1 Hz frequency, led1 should be ten
times faster. If you wave the board in the dark, the flashing of led2 and led3 should be
evident as dashed trails due to persistence of your retina. Save this program, you will find
it useful later.
Part C) Implementing and testing the toggle flip flop (TFF).
Background. In the final step of this project we will use the TFF to create the MSB of
the selector array used in the mux and decoder. If the LSB is the 100 Hz clock, we can
use the TFF to divide that clock frequency by 2. When combined, they produce a selector
array that continuously cycles 00, 01, 10, 11, …. In VHDL a TFF can be implemented in
several ways. I encourage you to look at examples in the language template in the Vivado
editor. Many examples can also be found on the internet. You will need to know enough
VHDL to adapt the examples to your project.
Phys2303 L.A. Bumm [Basys3 1.2.1] Lab 17 (p5)
Summary. Create a new project “TFF_test” and top level source to use your TFF. Assign
sw(0) to the TFF toggle input T, btnR to input clk, and led(1) to the TFF output Q. Also
assign btnR to led(0).
Test your circuit. Pressing btnR should cause led0 to light. If sw0 is on, then pressing
btnR will cause led1 to toggle (led1 will turn on if it was off and turn off if it was on). If
sw0 is off, the toggling of led1 will not occur.
Part D) Implementing and testing the mux.
Background. A mux is simply a switch. Here we have a 16-bit array of data that we need
to break into 4 nibbles so it can be displayed. In VHDL a mux can be implemented in
several ways. I encourage you to look at examples in the language template in the Vivado
editor. Many examples can also be found on the internet. You will need to know enough
VHDL to adapt the examples to your project.
Summary. Create a new project “mux_test” and top level source to use your mux.
Assign sw(0-15) to the mux input I (16-bit array) and led(0-3) to the mux output O (4-bit
array). Assign the 2-bit selector array S to btnR and btnL.
Test your circuit. The selector array (btnR and bntL) is a 2-bit binary number (00 to 11)
that addresses which nibble of the inputs (sw0-15) appear at the output, led(0-3).
Part E) Implementing and testing the decoder.
Background. We will use the decoder to select which digit should be illuminated based
on the 2-bit selector array. In VHDL a decoder can be implemented in several ways. I
encourage you to look at examples in the language template in the Vivado editor. Many
examples can also be found on the internet. You will need to know enough VHDL to
adapt the examples to your project.
Summary. Create a new project “decoder_test” and top level module to use your
decoder. Assign sw(0-1) to the decoder input S (2-bit array) and led(0-3) to the decoder
output O (4-bit array).
Test your circuit. The selector array sw(0-1) is a 2-bit binary number (0-3) that addresses
which of the element of the O output array is “1”.
Part F) Building the 4-Digit 7-Segment LED Decoder.
THIS CIRCUIT WILL TO BE USED AS A COMPONENT IN LATER LABS.
Summary. Create a new project “four_dig_seven_seg_decoder” and top level VHDL
code using nib2led_decoder, LF_clock_source, and the VHDL components you created
(mux, decoder, TFF) as a modules. The inputs will be a 16-bit array (sw) and the clock
(100 MHz system clock). The outputs will be a 7-bit array (seg) corresponding to the
seven led segments, the decimal point (dp), and the 4-bit array (an) corresponding to the
digits.
To test the code, use the 16 slide switches sw(0-15) as inputs. Assign the switches so
that sw15 is the MSB and sw0 is the LSB. This way the pattern on the switches will
Phys2303 L.A. Bumm [Basys3 1.2.1] Lab 17 (p6)
look just like the binary numbers in the table. Connect the outputs to the 4-digit 7-
segment display.
Make certain that your decoder is working correctly. The four digits displayed should
follow the specifications in the following table.
The binary input to your demonstration circuit should be arranged so that sw15 is the
MSB and sw0 is the LSB. sw(12-15) will be the 4 bits that control the left most digit and
sw(0-3) will be the 4 bits that control the right most digit. This way the pattern on the
switches will look just like the binary numbers in the table below. Your finished program
must be able to reproduce the table below and all numbers in between. (The table below
is not complete, a complete table has 65536 entries.)
4-Digit 7-Segment Decoder
Digit 3 Digit 2 Digit 1 Digit 0
four
bit(3-0) bit(3-0) bit(3-0) bit(3-0) binary hexadecimal
digits
sw(15-12) sw(11-8) sw(7-4) sw(3-0)
0000 0000 0000 0000 0000 0000 0000 0000 0000
0001 0000 0000 0001 0001 0000 0000 0001 1001
0000 0010 0000 0100 0000 0010 0000 0100 0204
1110 0111 1010 0011 1110 0111 1010 0011 E7A3
0101 1011 0110 1101 0101 1011 0110 1101 5B6D
1100 1000 1001 1111 1100 1000 1001 1111 C89F
1001 1111 0011 0101 1001 1111 0011 0101 9F35
1111 1111 1111 1111 1111 1111 1111 1111 FFFF