Sheet 4 Solution

1) For the I2C protocol, show how a master says that it wants to write to a slave with
address 1001101.

2) For the I2C protocol, what is the function of start and stop.
In I2C communication is initiated by the master sending a START condition and terminated by the
master sending a STOP condition.

3) For the I2C protocol, write the steps of byte burst read and write. Also, for Multibyte
burst read and write.
a. Multibyte burst write
i. Generate a START condition.
ii. Transmit the slave address followed by zero (for write).
iii. Transmit the address of the first location.
iv. Transmit the data for the first location and from then on, simply provide
consecutive bytes of data to be placed in consecutive memory locations.
v. Generate a STOP condition.
b. Multibyte burst read
i. Generate a START condition.
ii. Transmit the slave address followed by zero (for address write).
iii. Transmit the address of the first location.
iv. Generate a START (REPEATED START) condition.
v. Transmit the slave address followed by one (for read).
vi. Read the data from the first location and from then on, bring contents out
from consecutive memory locations
vii. Generate a STOP condition

c. Single byte write

i. The master puts a high-to-low pulse on SDA while, SCL is high to generate a
START condition to start the transmission
ii. The master transmits address of slave into the bus. The first seven bits
indicate the slave address, and the eighth bit indicates the Write [0] operation
stating that the master will write byte (data) into the slave.
iii. The slave pulls the SDA line low to signal an ACK to say that it is ready to
receive the data byte.
iv. After receiving the ACK, the master will transmit the data byte on the SDA
line (MSB first).
v. When the slave device receives the data it leaves the SDA line high to signal
NACK. This informs the master that the slave received the last data byte and
does not need any more data.
vi. After receiving the NACK, the master will know that no more data should be
transmitted. The master changes the SDA line when the SCL line is high to
transmit a STOP condition and then releases the bus.
 d. Single byte read
i. Send a START
ii. Send I²C address of the SLAVE with the R/W bit low
iii. Send device register you want to read
iv. Send a START sequence again (a repeated start)
v. Send I²C address of the SLAVE with the R/W bit high. This tells the device
the master wants to read data form the selected register.
vi. Read data byte from SLAVE
vii. Send the STOP sequence.
Note after every eight bits an ACK bit or NACK is sent
4) How the I2C protocol support bus arbitration?
a. I2C protocol supports a multimaster bus system. This doesn’t mean that
more than one master can use the bus at the same time. Rather, each master waits
for the current transmission to finish and then starts to use the bus. But it is possible
that two or more masters initiate a transmission at about the same time. In this
case the arbitration happens.
Each transmitter has to check the level of the bus and compare it with the
level it expects; if it doesn't match, that transmitter has lost the arbitration, and will
switch to slave mode. In the case of arbitration, the winning master will continue its
job. Notice that neither the bus is corrupted nor the data is lost

5) True or false. I2C protocol is ideal for short distances. TRUE

6) How many bits are there in a frame? Which bit is for acknowledge? 9 bits / 9th bit for
ACK
7) True or false. START and STOP conditions are generated when the SDA is high. FALSE
SCL is high
 8) True or false. After the arbitration of two masters, both must start transmission from the
beginning. FALSE

Useful diagrams for I2C

9) True or false. After the arbitration of two masters, both must start transmission from the
beginning. false
10) The letters ISA are an acronym for what phrase? Industry Standard Architecture
11) The ISA bus system supports what size data transfers? 8 bits, 16 bits, 32 bits
12) Is the ISA bus interface often used for memory expansion? False
14) The ISA bus can transfer data that are 8, 16 , 32 bits wide at the rate of 8 MHz
15) Describe how the address can be captured from the PCI bus.
PCI address appear on AD0-AD31 and multiplexed with data
In some systems there 64-bit data bus that use AD32-AD63 for data transfer
only, this is used for extending address to 64-bits
Figure illustrates timing diagram for PCI bus, shows way that address
multiplexed with data and also control signals used for multiplexing
During first clocking period, address of the memory or I/O location appears
on AD connections, and command to PCI peripheral appears on C/BE pins
16) What is the purpose of the configuration memory found on the PCI bus interface?
 The PCI interface contains a 256-byte configuration memory that allows the
computer to interrogate PCI interface.
 This feature allows system to automatically configure itself for PCI plug board.
17) Define the term plug-and-play
 Plug and Play (PnP) simply means that a computer will recognize a peripheral
device without the need for manual configuration or the installation of drivers.
 With PnP, the device works immediately upon connection to the computer.
From slides:
Plug-and-Play (PNP)
 Allows add-in cards to be plugged into any slot without changing
jumpers or switches
 Address mapping, IRQs, COM ports, etc., are assigned dynamically at
system start-up
 For PNP to work, add-in cards must contain basic information for
the BIOS and/or O/S, e.g.:
o Type of card and device
o Memory-space requirements
o Interrupt requirements
18) What is the purpose of the connection on the PCI bus system?
Typical PCI cards used in PCs include: network cards, sound cards, modems, extra ports
such as USB or serial, TV tuner cards and disk controllers
19) What advantage does the PCI bus exhibit over the ISA bus?

 PCI bus has plug-and-play characteristics and ability to function with 64-bit data bus
 PCI interface contains series of registers, located in small memory device on PCI
interface, that contain information about the board information in these registers
allows computer to automatically configure PCI card
 This feature, called plug-and-play, is probably main reason that PCI bus has become so
popular in the newest systems

20) How fast does the PCI Express bus transfer serial data?
 The PCI Express transfers data in serial at the rate of 2.5 GHz to legacy PCI applications,
increasing the data link speed to 250 MBps to 8 GBps for PCI Express interfaces.

21) Most computers contain at least one serial communication port. What is this port called?
Called com port
22) Can a USB device appear as a COM device?
Yes

23) What data rates are available for use on the USB?
 USB 1.0/Low-Speed: 1.5 Megabits per second (Mbps)
 USB 1.1/Full-Speed: 12 Mbps.
 USB 2.0/Hi-Speed: 480 Mbps.
 USB 3.0/SuperSpeed: 5 Gbps.
 USB 3.1/SuperSpeed: 10 Gbps.

24) How are data encoded on the USB?

 The USB uses NRZI (non-return to zero, inverted) data encoding for transmitting
packets.
 This encoding method does not change the signal level for the transmission of a logic 1,
but the signal level is inverted for each change to a logic 0.

25) What is the maximum cable length for use with the USB?
 Cable lengths are limited to five meters maximum for the full-speed interface and three
meters maximum for the low-speed interface.

26) Will the USB ever replace the ISA bus?

 For many applications it has replaced the ISA and PCI bus.

27) How many device addresses are available on the USB?

 127 device
28) What is NRZI encoding?
 NRZI is a method of mapping a binary signal to a physical signal for transmission over
some transmission media.
 The two level NRZI signal has a transition at a clock boundary if the bit being
transmitted is a logical 0, and does not have a transition if the bit being transmitted is a
logical 1.

29) What is a stuffed bit?

 Bit stuffing is the mechanism of inserting one or more non-information bits into a
message to be transmitted, to break up the message sequence, for synchronization
purpose.
 If logic 1 is transmitted for more than 6 bits in a row, the bit stuffing technique adds an
extra bit (logic 0) after six continuous 1s in a row. Bit stuffing ensures the receiver can
maintain synchronization for long strings of 1s.

30) If the following raw data are sent on the USB, draw the waveform of the signal found on the
USB: (1100110000110011011010)

31) How long can a data packet be on the USB?

 The maximum data payload size for data packet is different for each speed mode.
o For full speed devices it is 8, 16, 32 or 64 bytes.
o For high speed devices, it is up to 512 bytes.

32) What is the purpose of the NAK and ACK tokens on the USB?
 ACK acknowledges the receipt of data and NAK does not acknowledge the
receipt of data.

33) Describe the difference in data transfer rates on the PCI bus when compared with the AGP?
 The main advantage of AGP over PCI bus is AGP can sustain transfers at
speeds up to 2G bytes per second.

34) What is the transfer rate in a system using an 8X AGP video card?
 AGP 8X allows a maximum transfer rate of 2.1GB/s

35) What is the transfer rate of a PCI Express 16X video card? 4 GBps